Commit 8983da70c408df3d2159f508d219e17e99396db9
1 parent
74d37793
target-ppc: remove dead code
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5896 c046a42c-6fe2-441c-8c8c-71466251a162
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4 changed files
with
2 additions
and
25 deletions
target-ppc/cpu.h
| ... | ... | @@ -530,11 +530,7 @@ struct CPUPPCState { |
| 530 | 530 | * during translated code execution |
| 531 | 531 | */ |
| 532 | 532 | #if TARGET_LONG_BITS > HOST_LONG_BITS |
| 533 | - target_ulong t0, t1; | |
| 534 | -#endif | |
| 535 | - /* XXX: this is a temporary workaround for i386. cf translate.c comment */ | |
| 536 | -#if (TARGET_LONG_BITS > HOST_LONG_BITS) || defined(HOST_I386) | |
| 537 | - target_ulong t2; | |
| 533 | + target_ulong t0; | |
| 538 | 534 | #endif |
| 539 | 535 | |
| 540 | 536 | /* general purpose registers */ | ... | ... |
target-ppc/exec.h
| ... | ... | @@ -35,13 +35,9 @@ register struct CPUPPCState *env asm(AREG0); |
| 35 | 35 | #if TARGET_LONG_BITS > HOST_LONG_BITS |
| 36 | 36 | /* no registers can be used */ |
| 37 | 37 | #define T0 (env->t0) |
| 38 | -#define T1 (env->t1) | |
| 39 | -#define T2 (env->t2) | |
| 40 | 38 | #define TDX "%016" PRIx64 |
| 41 | 39 | #else |
| 42 | 40 | register target_ulong T0 asm(AREG1); |
| 43 | -register target_ulong T1 asm(AREG2); | |
| 44 | -register target_ulong T2 asm(AREG3); | |
| 45 | 41 | #define TDX "%016lx" |
| 46 | 42 | #endif |
| 47 | 43 | ... | ... |
target-ppc/op_helper.h
| ... | ... | @@ -18,8 +18,6 @@ |
| 18 | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | 19 | */ |
| 20 | 20 | |
| 21 | -void do_print_mem_EA (target_ulong EA); | |
| 22 | - | |
| 23 | 21 | /* Registers load and stores */ |
| 24 | 22 | #if defined(TARGET_PPC64) |
| 25 | 23 | void do_store_pri (int prio); |
| ... | ... | @@ -30,7 +28,6 @@ void ppc_store_dump_spr (int sprn, target_ulong val); |
| 30 | 28 | /* Misc */ |
| 31 | 29 | /* POWER / PowerPC 601 specific helpers */ |
| 32 | 30 | #if !defined(CONFIG_USER_ONLY) |
| 33 | -void do_POWER_rac (void); | |
| 34 | 31 | void do_store_hid0_601 (void); |
| 35 | 32 | #endif |
| 36 | 33 | ... | ... |
target-ppc/translate.c
| ... | ... | @@ -72,7 +72,7 @@ static TCGv_i32 cpu_fpscr; |
| 72 | 72 | static TCGv_i32 cpu_access_type; |
| 73 | 73 | |
| 74 | 74 | /* dyngen register indexes */ |
| 75 | -static TCGv cpu_T[3]; | |
| 75 | +static TCGv cpu_T[1]; | |
| 76 | 76 | |
| 77 | 77 | #include "gen-icount.h" |
| 78 | 78 | |
| ... | ... | @@ -88,20 +88,8 @@ void ppc_translate_init(void) |
| 88 | 88 | cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); |
| 89 | 89 | #if TARGET_LONG_BITS > HOST_LONG_BITS |
| 90 | 90 | cpu_T[0] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t0), "T0"); |
| 91 | - cpu_T[1] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t1), "T1"); | |
| 92 | - cpu_T[2] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t2), "T2"); | |
| 93 | 91 | #else |
| 94 | 92 | cpu_T[0] = tcg_global_reg_new(TCG_AREG1, "T0"); |
| 95 | - cpu_T[1] = tcg_global_reg_new(TCG_AREG2, "T1"); | |
| 96 | -#ifdef HOST_I386 | |
| 97 | - /* XXX: This is a temporary workaround for i386. | |
| 98 | - * On i386 qemu_st32 runs out of registers. | |
| 99 | - * The proper fix is to remove cpu_T. | |
| 100 | - */ | |
| 101 | - cpu_T[2] = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, t2), "T2"); | |
| 102 | -#else | |
| 103 | - cpu_T[2] = tcg_global_reg_new(TCG_AREG3, "T2"); | |
| 104 | -#endif | |
| 105 | 93 | #endif |
| 106 | 94 | |
| 107 | 95 | p = cpu_reg_names; | ... | ... |