gwj / at91sam9263 · Commits

Commit 88eeee0a31c696b26f8df3dfe2221b955f8d878e

Authored by balrog
1 parent 52fc1d83

Desambiguate pflash_register(). 

pflash_t is still ambiguous... perhaps both emulations should sit in a single file.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3794 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 6 changed files with 38 additions and 29 deletions
hw/flash.h
  View file @88eeee0
1 /* NOR flash devices */ 1 /* NOR flash devices */
2 typedef struct pflash_t pflash_t; 2 typedef struct pflash_t pflash_t;
3 3
4 -pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off,  
5 - BlockDriverState *bs,  
6 - uint32_t sector_len, int nb_blocs, int width,  
7 - uint16_t id0, uint16_t id1,  
8 - uint16_t id2, uint16_t id3); 4 +/* pflash_cfi01.c */
  5 +pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
  6 + BlockDriverState *bs,
  7 + uint32_t sector_len, int nb_blocs, int width,
  8 + uint16_t id0, uint16_t id1,
  9 + uint16_t id2, uint16_t id3);
  10 +
  11 +/* pflash_cfi02.c */
  12 +pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
  13 + BlockDriverState *bs,
  14 + uint32_t sector_len, int nb_blocs, int width,
  15 + uint16_t id0, uint16_t id1,
  16 + uint16_t id2, uint16_t id3);
9 17
10 /* nand.c */ 18 /* nand.c */
11 struct nand_flash_s; 19 struct nand_flash_s;
@@ -37,4 +45,3 @@ uint8_t ecc_digest(struct ecc_state_s *s, uint8_t sample); @@ -37,4 +45,3 @@ uint8_t ecc_digest(struct ecc_state_s *s, uint8_t sample);
37 void ecc_reset(struct ecc_state_s *s); 45 void ecc_reset(struct ecc_state_s *s);
38 void ecc_put(QEMUFile *f, struct ecc_state_s *s); 46 void ecc_put(QEMUFile *f, struct ecc_state_s *s);
39 void ecc_get(QEMUFile *f, struct ecc_state_s *s); 47 void ecc_get(QEMUFile *f, struct ecc_state_s *s);
40 -  
hw/gumstix.c
  View file @88eeee0
@@ -67,7 +67,7 @@ static void connex_init(int ram_size, int vga_ram_size, @@ -67,7 +67,7 @@ static void connex_init(int ram_size, int vga_ram_size,
67 exit(1); 67 exit(1);
68 } 68 }
69 69
70 - if (!pflash_register(0x00000000, qemu_ram_alloc(connex_rom), 70 + if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(connex_rom),
71 drives_table[index].bdrv, sector_len, connex_rom / sector_len, 71 drives_table[index].bdrv, sector_len, connex_rom / sector_len,
72 2, 0, 0, 0, 0)) { 72 2, 0, 0, 0, 0)) {
73 fprintf(stderr, "qemu: Error registering flash memory.\n"); 73 fprintf(stderr, "qemu: Error registering flash memory.\n");
@@ -107,7 +107,7 @@ static void verdex_init(int ram_size, int vga_ram_size, @@ -107,7 +107,7 @@ static void verdex_init(int ram_size, int vga_ram_size,
107 exit(1); 107 exit(1);
108 } 108 }
109 109
110 - if (!pflash_register(0x00000000, qemu_ram_alloc(verdex_rom), 110 + if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(verdex_rom),
111 drives_table[index].bdrv, sector_len, verdex_rom / sector_len, 111 drives_table[index].bdrv, sector_len, verdex_rom / sector_len,
112 2, 0, 0, 0, 0)) { 112 2, 0, 0, 0, 0)) {
113 fprintf(stderr, "qemu: Error registering flash memory.\n"); 113 fprintf(stderr, "qemu: Error registering flash memory.\n");
hw/mainstone.c
  View file @88eeee0
@@ -55,7 +55,8 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, @@ -55,7 +55,8 @@ static void mainstone_common_init(int ram_size, int vga_ram_size,
55 "'pflash' parameter\n"); 55 "'pflash' parameter\n");
56 exit(1); 56 exit(1);
57 } 57 }
58 - if (!pflash_register(MST_FLASH_0, mainstone_ram + PXA2XX_INTERNAL_SIZE, 58 + if (!pflash_cfi01_register(MST_FLASH_0,
  59 + mainstone_ram + PXA2XX_INTERNAL_SIZE,
59 drives_table[index].bdrv, 60 drives_table[index].bdrv,
60 256 * 1024, 128, 4, 0, 0, 0, 0)) { 61 256 * 1024, 128, 4, 0, 0, 0, 0)) {
61 fprintf(stderr, "qemu: Error registering flash memory.\n"); 62 fprintf(stderr, "qemu: Error registering flash memory.\n");
@@ -68,7 +69,8 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, @@ -68,7 +69,8 @@ static void mainstone_common_init(int ram_size, int vga_ram_size,
68 "'pflash' parameter\n"); 69 "'pflash' parameter\n");
69 exit(1); 70 exit(1);
70 } 71 }
71 - if (!pflash_register(MST_FLASH_1, mainstone_ram + PXA2XX_INTERNAL_SIZE, 72 + if (!pflash_cfi01_register(MST_FLASH_1,
  73 + mainstone_ram + PXA2XX_INTERNAL_SIZE,
72 drives_table[index].bdrv, 74 drives_table[index].bdrv,
73 256 * 1024, 128, 4, 0, 0, 0, 0)) { 75 256 * 1024, 128, 4, 0, 0, 0, 0)) {
74 fprintf(stderr, "qemu: Error registering flash memory.\n"); 76 fprintf(stderr, "qemu: Error registering flash memory.\n");
hw/pflash_cfi01.c
  View file @88eeee0
@@ -483,11 +483,11 @@ static int ctz32 (uint32_t n) @@ -483,11 +483,11 @@ static int ctz32 (uint32_t n)
483 return ret; 483 return ret;
484 } 484 }
485 485
486 -pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off,  
487 - BlockDriverState *bs,  
488 - target_ulong sector_len, int nb_blocs, int width,  
489 - uint16_t id0, uint16_t id1,  
490 - uint16_t id2, uint16_t id3) 486 +pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
  487 + BlockDriverState *bs, target_ulong sector_len,
  488 + int nb_blocs, int width,
  489 + uint16_t id0, uint16_t id1,
  490 + uint16_t id2, uint16_t id3)
491 { 491 {
492 pflash_t *pfl; 492 pflash_t *pfl;
493 target_long total_len; 493 target_long total_len;
hw/pflash_cfi02.c
  View file @88eeee0
@@ -524,11 +524,11 @@ static int ctz32 (uint32_t n) @@ -524,11 +524,11 @@ static int ctz32 (uint32_t n)
524 return ret; 524 return ret;
525 } 525 }
526 526
527 -pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off,  
528 - BlockDriverState *bs,  
529 - uint32_t sector_len, int nb_blocs, int width,  
530 - uint16_t id0, uint16_t id1,  
531 - uint16_t id2, uint16_t id3) 527 +pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
  528 + BlockDriverState *bs, target_ulong sector_len,
  529 + int nb_blocs, int width,
  530 + uint16_t id0, uint16_t id1,
  531 + uint16_t id2, uint16_t id3)
532 { 532 {
533 pflash_t *pfl; 533 pflash_t *pfl;
534 int32_t total_len; 534 int32_t total_len;
hw/ppc405_boards.c
  View file @88eeee0
@@ -234,9 +234,9 @@ static void ref405ep_init (int ram_size, int vga_ram_size, @@ -234,9 +234,9 @@ static void ref405ep_init (int ram_size, int vga_ram_size,
234 fl_idx, bios_size, bios_offset, -bios_size, 234 fl_idx, bios_size, bios_offset, -bios_size,
235 bdrv_get_device_name(drives_table[index].bdrv), fl_sectors); 235 bdrv_get_device_name(drives_table[index].bdrv), fl_sectors);
236 #endif 236 #endif
237 - pflash_register((uint32_t)(-bios_size), bios_offset,  
238 - drives_table[index].bdrv, 65536, fl_sectors, 2,  
239 - 0x0001, 0x22DA, 0x0000, 0x0000); 237 + pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
  238 + drives_table[index].bdrv, 65536, fl_sectors, 2,
  239 + 0x0001, 0x22DA, 0x0000, 0x0000);
240 fl_idx++; 240 fl_idx++;
241 } else 241 } else
242 #endif 242 #endif
@@ -551,9 +551,9 @@ static void taihu_405ep_init(int ram_size, int vga_ram_size, @@ -551,9 +551,9 @@ static void taihu_405ep_init(int ram_size, int vga_ram_size,
551 fl_idx, bios_size, bios_offset, -bios_size, 551 fl_idx, bios_size, bios_offset, -bios_size,
552 bdrv_get_device_name(drives_table[index].bdrv), fl_sectors); 552 bdrv_get_device_name(drives_table[index].bdrv), fl_sectors);
553 #endif 553 #endif
554 - pflash_register((uint32_t)(-bios_size), bios_offset,  
555 - drives_table[index].bdrv, 65536, fl_sectors, 4,  
556 - 0x0001, 0x22DA, 0x0000, 0x0000); 554 + pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
  555 + drives_table[index].bdrv, 65536, fl_sectors, 4,
  556 + 0x0001, 0x22DA, 0x0000, 0x0000);
557 fl_idx++; 557 fl_idx++;
558 } else 558 } else
559 #endif 559 #endif
@@ -587,9 +587,9 @@ static void taihu_405ep_init(int ram_size, int vga_ram_size, @@ -587,9 +587,9 @@ static void taihu_405ep_init(int ram_size, int vga_ram_size,
587 fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000, 587 fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000,
588 bdrv_get_device_name(drives_table[index].bdrv)); 588 bdrv_get_device_name(drives_table[index].bdrv));
589 #endif 589 #endif
590 - pflash_register(0xfc000000, bios_offset, drives_table[index].bdrv,  
591 - 65536, fl_sectors, 4,  
592 - 0x0001, 0x22DA, 0x0000, 0x0000); 590 + pflash_cfi02_register(0xfc000000, bios_offset,
  591 + drives_table[index].bdrv, 65536, fl_sectors, 4,
  592 + 0x0001, 0x22DA, 0x0000, 0x0000);
593 fl_idx++; 593 fl_idx++;
594 } 594 }
595 /* Register CLPD & LCD display */ 595 /* Register CLPD & LCD display */