Commit 87f4827e1dc49d5d4d26ffca9ef15a33a325c676

Authored by bellard
1 parent 4a585ccb

more code moved to helpers


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@216 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 14 additions and 128 deletions
op-i386.c
... ... @@ -19,8 +19,6 @@
19 19 */
20 20 #include "exec-i386.h"
21 21  
22   -/* NOTE: data are not static to force relocation generation by GCC */
23   -
24 22 uint8_t parity_table[256] = {
25 23 CC_P, 0, 0, CC_P, 0, CC_P, CC_P, 0,
26 24 0, CC_P, CC_P, 0, CC_P, 0, 0, CC_P,
... ... @@ -72,44 +70,6 @@ const uint8_t rclb_table[32] = {
72 70 6, 7, 8, 0, 1, 2, 3, 4,
73 71 };
74 72  
75   -#ifdef USE_X86LDOUBLE
76   -/* an array of Intel 80-bit FP constants, to be loaded via integer ops */
77   -typedef unsigned short f15ld[5];
78   -const f15ld f15rk[] =
79   -{
80   -/*0*/ {0x0000,0x0000,0x0000,0x0000,0x0000},
81   -/*1*/ {0x0000,0x0000,0x0000,0x8000,0x3fff},
82   -/*pi*/ {0xc235,0x2168,0xdaa2,0xc90f,0x4000},
83   -/*lg2*/ {0xf799,0xfbcf,0x9a84,0x9a20,0x3ffd},
84   -/*ln2*/ {0x79ac,0xd1cf,0x17f7,0xb172,0x3ffe},
85   -/*l2e*/ {0xf0bc,0x5c17,0x3b29,0xb8aa,0x3fff},
86   -/*l2t*/ {0x8afe,0xcd1b,0x784b,0xd49a,0x4000}
87   -};
88   -#else
89   -/* the same, 64-bit version */
90   -typedef unsigned short f15ld[4];
91   -const f15ld f15rk[] =
92   -{
93   -#ifndef WORDS_BIGENDIAN
94   -/*0*/ {0x0000,0x0000,0x0000,0x0000},
95   -/*1*/ {0x0000,0x0000,0x0000,0x3ff0},
96   -/*pi*/ {0x2d18,0x5444,0x21fb,0x4009},
97   -/*lg2*/ {0x79ff,0x509f,0x4413,0x3fd3},
98   -/*ln2*/ {0x39ef,0xfefa,0x2e42,0x3fe6},
99   -/*l2e*/ {0x82fe,0x652b,0x1547,0x3ff7},
100   -/*l2t*/ {0xa371,0x0979,0x934f,0x400a}
101   -#else
102   -/*0*/ {0x0000,0x0000,0x0000,0x0000},
103   -/*1*/ {0x3ff0,0x0000,0x0000,0x0000},
104   -/*pi*/ {0x4009,0x21fb,0x5444,0x2d18},
105   -/*lg2*/ {0x3fd3,0x4413,0x509f,0x79ff},
106   -/*ln2*/ {0x3fe6,0x2e42,0xfefa,0x39ef},
107   -/*l2e*/ {0x3ff7,0x1547,0x652b,0x82fe},
108   -/*l2t*/ {0x400a,0x934f,0x0979,0xa371}
109   -#endif
110   -};
111   -#endif
112   -
113 73 /* n must be a constant to be efficient */
114 74 static inline int lshift(int x, int n)
115 75 {
... ... @@ -358,6 +318,7 @@ void OPPROTO op_imull_T0_T1(void)
358 318  
359 319 /* division, flags are undefined */
360 320 /* XXX: add exceptions for overflow */
  321 +
361 322 void OPPROTO op_divb_AL_T0(void)
362 323 {
363 324 unsigned int num, den, q, r;
... ... @@ -420,62 +381,14 @@ void OPPROTO op_idivw_AX_T0(void)
420 381 EDX = (EDX & 0xffff0000) | r;
421 382 }
422 383  
423   -#ifdef BUGGY_GCC_DIV64
424   -/* gcc 2.95.4 on PowerPC does not seem to like using __udivdi3, so we
425   - call it from another function */
426   -uint32_t div64(uint32_t *q_ptr, uint64_t num, uint32_t den)
427   -{
428   - *q_ptr = num / den;
429   - return num % den;
430   -}
431   -
432   -int32_t idiv64(int32_t *q_ptr, int64_t num, int32_t den)
433   -{
434   - *q_ptr = num / den;
435   - return num % den;
436   -}
437   -#endif
438   -
439 384 void OPPROTO op_divl_EAX_T0(void)
440 385 {
441   - unsigned int den, q, r;
442   - uint64_t num;
443   -
444   - num = EAX | ((uint64_t)EDX << 32);
445   - den = T0;
446   - if (den == 0) {
447   - EIP = PARAM1;
448   - raise_exception(EXCP00_DIVZ);
449   - }
450   -#ifdef BUGGY_GCC_DIV64
451   - r = div64(&q, num, den);
452   -#else
453   - q = (num / den);
454   - r = (num % den);
455   -#endif
456   - EAX = q;
457   - EDX = r;
  386 + helper_divl_EAX_T0(PARAM1);
458 387 }
459 388  
460 389 void OPPROTO op_idivl_EAX_T0(void)
461 390 {
462   - int den, q, r;
463   - int64_t num;
464   -
465   - num = EAX | ((uint64_t)EDX << 32);
466   - den = T0;
467   - if (den == 0) {
468   - EIP = PARAM1;
469   - raise_exception(EXCP00_DIVZ);
470   - }
471   -#ifdef BUGGY_GCC_DIV64
472   - r = idiv64(&q, num, den);
473   -#else
474   - q = (num / den);
475   - r = (num % den);
476   -#endif
477   - EAX = q;
478   - EDX = r;
  391 + helper_idivl_EAX_T0(PARAM1);
479 392 }
480 393  
481 394 /* constant load & misc op */
... ... @@ -708,21 +621,7 @@ void OPPROTO op_boundl(void)
708 621  
709 622 void OPPROTO op_cmpxchg8b(void)
710 623 {
711   - uint64_t d;
712   - int eflags;
713   -
714   - eflags = cc_table[CC_OP].compute_all();
715   - d = ldq((uint8_t *)A0);
716   - if (d == (((uint64_t)EDX << 32) | EAX)) {
717   - stq((uint8_t *)A0, ((uint64_t)ECX << 32) | EBX);
718   - eflags |= CC_Z;
719   - } else {
720   - EDX = d >> 32;
721   - EAX = d;
722   - eflags &= ~CC_Z;
723   - }
724   - CC_SRC = eflags;
725   - FORCE_RET();
  624 + helper_cmpxchg8b();
726 625 }
727 626  
728 627 #if defined(__powerpc__)
... ... @@ -937,22 +836,9 @@ void op_addw_ESP_im(void)
937 836 ESP = (ESP & ~0xffff) | ((ESP + PARAM1) & 0xffff);
938 837 }
939 838  
940   -/* rdtsc */
941   -#ifndef __i386__
942   -uint64_t emu_time;
943   -#endif
944   -
945 839 void OPPROTO op_rdtsc(void)
946 840 {
947   - uint64_t val;
948   -#ifdef __i386__
949   - asm("rdtsc" : "=A" (val));
950   -#else
951   - /* better than nothing: the time increases */
952   - val = emu_time++;
953   -#endif
954   - EAX = val;
955   - EDX = val >> 32;
  841 + helper_rdtsc();
956 842 }
957 843  
958 844 void OPPROTO op_cpuid(void)
... ... @@ -1640,7 +1526,7 @@ void OPPROTO op_fildll_ST0_A0(void)
1640 1526 void OPPROTO op_fsts_ST0_A0(void)
1641 1527 {
1642 1528 #ifdef USE_FP_CONVERT
1643   - FP_CONVERT.d = ST0;
  1529 + FP_CONVERT.f = (float)ST0;
1644 1530 stfl((void *)A0, FP_CONVERT.f);
1645 1531 #else
1646 1532 stfl((void *)A0, (float)ST0);
... ... @@ -1904,42 +1790,42 @@ void OPPROTO op_fxam_ST0(void)
1904 1790  
1905 1791 void OPPROTO op_fld1_ST0(void)
1906 1792 {
1907   - ST0 = *(CPU86_LDouble *)&f15rk[1];
  1793 + ST0 = f15rk[1];
1908 1794 }
1909 1795  
1910 1796 void OPPROTO op_fldl2t_ST0(void)
1911 1797 {
1912   - ST0 = *(CPU86_LDouble *)&f15rk[6];
  1798 + ST0 = f15rk[6];
1913 1799 }
1914 1800  
1915 1801 void OPPROTO op_fldl2e_ST0(void)
1916 1802 {
1917   - ST0 = *(CPU86_LDouble *)&f15rk[5];
  1803 + ST0 = f15rk[5];
1918 1804 }
1919 1805  
1920 1806 void OPPROTO op_fldpi_ST0(void)
1921 1807 {
1922   - ST0 = *(CPU86_LDouble *)&f15rk[2];
  1808 + ST0 = f15rk[2];
1923 1809 }
1924 1810  
1925 1811 void OPPROTO op_fldlg2_ST0(void)
1926 1812 {
1927   - ST0 = *(CPU86_LDouble *)&f15rk[3];
  1813 + ST0 = f15rk[3];
1928 1814 }
1929 1815  
1930 1816 void OPPROTO op_fldln2_ST0(void)
1931 1817 {
1932   - ST0 = *(CPU86_LDouble *)&f15rk[4];
  1818 + ST0 = f15rk[4];
1933 1819 }
1934 1820  
1935 1821 void OPPROTO op_fldz_ST0(void)
1936 1822 {
1937   - ST0 = *(CPU86_LDouble *)&f15rk[0];
  1823 + ST0 = f15rk[0];
1938 1824 }
1939 1825  
1940 1826 void OPPROTO op_fldz_FT0(void)
1941 1827 {
1942   - ST0 = *(CPU86_LDouble *)&f15rk[0];
  1828 + ST0 = f15rk[0];
1943 1829 }
1944 1830  
1945 1831 /* associated heplers to reduce generated code length and to simplify
... ...