Commit 87ecb68bdf8a3e40ef885ddbb7ca1797dca40ebf
1 parent
257514dd
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
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Makefile
| 1 | 1 | # Makefile for QEMU. |
| 2 | 2 | |
| 3 | +VPATH=$(SRC_PATH):$(SRC_PATH)/hw | |
| 4 | + | |
| 3 | 5 | include config-host.mak |
| 4 | 6 | |
| 5 | 7 | .PHONY: all clean distclean dvi info install install-doc tar tarbin \ |
| ... | ... | @@ -47,9 +49,15 @@ BLOCK_OBJS+=block-qcow2.o block-parallels.o |
| 47 | 49 | # CPUs and machines. |
| 48 | 50 | |
| 49 | 51 | OBJS=$(BLOCK_OBJS) |
| 50 | -OBJS+=readline.o console.o | |
| 52 | +OBJS+=readline.o console.o | |
| 51 | 53 | OBJS+=block.o |
| 52 | 54 | |
| 55 | +OBJS+=irq.o | |
| 56 | +OBJS+=i2c.o smbus.o smbus_eeprom.o max7310.o max111x.o wm8750.o | |
| 57 | +OBJS+=ssd0303.o ssd0323.o ads7846.o | |
| 58 | +OBJS+=scsi-disk.o cdrom.o | |
| 59 | +OBJS+=usb.o usb-hub.o usb-linux.o usb-hid.o usb-msd.o usb-wacom.o | |
| 60 | + | |
| 53 | 61 | ifdef CONFIG_WIN32 |
| 54 | 62 | OBJS+=tap-win32.o |
| 55 | 63 | endif | ... | ... |
Makefile.target
| ... | ... | @@ -399,7 +399,6 @@ endif |
| 399 | 399 | VL_OBJS=vl.o osdep.o monitor.o pci.o loader.o isa_mmio.o |
| 400 | 400 | # XXX: suppress QEMU_TOOL tests |
| 401 | 401 | VL_OBJS+=block-raw.o |
| 402 | -VL_OBJS+=irq.o | |
| 403 | 402 | |
| 404 | 403 | ifdef CONFIG_ALSA |
| 405 | 404 | LIBS += -lasound |
| ... | ... | @@ -421,14 +420,11 @@ CPPFLAGS += $(CONFIG_VNC_TLS_CFLAGS) |
| 421 | 420 | LIBS += $(CONFIG_VNC_TLS_LIBS) |
| 422 | 421 | endif |
| 423 | 422 | |
| 424 | -VL_OBJS += i2c.o smbus.o | |
| 425 | - | |
| 426 | 423 | # SCSI layer |
| 427 | -VL_OBJS+= scsi-disk.o cdrom.o lsi53c895a.o | |
| 424 | +VL_OBJS+= lsi53c895a.o | |
| 428 | 425 | |
| 429 | 426 | # USB layer |
| 430 | -VL_OBJS+= usb.o usb-hub.o usb-linux.o usb-hid.o usb-ohci.o usb-msd.o | |
| 431 | -VL_OBJS+= usb-wacom.o | |
| 427 | +VL_OBJS+= usb-ohci.o | |
| 432 | 428 | |
| 433 | 429 | # EEPROM emulation |
| 434 | 430 | VL_OBJS += eeprom93xx.o |
| ... | ... | @@ -444,7 +440,7 @@ ifeq ($(TARGET_BASE_ARCH), i386) |
| 444 | 440 | VL_OBJS+= ide.o pckbd.o ps2.o vga.o $(SOUND_HW) dma.o |
| 445 | 441 | VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pcspk.o pc.o |
| 446 | 442 | VL_OBJS+= cirrus_vga.o apic.o parallel.o acpi.o piix_pci.o |
| 447 | -VL_OBJS+= usb-uhci.o smbus_eeprom.o vmmouse.o vmport.o vmware_vga.o | |
| 443 | +VL_OBJS+= usb-uhci.o vmmouse.o vmport.o vmware_vga.o | |
| 448 | 444 | CPPFLAGS += -DHAS_AUDIO -DHAS_AUDIO_CHOICE |
| 449 | 445 | endif |
| 450 | 446 | ifeq ($(TARGET_BASE_ARCH), ppc) |
| ... | ... | @@ -468,7 +464,7 @@ VL_OBJS+= mips_r4k.o mips_malta.o mips_pica61.o mips_mipssim.o |
| 468 | 464 | VL_OBJS+= mips_timer.o mips_int.o dma.o vga.o serial.o i8254.o i8259.o |
| 469 | 465 | VL_OBJS+= jazz_led.o |
| 470 | 466 | VL_OBJS+= ide.o gt64xxx.o pckbd.o ps2.o fdc.o mc146818rtc.o usb-uhci.o acpi.o ds1225y.o |
| 471 | -VL_OBJS+= piix_pci.o smbus_eeprom.o parallel.o cirrus_vga.o $(SOUND_HW) | |
| 467 | +VL_OBJS+= piix_pci.o parallel.o cirrus_vga.o $(SOUND_HW) | |
| 472 | 468 | VL_OBJS+= mipsnet.o |
| 473 | 469 | CPPFLAGS += -DHAS_AUDIO |
| 474 | 470 | endif |
| ... | ... | @@ -494,13 +490,13 @@ VL_OBJS+= integratorcp.o versatilepb.o ps2.o smc91c111.o arm_pic.o arm_timer.o |
| 494 | 490 | VL_OBJS+= arm_boot.o pl011.o pl031.o pl050.o pl080.o pl110.o pl181.o pl190.o |
| 495 | 491 | VL_OBJS+= versatile_pci.o sd.o ptimer.o |
| 496 | 492 | VL_OBJS+= realview_gic.o realview.o arm_sysctl.o mpcore.o |
| 497 | -VL_OBJS+= armv7m.o armv7m_nvic.o stellaris.o ssd0303.o pl022.o | |
| 498 | -VL_OBJS+= ssd0323.o pl061.o | |
| 493 | +VL_OBJS+= armv7m.o armv7m_nvic.o stellaris.o pl022.o | |
| 494 | +VL_OBJS+= pl061.o | |
| 499 | 495 | VL_OBJS+= arm-semi.o |
| 500 | 496 | VL_OBJS+= pxa2xx.o pxa2xx_pic.o pxa2xx_gpio.o pxa2xx_timer.o pxa2xx_dma.o |
| 501 | -VL_OBJS+= pxa2xx_lcd.o pxa2xx_mmci.o pxa2xx_pcmcia.o max111x.o max7310.o | |
| 497 | +VL_OBJS+= pxa2xx_lcd.o pxa2xx_mmci.o pxa2xx_pcmcia.o | |
| 502 | 498 | VL_OBJS+= pflash_cfi01.o gumstix.o |
| 503 | -VL_OBJS+= spitz.o ads7846.o ide.o serial.o nand.o ecc.o wm8750.o | |
| 499 | +VL_OBJS+= spitz.o ide.o serial.o nand.o ecc.o | |
| 504 | 500 | VL_OBJS+= omap.o omap_lcdc.o omap1_clk.o omap_mmc.o omap_i2c.o |
| 505 | 501 | VL_OBJS+= palm.o tsc210x.o |
| 506 | 502 | CPPFLAGS += -DHAS_AUDIO | ... | ... |
arm-semi.c
audio/audio.c
| ... | ... | @@ -21,7 +21,11 @@ |
| 21 | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | -#include "vl.h" | |
| 24 | +#include "hw/hw.h" | |
| 25 | +#include "audio.h" | |
| 26 | +#include "console.h" | |
| 27 | +#include "qemu-timer.h" | |
| 28 | +#include "sysemu.h" | |
| 25 | 29 | |
| 26 | 30 | #define AUDIO_CAP "audio" |
| 27 | 31 | #include "audio_int.h" | ... | ... |
audio/audio.h
| ... | ... | @@ -73,7 +73,6 @@ typedef struct CaptureState { |
| 73 | 73 | LIST_ENTRY (CaptureState) entries; |
| 74 | 74 | } CaptureState; |
| 75 | 75 | |
| 76 | -typedef struct AudioState AudioState; | |
| 77 | 76 | typedef struct SWVoiceOut SWVoiceOut; |
| 78 | 77 | typedef struct CaptureVoiceOut CaptureVoiceOut; |
| 79 | 78 | typedef struct SWVoiceIn SWVoiceIn; | ... | ... |
audio/mixeng.c
audio/noaudio.c
| ... | ... | @@ -21,7 +21,9 @@ |
| 21 | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | -#include "vl.h" | |
| 24 | +#include "qemu-common.h" | |
| 25 | +#include "audio.h" | |
| 26 | +#include "qemu-timer.h" | |
| 25 | 27 | |
| 26 | 28 | #define AUDIO_CAP "noaudio" |
| 27 | 29 | #include "audio_int.h" | ... | ... |
audio/ossaudio.c
audio/sdlaudio.c
audio/wavaudio.c
| ... | ... | @@ -21,7 +21,9 @@ |
| 21 | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | -#include "vl.h" | |
| 24 | +#include "hw/hw.h" | |
| 25 | +#include "qemu-timer.h" | |
| 26 | +#include "audio.h" | |
| 25 | 27 | |
| 26 | 28 | #define AUDIO_CAP "wav" |
| 27 | 29 | #include "audio_int.h" | ... | ... |
audio/wavcapture.c
block-raw.c
| ... | ... | @@ -21,10 +21,9 @@ |
| 21 | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | -#ifdef QEMU_IMG | |
| 25 | 24 | #include "qemu-common.h" |
| 26 | -#else | |
| 27 | -#include "vl.h" | |
| 25 | +#ifndef QEMU_IMG | |
| 26 | +#include "qemu-timer.h" | |
| 28 | 27 | #include "exec-all.h" |
| 29 | 28 | #endif |
| 30 | 29 | #include "block_int.h" | ... | ... |
block.c
| ... | ... | @@ -21,10 +21,9 @@ |
| 21 | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | -#ifdef QEMU_IMG | |
| 25 | 24 | #include "qemu-common.h" |
| 26 | -#else | |
| 27 | -#include "vl.h" | |
| 25 | +#ifndef QEMU_IMG | |
| 26 | +#include "console.h" | |
| 28 | 27 | #endif |
| 29 | 28 | #include "block_int.h" |
| 30 | 29 | ... | ... |
block.h
cocoa.m
console.c
| ... | ... | @@ -21,7 +21,9 @@ |
| 21 | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | -#include "vl.h" | |
| 24 | +#include "qemu-common.h" | |
| 25 | +#include "console.h" | |
| 26 | +#include "qemu-timer.h" | |
| 25 | 27 | |
| 26 | 28 | //#define DEBUG_CONSOLE |
| 27 | 29 | #define DEFAULT_BACKSCROLL 512 | ... | ... |
console.h
0 → 100644
| 1 | +#ifndef CONSOLE_H | |
| 2 | +#define CONSOLE_H | |
| 3 | + | |
| 4 | +#include "qemu-char.h" | |
| 5 | + | |
| 6 | +/* keyboard/mouse support */ | |
| 7 | + | |
| 8 | +#define MOUSE_EVENT_LBUTTON 0x01 | |
| 9 | +#define MOUSE_EVENT_RBUTTON 0x02 | |
| 10 | +#define MOUSE_EVENT_MBUTTON 0x04 | |
| 11 | + | |
| 12 | +typedef void QEMUPutKBDEvent(void *opaque, int keycode); | |
| 13 | +typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); | |
| 14 | + | |
| 15 | +typedef struct QEMUPutMouseEntry { | |
| 16 | + QEMUPutMouseEvent *qemu_put_mouse_event; | |
| 17 | + void *qemu_put_mouse_event_opaque; | |
| 18 | + int qemu_put_mouse_event_absolute; | |
| 19 | + char *qemu_put_mouse_event_name; | |
| 20 | + | |
| 21 | + /* used internally by qemu for handling mice */ | |
| 22 | + struct QEMUPutMouseEntry *next; | |
| 23 | +} QEMUPutMouseEntry; | |
| 24 | + | |
| 25 | +void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); | |
| 26 | +QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, | |
| 27 | + void *opaque, int absolute, | |
| 28 | + const char *name); | |
| 29 | +void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry); | |
| 30 | + | |
| 31 | +void kbd_put_keycode(int keycode); | |
| 32 | +void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); | |
| 33 | +int kbd_mouse_is_absolute(void); | |
| 34 | + | |
| 35 | +void do_info_mice(void); | |
| 36 | +void do_mouse_set(int index); | |
| 37 | + | |
| 38 | +/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx | |
| 39 | + constants) */ | |
| 40 | +#define QEMU_KEY_ESC1(c) ((c) | 0xe100) | |
| 41 | +#define QEMU_KEY_BACKSPACE 0x007f | |
| 42 | +#define QEMU_KEY_UP QEMU_KEY_ESC1('A') | |
| 43 | +#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') | |
| 44 | +#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') | |
| 45 | +#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') | |
| 46 | +#define QEMU_KEY_HOME QEMU_KEY_ESC1(1) | |
| 47 | +#define QEMU_KEY_END QEMU_KEY_ESC1(4) | |
| 48 | +#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) | |
| 49 | +#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) | |
| 50 | +#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) | |
| 51 | + | |
| 52 | +#define QEMU_KEY_CTRL_UP 0xe400 | |
| 53 | +#define QEMU_KEY_CTRL_DOWN 0xe401 | |
| 54 | +#define QEMU_KEY_CTRL_LEFT 0xe402 | |
| 55 | +#define QEMU_KEY_CTRL_RIGHT 0xe403 | |
| 56 | +#define QEMU_KEY_CTRL_HOME 0xe404 | |
| 57 | +#define QEMU_KEY_CTRL_END 0xe405 | |
| 58 | +#define QEMU_KEY_CTRL_PAGEUP 0xe406 | |
| 59 | +#define QEMU_KEY_CTRL_PAGEDOWN 0xe407 | |
| 60 | + | |
| 61 | +void kbd_put_keysym(int keysym); | |
| 62 | + | |
| 63 | +/* consoles */ | |
| 64 | + | |
| 65 | +struct DisplayState { | |
| 66 | + uint8_t *data; | |
| 67 | + int linesize; | |
| 68 | + int depth; | |
| 69 | + int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */ | |
| 70 | + int width; | |
| 71 | + int height; | |
| 72 | + void *opaque; | |
| 73 | + struct QEMUTimer *gui_timer; | |
| 74 | + | |
| 75 | + void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); | |
| 76 | + void (*dpy_resize)(struct DisplayState *s, int w, int h); | |
| 77 | + void (*dpy_refresh)(struct DisplayState *s); | |
| 78 | + void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, | |
| 79 | + int dst_x, int dst_y, int w, int h); | |
| 80 | + void (*dpy_fill)(struct DisplayState *s, int x, int y, | |
| 81 | + int w, int h, uint32_t c); | |
| 82 | + void (*mouse_set)(int x, int y, int on); | |
| 83 | + void (*cursor_define)(int width, int height, int bpp, int hot_x, int hot_y, | |
| 84 | + uint8_t *image, uint8_t *mask); | |
| 85 | +}; | |
| 86 | + | |
| 87 | +static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) | |
| 88 | +{ | |
| 89 | + s->dpy_update(s, x, y, w, h); | |
| 90 | +} | |
| 91 | + | |
| 92 | +static inline void dpy_resize(DisplayState *s, int w, int h) | |
| 93 | +{ | |
| 94 | + s->dpy_resize(s, w, h); | |
| 95 | +} | |
| 96 | + | |
| 97 | +typedef void (*vga_hw_update_ptr)(void *); | |
| 98 | +typedef void (*vga_hw_invalidate_ptr)(void *); | |
| 99 | +typedef void (*vga_hw_screen_dump_ptr)(void *, const char *); | |
| 100 | + | |
| 101 | +TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update, | |
| 102 | + vga_hw_invalidate_ptr invalidate, | |
| 103 | + vga_hw_screen_dump_ptr screen_dump, | |
| 104 | + void *opaque); | |
| 105 | +void vga_hw_update(void); | |
| 106 | +void vga_hw_invalidate(void); | |
| 107 | +void vga_hw_screen_dump(const char *filename); | |
| 108 | + | |
| 109 | +int is_graphic_console(void); | |
| 110 | +CharDriverState *text_console_init(DisplayState *ds, const char *p); | |
| 111 | +void console_select(unsigned int index); | |
| 112 | +void console_color_init(DisplayState *ds); | |
| 113 | + | |
| 114 | +/* sdl.c */ | |
| 115 | +void sdl_display_init(DisplayState *ds, int full_screen, int no_frame); | |
| 116 | + | |
| 117 | +/* cocoa.m */ | |
| 118 | +void cocoa_display_init(DisplayState *ds, int full_screen); | |
| 119 | + | |
| 120 | +/* vnc.c */ | |
| 121 | +void vnc_display_init(DisplayState *ds); | |
| 122 | +void vnc_display_close(DisplayState *ds); | |
| 123 | +int vnc_display_open(DisplayState *ds, const char *display); | |
| 124 | +int vnc_display_password(DisplayState *ds, const char *password); | |
| 125 | +void do_info_vnc(void); | |
| 126 | + | |
| 127 | +/* x_keymap.c */ | |
| 128 | +extern uint8_t _translate_keycode(const int key); | |
| 129 | + | |
| 130 | +/* FIXME: term_printf et al should probably go elsewhere so everything | |
| 131 | + does not need to include console.h */ | |
| 132 | +/* monitor.c */ | |
| 133 | +void monitor_init(CharDriverState *hd, int show_banner); | |
| 134 | +void term_puts(const char *str); | |
| 135 | +void term_vprintf(const char *fmt, va_list ap); | |
| 136 | +void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); | |
| 137 | +void term_print_filename(const char *filename); | |
| 138 | +void term_flush(void); | |
| 139 | +void term_print_help(void); | |
| 140 | +void monitor_readline(const char *prompt, int is_password, | |
| 141 | + char *buf, int buf_size); | |
| 142 | + | |
| 143 | +/* readline.c */ | |
| 144 | +typedef void ReadLineFunc(void *opaque, const char *str); | |
| 145 | + | |
| 146 | +extern int completion_index; | |
| 147 | +void add_completion(const char *str); | |
| 148 | +void readline_handle_byte(int ch); | |
| 149 | +void readline_find_completion(const char *cmdline); | |
| 150 | +const char *readline_get_history(unsigned int index); | |
| 151 | +void readline_start(const char *prompt, int is_password, | |
| 152 | + ReadLineFunc *readline_func, void *opaque); | |
| 153 | + | |
| 154 | +#endif | ... | ... |
cpu-defs.h
gdbstub.c
hw/acpi.c
| ... | ... | @@ -16,7 +16,13 @@ |
| 16 | 16 | * License along with this library; if not, write to the Free Software |
| 17 | 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | 18 | */ |
| 19 | -#include "vl.h" | |
| 19 | +#include "hw.h" | |
| 20 | +#include "pc.h" | |
| 21 | +#include "pci.h" | |
| 22 | +#include "qemu-timer.h" | |
| 23 | +#include "sysemu.h" | |
| 24 | +#include "i2c.h" | |
| 25 | +#include "smbus.h" | |
| 20 | 26 | |
| 21 | 27 | //#define DEBUG |
| 22 | 28 | ... | ... |
hw/adb.c
hw/adlib.c
hw/ads7846.c
hw/an5206.c
hw/apb_pci.c
hw/apic.c
| ... | ... | @@ -17,7 +17,9 @@ |
| 17 | 17 | * License along with this library; if not, write to the Free Software |
| 18 | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | 19 | */ |
| 20 | -#include "vl.h" | |
| 20 | +#include "hw.h" | |
| 21 | +#include "pc.h" | |
| 22 | +#include "qemu-timer.h" | |
| 21 | 23 | |
| 22 | 24 | //#define DEBUG_APIC |
| 23 | 25 | //#define DEBUG_IOAPIC | ... | ... |
hw/arm_pic.h renamed to hw/arm-misc.h
| 1 | 1 | /* |
| 2 | - * Generic ARM Programmable Interrupt Controller support. | |
| 2 | + * Misc ARM declarations | |
| 3 | 3 | * |
| 4 | 4 | * Copyright (c) 2006 CodeSourcery. |
| 5 | 5 | * Written by Paul Brook |
| 6 | 6 | * |
| 7 | 7 | * This code is licenced under the LGPL. |
| 8 | 8 | * |
| 9 | - * Arm hardware uses a wide variety of interrupt handling hardware. | |
| 10 | - * This provides a generic framework for connecting interrupt sources and | |
| 11 | - * inputs. | |
| 12 | 9 | */ |
| 13 | 10 | |
| 14 | -#ifndef ARM_INTERRUPT_H | |
| 15 | -#define ARM_INTERRUPT_H 1 | |
| 11 | +#ifndef ARM_MISC_H | |
| 12 | +#define ARM_MISC_H 1 | |
| 16 | 13 | |
| 17 | 14 | /* The CPU is also modeled as an interrupt controller. */ |
| 18 | 15 | #define ARM_PIC_CPU_IRQ 0 |
| 19 | 16 | #define ARM_PIC_CPU_FIQ 1 |
| 20 | 17 | qemu_irq *arm_pic_init_cpu(CPUState *env); |
| 21 | 18 | |
| 22 | -#endif /* !ARM_INTERRUPT_H */ | |
| 19 | +/* armv7m.c */ | |
| 20 | +qemu_irq *armv7m_init(int flash_size, int sram_size, | |
| 21 | + const char *kernel_filename, const char *cpu_model); | |
| 22 | + | |
| 23 | +/* arm_boot.c */ | |
| 24 | + | |
| 25 | +void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, | |
| 26 | + const char *kernel_cmdline, const char *initrd_filename, | |
| 27 | + int board_id, target_phys_addr_t loader_start); | |
| 28 | + | |
| 29 | +/* armv7m_nvic.c */ | |
| 30 | +qemu_irq *armv7m_nvic_init(CPUState *env); | |
| 31 | + | |
| 32 | +#endif /* !ARM_MISC_H */ | |
| 23 | 33 | ... | ... |
hw/arm_boot.c
hw/arm_pic.c
hw/arm_sysctl.c
hw/arm_timer.c
hw/armv7m.c
hw/armv7m_nvic.c
hw/audiodev.h
0 → 100644
hw/boards.h
0 → 100644
| 1 | +/* Declarations for use by board files for creating devices. */ | |
| 2 | + | |
| 3 | +#ifndef HW_BOARDS_H | |
| 4 | +#define HW_BOARDS_H | |
| 5 | + | |
| 6 | +typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, | |
| 7 | + const char *boot_device, | |
| 8 | + DisplayState *ds, const char **fd_filename, int snapshot, | |
| 9 | + const char *kernel_filename, const char *kernel_cmdline, | |
| 10 | + const char *initrd_filename, const char *cpu_model); | |
| 11 | + | |
| 12 | +typedef struct QEMUMachine { | |
| 13 | + const char *name; | |
| 14 | + const char *desc; | |
| 15 | + QEMUMachineInitFunc *init; | |
| 16 | + struct QEMUMachine *next; | |
| 17 | +} QEMUMachine; | |
| 18 | + | |
| 19 | +int qemu_register_machine(QEMUMachine *m); | |
| 20 | + | |
| 21 | +/* Axis ETRAX. */ | |
| 22 | +extern QEMUMachine bareetraxfs_machine; | |
| 23 | + | |
| 24 | +/* pc.c */ | |
| 25 | +extern QEMUMachine pc_machine; | |
| 26 | +extern QEMUMachine isapc_machine; | |
| 27 | + | |
| 28 | +/* ppc.c */ | |
| 29 | +extern QEMUMachine prep_machine; | |
| 30 | +extern QEMUMachine core99_machine; | |
| 31 | +extern QEMUMachine heathrow_machine; | |
| 32 | +extern QEMUMachine ref405ep_machine; | |
| 33 | +extern QEMUMachine taihu_machine; | |
| 34 | + | |
| 35 | +/* mips_r4k.c */ | |
| 36 | +extern QEMUMachine mips_machine; | |
| 37 | + | |
| 38 | +/* mips_malta.c */ | |
| 39 | +extern QEMUMachine mips_malta_machine; | |
| 40 | + | |
| 41 | +/* mips_pica61.c */ | |
| 42 | +extern QEMUMachine mips_pica61_machine; | |
| 43 | + | |
| 44 | +/* mips_mipssim.c */ | |
| 45 | +extern QEMUMachine mips_mipssim_machine; | |
| 46 | + | |
| 47 | +/* shix.c */ | |
| 48 | +extern QEMUMachine shix_machine; | |
| 49 | + | |
| 50 | +/* r2d.c */ | |
| 51 | +extern QEMUMachine r2d_machine; | |
| 52 | + | |
| 53 | +/* sun4m.c */ | |
| 54 | +extern QEMUMachine ss5_machine, ss10_machine, ss600mp_machine; | |
| 55 | + | |
| 56 | +/* sun4u.c */ | |
| 57 | +extern QEMUMachine sun4u_machine; | |
| 58 | + | |
| 59 | +/* integratorcp.c */ | |
| 60 | +extern QEMUMachine integratorcp_machine; | |
| 61 | + | |
| 62 | +/* versatilepb.c */ | |
| 63 | +extern QEMUMachine versatilepb_machine; | |
| 64 | +extern QEMUMachine versatileab_machine; | |
| 65 | + | |
| 66 | +/* realview.c */ | |
| 67 | +extern QEMUMachine realview_machine; | |
| 68 | + | |
| 69 | +/* spitz.c */ | |
| 70 | +extern QEMUMachine akitapda_machine; | |
| 71 | +extern QEMUMachine spitzpda_machine; | |
| 72 | +extern QEMUMachine borzoipda_machine; | |
| 73 | +extern QEMUMachine terrierpda_machine; | |
| 74 | + | |
| 75 | +/* palm.c */ | |
| 76 | +extern QEMUMachine palmte_machine; | |
| 77 | + | |
| 78 | +/* gumstix.c */ | |
| 79 | +extern QEMUMachine connex_machine; | |
| 80 | + | |
| 81 | +/* stellaris.c */ | |
| 82 | +extern QEMUMachine lm3s811evb_machine; | |
| 83 | +extern QEMUMachine lm3s6965evb_machine; | |
| 84 | + | |
| 85 | +/* an5206.c */ | |
| 86 | +extern QEMUMachine an5206_machine; | |
| 87 | + | |
| 88 | +/* mcf5208.c */ | |
| 89 | +extern QEMUMachine mcf5208evb_machine; | |
| 90 | + | |
| 91 | +/* dummy_m68k.c */ | |
| 92 | +extern QEMUMachine dummy_m68k_machine; | |
| 93 | + | |
| 94 | +#endif | ... | ... |
hw/cdrom.c
hw/cirrus_vga.c
hw/cs4231.c
hw/cuda.c
| ... | ... | @@ -22,8 +22,10 @@ |
| 22 | 22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 23 | 23 | * THE SOFTWARE. |
| 24 | 24 | */ |
| 25 | -#include "vl.h" | |
| 25 | +#include "hw.h" | |
| 26 | 26 | #include "ppc_mac.h" |
| 27 | +#include "qemu-timer.h" | |
| 28 | +#include "sysemu.h" | |
| 27 | 29 | |
| 28 | 30 | /* XXX: implement all timer modes */ |
| 29 | 31 | ... | ... |
hw/devices.h
0 → 100644
| 1 | +#ifndef QEMU_DEVICES_H | |
| 2 | +#define QEMU_DEVICES_H | |
| 3 | + | |
| 4 | +/* Devices that have nowhere better to go. */ | |
| 5 | + | |
| 6 | +/* smc91c111.c */ | |
| 7 | +void smc91c111_init(NICInfo *, uint32_t, qemu_irq); | |
| 8 | + | |
| 9 | +/* ssd0323.c */ | |
| 10 | +int ssd0323_xfer_ssi(void *opaque, int data); | |
| 11 | +void *ssd0323_init(DisplayState *ds, qemu_irq *cmd_p); | |
| 12 | + | |
| 13 | +/* ads7846.c */ | |
| 14 | +struct ads7846_state_s; | |
| 15 | +uint32_t ads7846_read(void *opaque); | |
| 16 | +void ads7846_write(void *opaque, uint32_t value); | |
| 17 | +struct ads7846_state_s *ads7846_init(qemu_irq penirq); | |
| 18 | + | |
| 19 | +#endif | ... | ... |
hw/dma.c
hw/ds1225y.c
hw/dummy_m68k.c
hw/ecc.c
hw/eepro100.c
hw/eeprom93xx.c
hw/eeprom93xx.h
hw/es1370.c
hw/esp.c
| ... | ... | @@ -21,7 +21,12 @@ |
| 21 | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | -#include "vl.h" | |
| 24 | +#include "hw.h" | |
| 25 | +#include "block.h" | |
| 26 | +#include "scsi-disk.h" | |
| 27 | +#include "sun4m.h" | |
| 28 | +/* FIXME: Only needed for MAX_DISKS, which is probably wrong. */ | |
| 29 | +#include "sysemu.h" | |
| 25 | 30 | |
| 26 | 31 | /* debug ESP card */ |
| 27 | 32 | //#define DEBUG_ESP | ... | ... |
hw/etraxfs.c
hw/etraxfs_ser.c
hw/etraxfs_timer.c
hw/fdc.c
| ... | ... | @@ -25,7 +25,11 @@ |
| 25 | 25 | * The controller is used in Sun4m systems in a slightly different |
| 26 | 26 | * way. There are changes in DOR register and DMA is not available. |
| 27 | 27 | */ |
| 28 | -#include "vl.h" | |
| 28 | +#include "hw.h" | |
| 29 | +#include "fdc.h" | |
| 30 | +#include "block.h" | |
| 31 | +#include "qemu-timer.h" | |
| 32 | +#include "isa.h" | |
| 29 | 33 | |
| 30 | 34 | /********************************************************/ |
| 31 | 35 | /* debug Floppy devices */ | ... | ... |
hw/fdc.h
0 → 100644
| 1 | +/* fdc.c */ | |
| 2 | +#define MAX_FD 2 | |
| 3 | +extern BlockDriverState *fd_table[MAX_FD]; | |
| 4 | + | |
| 5 | +typedef struct fdctrl_t fdctrl_t; | |
| 6 | + | |
| 7 | +fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, | |
| 8 | + target_phys_addr_t io_base, | |
| 9 | + BlockDriverState **fds); | |
| 10 | +fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base, | |
| 11 | + BlockDriverState **fds); | |
| 12 | +int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); | ... | ... |
hw/flash.h
0 → 100644
| 1 | +/* NOR flash devices */ | |
| 2 | +typedef struct pflash_t pflash_t; | |
| 3 | + | |
| 4 | +pflash_t *pflash_register (target_phys_addr_t base, ram_addr_t off, | |
| 5 | + BlockDriverState *bs, | |
| 6 | + uint32_t sector_len, int nb_blocs, int width, | |
| 7 | + uint16_t id0, uint16_t id1, | |
| 8 | + uint16_t id2, uint16_t id3); | |
| 9 | + | |
| 10 | +/* nand.c */ | |
| 11 | +struct nand_flash_s; | |
| 12 | +struct nand_flash_s *nand_init(int manf_id, int chip_id); | |
| 13 | +void nand_done(struct nand_flash_s *s); | |
| 14 | +void nand_setpins(struct nand_flash_s *s, | |
| 15 | + int cle, int ale, int ce, int wp, int gnd); | |
| 16 | +void nand_getpins(struct nand_flash_s *s, int *rb); | |
| 17 | +void nand_setio(struct nand_flash_s *s, uint8_t value); | |
| 18 | +uint8_t nand_getio(struct nand_flash_s *s); | |
| 19 | + | |
| 20 | +#define NAND_MFR_TOSHIBA 0x98 | |
| 21 | +#define NAND_MFR_SAMSUNG 0xec | |
| 22 | +#define NAND_MFR_FUJITSU 0x04 | |
| 23 | +#define NAND_MFR_NATIONAL 0x8f | |
| 24 | +#define NAND_MFR_RENESAS 0x07 | |
| 25 | +#define NAND_MFR_STMICRO 0x20 | |
| 26 | +#define NAND_MFR_HYNIX 0xad | |
| 27 | +#define NAND_MFR_MICRON 0x2c | |
| 28 | + | |
| 29 | +/* ecc.c */ | |
| 30 | +struct ecc_state_s { | |
| 31 | + uint8_t cp; /* Column parity */ | |
| 32 | + uint16_t lp[2]; /* Line parity */ | |
| 33 | + uint16_t count; | |
| 34 | +}; | |
| 35 | + | |
| 36 | +uint8_t ecc_digest(struct ecc_state_s *s, uint8_t sample); | |
| 37 | +void ecc_reset(struct ecc_state_s *s); | |
| 38 | +void ecc_put(QEMUFile *f, struct ecc_state_s *s); | |
| 39 | +void ecc_get(QEMUFile *f, struct ecc_state_s *s); | |
| 40 | + | ... | ... |
hw/grackle_pci.c
hw/gt64xxx.c
hw/gumstix.c
| ... | ... | @@ -8,7 +8,13 @@ |
| 8 | 8 | * This code is licensed under the GNU GPL v2. |
| 9 | 9 | */ |
| 10 | 10 | |
| 11 | -#include "vl.h" | |
| 11 | +#include "hw.h" | |
| 12 | +#include "pxa.h" | |
| 13 | +#include "net.h" | |
| 14 | +#include "flash.h" | |
| 15 | +#include "sysemu.h" | |
| 16 | +#include "devices.h" | |
| 17 | +#include "boards.h" | |
| 12 | 18 | |
| 13 | 19 | /* Board init. */ |
| 14 | 20 | enum gumstix_model_e { connex }; | ... | ... |
hw/heathrow_pic.c
hw/hw.h
0 → 100644
| 1 | +/* Declarations for use by hardware emulation. */ | |
| 2 | +#ifndef QEMU_HW_H | |
| 3 | +#define QEMU_HW_H | |
| 4 | + | |
| 5 | +#include "qemu-common.h" | |
| 6 | +#include "irq.h" | |
| 7 | + | |
| 8 | +/* VM Load/Save */ | |
| 9 | + | |
| 10 | +QEMUFile *qemu_fopen(const char *filename, const char *mode); | |
| 11 | +void qemu_fflush(QEMUFile *f); | |
| 12 | +void qemu_fclose(QEMUFile *f); | |
| 13 | +void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); | |
| 14 | +void qemu_put_byte(QEMUFile *f, int v); | |
| 15 | +void qemu_put_be16(QEMUFile *f, unsigned int v); | |
| 16 | +void qemu_put_be32(QEMUFile *f, unsigned int v); | |
| 17 | +void qemu_put_be64(QEMUFile *f, uint64_t v); | |
| 18 | +int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); | |
| 19 | +int qemu_get_byte(QEMUFile *f); | |
| 20 | +unsigned int qemu_get_be16(QEMUFile *f); | |
| 21 | +unsigned int qemu_get_be32(QEMUFile *f); | |
| 22 | +uint64_t qemu_get_be64(QEMUFile *f); | |
| 23 | + | |
| 24 | +static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) | |
| 25 | +{ | |
| 26 | + qemu_put_be64(f, *pv); | |
| 27 | +} | |
| 28 | + | |
| 29 | +static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) | |
| 30 | +{ | |
| 31 | + qemu_put_be32(f, *pv); | |
| 32 | +} | |
| 33 | + | |
| 34 | +static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) | |
| 35 | +{ | |
| 36 | + qemu_put_be16(f, *pv); | |
| 37 | +} | |
| 38 | + | |
| 39 | +static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) | |
| 40 | +{ | |
| 41 | + qemu_put_byte(f, *pv); | |
| 42 | +} | |
| 43 | + | |
| 44 | +static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) | |
| 45 | +{ | |
| 46 | + *pv = qemu_get_be64(f); | |
| 47 | +} | |
| 48 | + | |
| 49 | +static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) | |
| 50 | +{ | |
| 51 | + *pv = qemu_get_be32(f); | |
| 52 | +} | |
| 53 | + | |
| 54 | +static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) | |
| 55 | +{ | |
| 56 | + *pv = qemu_get_be16(f); | |
| 57 | +} | |
| 58 | + | |
| 59 | +static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) | |
| 60 | +{ | |
| 61 | + *pv = qemu_get_byte(f); | |
| 62 | +} | |
| 63 | + | |
| 64 | +#ifdef NEED_CPU_H | |
| 65 | +#if TARGET_LONG_BITS == 64 | |
| 66 | +#define qemu_put_betl qemu_put_be64 | |
| 67 | +#define qemu_get_betl qemu_get_be64 | |
| 68 | +#define qemu_put_betls qemu_put_be64s | |
| 69 | +#define qemu_get_betls qemu_get_be64s | |
| 70 | +#else | |
| 71 | +#define qemu_put_betl qemu_put_be32 | |
| 72 | +#define qemu_get_betl qemu_get_be32 | |
| 73 | +#define qemu_put_betls qemu_put_be32s | |
| 74 | +#define qemu_get_betls qemu_get_be32s | |
| 75 | +#endif | |
| 76 | +#endif | |
| 77 | + | |
| 78 | +int64_t qemu_ftell(QEMUFile *f); | |
| 79 | +int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence); | |
| 80 | + | |
| 81 | +typedef void SaveStateHandler(QEMUFile *f, void *opaque); | |
| 82 | +typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); | |
| 83 | + | |
| 84 | +int register_savevm(const char *idstr, | |
| 85 | + int instance_id, | |
| 86 | + int version_id, | |
| 87 | + SaveStateHandler *save_state, | |
| 88 | + LoadStateHandler *load_state, | |
| 89 | + void *opaque); | |
| 90 | + | |
| 91 | +typedef void QEMUResetHandler(void *opaque); | |
| 92 | + | |
| 93 | +void qemu_register_reset(QEMUResetHandler *func, void *opaque); | |
| 94 | + | |
| 95 | +/* These should really be in isa.h, but are here to make pc.h happy. */ | |
| 96 | +typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | |
| 97 | +typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); | |
| 98 | + | |
| 99 | +#endif | ... | ... |
hw/i2c.c
| ... | ... | @@ -7,7 +7,8 @@ |
| 7 | 7 | * This code is licenced under the LGPL. |
| 8 | 8 | */ |
| 9 | 9 | |
| 10 | -#include "vl.h" | |
| 10 | +#include "hw.h" | |
| 11 | +#include "i2c.h" | |
| 11 | 12 | |
| 12 | 13 | struct i2c_bus |
| 13 | 14 | { |
| ... | ... | @@ -30,7 +31,7 @@ i2c_slave *i2c_slave_init(i2c_bus *bus, int address, int size) |
| 30 | 31 | i2c_slave *dev; |
| 31 | 32 | |
| 32 | 33 | if (size < sizeof(i2c_slave)) |
| 33 | - cpu_abort(cpu_single_env, "I2C struct too small"); | |
| 34 | + hw_error("I2C struct too small"); | |
| 34 | 35 | |
| 35 | 36 | dev = (i2c_slave *)qemu_mallocz(size); |
| 36 | 37 | dev->address = address; | ... | ... |
hw/i2c.h
| ... | ... | @@ -13,8 +13,6 @@ enum i2c_event { |
| 13 | 13 | I2C_NACK /* Masker NACKed a receive byte. */ |
| 14 | 14 | }; |
| 15 | 15 | |
| 16 | -typedef struct i2c_slave i2c_slave; | |
| 17 | - | |
| 18 | 16 | /* Master to slave. */ |
| 19 | 17 | typedef int (*i2c_send_cb)(i2c_slave *s, uint8_t data); |
| 20 | 18 | /* Slave to master. */ |
| ... | ... | @@ -34,8 +32,6 @@ struct i2c_slave |
| 34 | 32 | void *next; |
| 35 | 33 | }; |
| 36 | 34 | |
| 37 | -typedef struct i2c_bus i2c_bus; | |
| 38 | - | |
| 39 | 35 | i2c_bus *i2c_init_bus(void); |
| 40 | 36 | i2c_slave *i2c_slave_init(i2c_bus *bus, int address, int size); |
| 41 | 37 | void i2c_set_slave_address(i2c_slave *dev, int address); |
| ... | ... | @@ -50,6 +46,14 @@ void i2c_bus_load(QEMUFile *f, i2c_bus *bus); |
| 50 | 46 | void i2c_slave_save(QEMUFile *f, i2c_slave *dev); |
| 51 | 47 | void i2c_slave_load(QEMUFile *f, i2c_slave *dev); |
| 52 | 48 | |
| 49 | +/* max111x.c */ | |
| 50 | +struct max111x_s; | |
| 51 | +uint32_t max111x_read(void *opaque); | |
| 52 | +void max111x_write(void *opaque, uint32_t value); | |
| 53 | +struct max111x_s *max1110_init(qemu_irq cb); | |
| 54 | +struct max111x_s *max1111_init(qemu_irq cb); | |
| 55 | +void max111x_set_input(struct max111x_s *s, int line, uint8_t value); | |
| 56 | + | |
| 53 | 57 | /* max7310.c */ |
| 54 | 58 | i2c_slave *max7310_init(i2c_bus *bus); |
| 55 | 59 | void max7310_reset(i2c_slave *i2c); |
| ... | ... | @@ -64,4 +68,7 @@ void wm8750_data_req_set(i2c_slave *i2c, |
| 64 | 68 | void wm8750_dac_dat(void *opaque, uint32_t sample); |
| 65 | 69 | uint32_t wm8750_adc_dat(void *opaque); |
| 66 | 70 | |
| 71 | +/* ssd0303.c */ | |
| 72 | +void ssd0303_init(DisplayState *ds, i2c_bus *bus, int address); | |
| 73 | + | |
| 67 | 74 | #endif | ... | ... |
hw/i8254.c
hw/i8259.c
| ... | ... | @@ -21,7 +21,10 @@ |
| 21 | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | -#include "vl.h" | |
| 24 | +#include "hw.h" | |
| 25 | +#include "pc.h" | |
| 26 | +#include "isa.h" | |
| 27 | +#include "console.h" | |
| 25 | 28 | |
| 26 | 29 | /* debug PIC */ |
| 27 | 30 | //#define DEBUG_PIC | ... | ... |
hw/ide.c
| ... | ... | @@ -22,7 +22,14 @@ |
| 22 | 22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 23 | 23 | * THE SOFTWARE. |
| 24 | 24 | */ |
| 25 | -#include "vl.h" | |
| 25 | +#include "hw.h" | |
| 26 | +#include "pc.h" | |
| 27 | +#include "pci.h" | |
| 28 | +#include "scsi-disk.h" | |
| 29 | +#include "pcmcia.h" | |
| 30 | +#include "block.h" | |
| 31 | +#include "qemu-timer.h" | |
| 32 | +#include "sysemu.h" | |
| 26 | 33 | |
| 27 | 34 | /* debug IDE devices */ |
| 28 | 35 | //#define DEBUG_IDE | ... | ... |
hw/integratorcp.c
| ... | ... | @@ -7,8 +7,13 @@ |
| 7 | 7 | * This code is licenced under the GPL |
| 8 | 8 | */ |
| 9 | 9 | |
| 10 | -#include "vl.h" | |
| 11 | -#include "arm_pic.h" | |
| 10 | +#include "hw.h" | |
| 11 | +#include "primecell.h" | |
| 12 | +#include "devices.h" | |
| 13 | +#include "sysemu.h" | |
| 14 | +#include "boards.h" | |
| 15 | +#include "arm-misc.h" | |
| 16 | +#include "net.h" | |
| 12 | 17 | |
| 13 | 18 | void DMA_run (void) |
| 14 | 19 | { | ... | ... |
hw/iommu.c
hw/irq.c
hw/irq.h
| 1 | +#ifndef QEMU_IRQ_H | |
| 2 | +#define QEMU_IRQ_H | |
| 3 | + | |
| 1 | 4 | /* Generic IRQ/GPIO pin infrastructure. */ |
| 2 | 5 | |
| 6 | +/* FIXME: Rmove one of these. */ | |
| 3 | 7 | typedef void (*qemu_irq_handler)(void *opaque, int n, int level); |
| 4 | - | |
| 5 | -typedef struct IRQState *qemu_irq; | |
| 8 | +typedef void SetIRQFunc(void *opaque, int irq_num, int level); | |
| 6 | 9 | |
| 7 | 10 | void qemu_set_irq(qemu_irq irq, int level); |
| 8 | 11 | |
| ... | ... | @@ -21,3 +24,5 @@ qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n); |
| 21 | 24 | |
| 22 | 25 | /* Returns a new IRQ with opposite polarity. */ |
| 23 | 26 | qemu_irq qemu_irq_invert(qemu_irq irq); |
| 27 | + | |
| 28 | +#endif | ... | ... |
hw/isa.h
0 → 100644
| 1 | +/* ISA bus */ | |
| 2 | + | |
| 3 | +extern target_phys_addr_t isa_mem_base; | |
| 4 | + | |
| 5 | +int register_ioport_read(int start, int length, int size, | |
| 6 | + IOPortReadFunc *func, void *opaque); | |
| 7 | +int register_ioport_write(int start, int length, int size, | |
| 8 | + IOPortWriteFunc *func, void *opaque); | |
| 9 | +void isa_unassign_ioport(int start, int length); | |
| 10 | + | |
| 11 | +void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size); | |
| 12 | + | |
| 13 | +/* dma.c */ | |
| 14 | +int DMA_get_channel_mode (int nchan); | |
| 15 | +int DMA_read_memory (int nchan, void *buf, int pos, int size); | |
| 16 | +int DMA_write_memory (int nchan, void *buf, int pos, int size); | |
| 17 | +void DMA_hold_DREQ (int nchan); | |
| 18 | +void DMA_release_DREQ (int nchan); | |
| 19 | +void DMA_schedule(int nchan); | |
| 20 | +void DMA_run (void); | |
| 21 | +void DMA_init (int high_page_enable); | |
| 22 | +void DMA_register_channel (int nchan, | |
| 23 | + DMA_transfer_handler transfer_handler, | |
| 24 | + void *opaque); | ... | ... |
hw/isa_mmio.c
hw/jazz_led.c
hw/lsi53c895a.c
hw/m48t59.c
| ... | ... | @@ -21,8 +21,11 @@ |
| 21 | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | -#include "vl.h" | |
| 25 | -#include "m48t59.h" | |
| 24 | +#include "hw.h" | |
| 25 | +#include "nvram.h" | |
| 26 | +#include "isa.h" | |
| 27 | +#include "qemu-timer.h" | |
| 28 | +#include "sysemu.h" | |
| 26 | 29 | |
| 27 | 30 | //#define DEBUG_NVRAM |
| 28 | 31 | ... | ... |
hw/m48t59.h deleted
100644 → 0
| 1 | -#if !defined (__M48T59_H__) | |
| 2 | -#define __M48T59_H__ | |
| 3 | - | |
| 4 | -typedef struct m48t59_t m48t59_t; | |
| 5 | - | |
| 6 | -void m48t59_write (void *private, uint32_t addr, uint32_t val); | |
| 7 | -uint32_t m48t59_read (void *private, uint32_t addr); | |
| 8 | -void m48t59_toggle_lock (void *private, int lock); | |
| 9 | -m48t59_t *m48t59_init (qemu_irq IRQ, target_phys_addr_t mem_base, | |
| 10 | - uint32_t io_base, uint16_t size, | |
| 11 | - int type); | |
| 12 | - | |
| 13 | -#endif /* !defined (__M48T59_H__) */ |
hw/mac_dbdma.c
hw/mac_nvram.c
hw/macio.c
| ... | ... | @@ -22,8 +22,9 @@ |
| 22 | 22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 23 | 23 | * THE SOFTWARE. |
| 24 | 24 | */ |
| 25 | -#include "vl.h" | |
| 25 | +#include "hw.h" | |
| 26 | 26 | #include "ppc_mac.h" |
| 27 | +#include "pci.h" | |
| 27 | 28 | |
| 28 | 29 | typedef struct macio_state_t macio_state_t; |
| 29 | 30 | struct macio_state_t { | ... | ... |
hw/max111x.c
hw/max7310.c
| ... | ... | @@ -7,7 +7,8 @@ |
| 7 | 7 | * This file is licensed under GNU GPL. |
| 8 | 8 | */ |
| 9 | 9 | |
| 10 | -#include "vl.h" | |
| 10 | +#include "hw.h" | |
| 11 | +#include "i2c.h" | |
| 11 | 12 | |
| 12 | 13 | struct max7310_s { |
| 13 | 14 | i2c_slave i2c; |
| ... | ... | @@ -182,7 +183,7 @@ static void max7310_gpio_set(void *opaque, int line, int level) |
| 182 | 183 | { |
| 183 | 184 | struct max7310_s *s = (struct max7310_s *) opaque; |
| 184 | 185 | if (line >= sizeof(s->handler) / sizeof(*s->handler) || line < 0) |
| 185 | - cpu_abort(cpu_single_env, "bad GPIO line"); | |
| 186 | + hw_error("bad GPIO line"); | |
| 186 | 187 | |
| 187 | 188 | if (level) |
| 188 | 189 | s->level |= s->direction & (1 << line); |
| ... | ... | @@ -220,7 +221,7 @@ void max7310_gpio_out_set(i2c_slave *i2c, int line, qemu_irq handler) |
| 220 | 221 | { |
| 221 | 222 | struct max7310_s *s = (struct max7310_s *) i2c; |
| 222 | 223 | if (line >= sizeof(s->handler) / sizeof(*s->handler) || line < 0) |
| 223 | - cpu_abort(cpu_single_env, "bad GPIO line"); | |
| 224 | + hw_error("bad GPIO line"); | |
| 224 | 225 | |
| 225 | 226 | s->handler[line] = handler; |
| 226 | 227 | } | ... | ... |
hw/mc146818rtc.c
| ... | ... | @@ -21,7 +21,11 @@ |
| 21 | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | -#include "vl.h" | |
| 24 | +#include "hw.h" | |
| 25 | +#include "qemu-timer.h" | |
| 26 | +#include "sysemu.h" | |
| 27 | +#include "pc.h" | |
| 28 | +#include "isa.h" | |
| 25 | 29 | |
| 26 | 30 | //#define DEBUG_CMOS |
| 27 | 31 | ... | ... |
hw/mcf.h
0 → 100644
| 1 | +#ifndef HW_MCF_H | |
| 2 | +#define HW_MCF_H | |
| 3 | +/* Motorola ColdFire device prototypes. */ | |
| 4 | + | |
| 5 | +/* mcf_uart.c */ | |
| 6 | +uint32_t mcf_uart_read(void *opaque, target_phys_addr_t addr); | |
| 7 | +void mcf_uart_write(void *opaque, target_phys_addr_t addr, uint32_t val); | |
| 8 | +void *mcf_uart_init(qemu_irq irq, CharDriverState *chr); | |
| 9 | +void mcf_uart_mm_init(target_phys_addr_t base, qemu_irq irq, | |
| 10 | + CharDriverState *chr); | |
| 11 | + | |
| 12 | +/* mcf_intc.c */ | |
| 13 | +qemu_irq *mcf_intc_init(target_phys_addr_t base, CPUState *env); | |
| 14 | + | |
| 15 | +/* mcf_fec.c */ | |
| 16 | +void mcf_fec_init(NICInfo *nd, target_phys_addr_t base, qemu_irq *irq); | |
| 17 | + | |
| 18 | +/* mcf5206.c */ | |
| 19 | +qemu_irq *mcf5206_init(uint32_t base, CPUState *env); | |
| 20 | + | |
| 21 | +#endif | ... | ... |
hw/mcf5206.c
hw/mcf5208.c
hw/mcf_fec.c
hw/mcf_intc.c
hw/mcf_uart.c
hw/mips.h
0 → 100644
| 1 | +#ifndef HW_MIPS_H | |
| 2 | +#define HW_MIPS_H | |
| 3 | +/* Definitions for mips board emulation. */ | |
| 4 | + | |
| 5 | +/* gt64xxx.c */ | |
| 6 | +PCIBus *pci_gt64120_init(qemu_irq *pic); | |
| 7 | + | |
| 8 | +/* ds1225y.c */ | |
| 9 | +typedef struct ds1225y_t ds1225y_t; | |
| 10 | +ds1225y_t *ds1225y_init(target_phys_addr_t mem_base, const char *filename); | |
| 11 | + | |
| 12 | +/* mipsnet.c */ | |
| 13 | +void mipsnet_init(int base, qemu_irq irq, NICInfo *nd); | |
| 14 | + | |
| 15 | +/* jazz_led.c */ | |
| 16 | +extern void jazz_led_init(DisplayState *ds, target_phys_addr_t base); | |
| 17 | + | |
| 18 | +/* mips_int.c */ | |
| 19 | +extern void cpu_mips_irq_init_cpu(CPUState *env); | |
| 20 | + | |
| 21 | +/* mips_timer.c */ | |
| 22 | +extern void cpu_mips_clock_init(CPUState *); | |
| 23 | +extern void cpu_mips_irqctrl_init (void); | |
| 24 | + | |
| 25 | +#endif | ... | ... |
hw/mips_int.c
hw/mips_malta.c
| ... | ... | @@ -22,7 +22,17 @@ |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | 24 | |
| 25 | -#include "vl.h" | |
| 25 | +#include "hw.h" | |
| 26 | +#include "pc.h" | |
| 27 | +#include "net.h" | |
| 28 | +#include "boards.h" | |
| 29 | +#include "smbus.h" | |
| 30 | +#include "mips.h" | |
| 31 | +#include "pci.h" | |
| 32 | +#include "qemu-char.h" | |
| 33 | +#include "sysemu.h" | |
| 34 | +#include "audio/audio.h" | |
| 35 | +#include "boards.h" | |
| 26 | 36 | |
| 27 | 37 | #ifdef TARGET_WORDS_BIGENDIAN |
| 28 | 38 | #define BIOS_FILENAME "mips_bios.bin" | ... | ... |
hw/mips_mipssim.c
| ... | ... | @@ -24,7 +24,13 @@ |
| 24 | 24 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 25 | 25 | * THE SOFTWARE. |
| 26 | 26 | */ |
| 27 | -#include "vl.h" | |
| 27 | +#include "hw.h" | |
| 28 | +#include "mips.h" | |
| 29 | +#include "pc.h" | |
| 30 | +#include "isa.h" | |
| 31 | +#include "net.h" | |
| 32 | +#include "sysemu.h" | |
| 33 | +#include "boards.h" | |
| 28 | 34 | |
| 29 | 35 | #ifdef TARGET_WORDS_BIGENDIAN |
| 30 | 36 | #define BIOS_FILENAME "mips_bios.bin" | ... | ... |
hw/mips_pica61.c
| ... | ... | @@ -22,7 +22,13 @@ |
| 22 | 22 | * THE SOFTWARE. |
| 23 | 23 | */ |
| 24 | 24 | |
| 25 | -#include "vl.h" | |
| 25 | +#include "hw.h" | |
| 26 | +#include "mips.h" | |
| 27 | +#include "isa.h" | |
| 28 | +#include "pc.h" | |
| 29 | +#include "fdc.h" | |
| 30 | +#include "sysemu.h" | |
| 31 | +#include "boards.h" | |
| 26 | 32 | |
| 27 | 33 | #ifdef TARGET_WORDS_BIGENDIAN |
| 28 | 34 | #define BIOS_FILENAME "mips_bios.bin" | ... | ... |
hw/mips_r4k.c
| ... | ... | @@ -7,7 +7,13 @@ |
| 7 | 7 | * All peripherial devices are attached to this "bus" with |
| 8 | 8 | * the standard PC ISA addresses. |
| 9 | 9 | */ |
| 10 | -#include "vl.h" | |
| 10 | +#include "hw.h" | |
| 11 | +#include "mips.h" | |
| 12 | +#include "pc.h" | |
| 13 | +#include "isa.h" | |
| 14 | +#include "net.h" | |
| 15 | +#include "sysemu.h" | |
| 16 | +#include "boards.h" | |
| 11 | 17 | |
| 12 | 18 | #ifdef TARGET_WORDS_BIGENDIAN |
| 13 | 19 | #define BIOS_FILENAME "mips_bios.bin" | ... | ... |
hw/mips_timer.c
hw/mipsnet.c
hw/mpcore.c
hw/nand.c
| ... | ... | @@ -11,7 +11,11 @@ |
| 11 | 11 | |
| 12 | 12 | #ifndef NAND_IO |
| 13 | 13 | |
| 14 | -# include "vl.h" | |
| 14 | +# include "hw.h" | |
| 15 | +# include "flash.h" | |
| 16 | +# include "block.h" | |
| 17 | +/* FIXME: Pass block device as an argument. */ | |
| 18 | +# include "sysemu.h" | |
| 15 | 19 | |
| 16 | 20 | # define NAND_CMD_READ0 0x00 |
| 17 | 21 | # define NAND_CMD_READ1 0x01 | ... | ... |
hw/ne2000.c
hw/nvram.h
0 → 100644
| 1 | +#ifndef NVRAM_H | |
| 2 | +#define NVRAM_H | |
| 3 | + | |
| 4 | +/* NVRAM helpers */ | |
| 5 | +typedef uint32_t (*nvram_read_t)(void *private, uint32_t addr); | |
| 6 | +typedef void (*nvram_write_t)(void *private, uint32_t addr, uint32_t val); | |
| 7 | +typedef struct nvram_t { | |
| 8 | + void *opaque; | |
| 9 | + nvram_read_t read_fn; | |
| 10 | + nvram_write_t write_fn; | |
| 11 | +} nvram_t; | |
| 12 | + | |
| 13 | +void NVRAM_set_byte (nvram_t *nvram, uint32_t addr, uint8_t value); | |
| 14 | +uint8_t NVRAM_get_byte (nvram_t *nvram, uint32_t addr); | |
| 15 | +void NVRAM_set_word (nvram_t *nvram, uint32_t addr, uint16_t value); | |
| 16 | +uint16_t NVRAM_get_word (nvram_t *nvram, uint32_t addr); | |
| 17 | +void NVRAM_set_lword (nvram_t *nvram, uint32_t addr, uint32_t value); | |
| 18 | +uint32_t NVRAM_get_lword (nvram_t *nvram, uint32_t addr); | |
| 19 | +void NVRAM_set_string (nvram_t *nvram, uint32_t addr, | |
| 20 | + const unsigned char *str, uint32_t max); | |
| 21 | +int NVRAM_get_string (nvram_t *nvram, uint8_t *dst, uint16_t addr, int max); | |
| 22 | +void NVRAM_set_crc (nvram_t *nvram, uint32_t addr, | |
| 23 | + uint32_t start, uint32_t count); | |
| 24 | +int PPC_NVRAM_set_params (nvram_t *nvram, uint16_t NVRAM_size, | |
| 25 | + const unsigned char *arch, | |
| 26 | + uint32_t RAM_size, int boot_device, | |
| 27 | + uint32_t kernel_image, uint32_t kernel_size, | |
| 28 | + const char *cmdline, | |
| 29 | + uint32_t initrd_image, uint32_t initrd_size, | |
| 30 | + uint32_t NVRAM_image, | |
| 31 | + int width, int height, int depth); | |
| 32 | +typedef struct m48t59_t m48t59_t; | |
| 33 | + | |
| 34 | +void m48t59_write (void *private, uint32_t addr, uint32_t val); | |
| 35 | +uint32_t m48t59_read (void *private, uint32_t addr); | |
| 36 | +void m48t59_toggle_lock (void *private, int lock); | |
| 37 | +m48t59_t *m48t59_init (qemu_irq IRQ, target_phys_addr_t mem_base, | |
| 38 | + uint32_t io_base, uint16_t size, | |
| 39 | + int type); | |
| 40 | + | |
| 41 | +#endif /* !NVRAM_H */ | ... | ... |
hw/omap.c
| ... | ... | @@ -18,8 +18,13 @@ |
| 18 | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 19 | 19 | * MA 02111-1307 USA |
| 20 | 20 | */ |
| 21 | -#include "vl.h" | |
| 22 | -#include "arm_pic.h" | |
| 21 | +#include "hw.h" | |
| 22 | +#include "arm-misc.h" | |
| 23 | +#include "omap.h" | |
| 24 | +#include "sysemu.h" | |
| 25 | +#include "qemu-timer.h" | |
| 26 | +/* We use pc-style serial ports. */ | |
| 27 | +#include "pc.h" | |
| 23 | 28 | |
| 24 | 29 | /* Should signal the TCMI */ |
| 25 | 30 | uint32_t omap_badwidth_read8(void *opaque, target_phys_addr_t addr) |
| ... | ... | @@ -4716,7 +4721,7 @@ struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size, |
| 4716 | 4721 | omap_dpll_init(&s->dpll[1], 0xfffed000, omap_findclk(s, "dpll2")); |
| 4717 | 4722 | omap_dpll_init(&s->dpll[2], 0xfffed100, omap_findclk(s, "dpll3")); |
| 4718 | 4723 | |
| 4719 | - s->mmc = omap_mmc_init(0xfffb7800, s->irq[1][OMAP_INT_OQN], | |
| 4724 | + s->mmc = omap_mmc_init(0xfffb7800, sd_bdrv, s->irq[1][OMAP_INT_OQN], | |
| 4720 | 4725 | &s->drq[OMAP_DMA_MMC_TX], omap_findclk(s, "mmc_ck")); |
| 4721 | 4726 | |
| 4722 | 4727 | s->mpuio = omap_mpuio_init(0xfffb5000, | ... | ... |