Commit 8706c3824f5b8f3c68db5fa39122a44b4f161e35
1 parent
afbb5194
A bunch of minor code improvements in the MIPS target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4921 c046a42c-6fe2-441c-8c8c-71466251a162
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10 additions
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21 deletions
target-mips/translate.c
| ... | ... | @@ -8175,6 +8175,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx) |
| 8175 | 8175 | #endif |
| 8176 | 8176 | break; |
| 8177 | 8177 | case OPC_MFMC0: |
| 8178 | +#ifndef CONFIG_USER_ONLY | |
| 8178 | 8179 | op2 = MASK_MFMC0(ctx->opcode); |
| 8179 | 8180 | { |
| 8180 | 8181 | TCGv t0 = tcg_temp_local_new(TCG_TYPE_TL); |
| ... | ... | @@ -8218,6 +8219,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx) |
| 8218 | 8219 | gen_store_gpr(t0, rt); |
| 8219 | 8220 | tcg_temp_free(t0); |
| 8220 | 8221 | } |
| 8222 | +#endif | |
| 8221 | 8223 | break; |
| 8222 | 8224 | case OPC_RDPGPR: |
| 8223 | 8225 | check_insn(env, ctx, ISA_MIPS32R2); |
| ... | ... | @@ -8605,9 +8607,9 @@ void gen_intermediate_code_pc (CPUState *env, struct TranslationBlock *tb) |
| 8605 | 8607 | gen_intermediate_code_internal(env, tb, 1); |
| 8606 | 8608 | } |
| 8607 | 8609 | |
| 8608 | -void fpu_dump_state(CPUState *env, FILE *f, | |
| 8609 | - int (*fpu_fprintf)(FILE *f, const char *fmt, ...), | |
| 8610 | - int flags) | |
| 8610 | +static void fpu_dump_state(CPUState *env, FILE *f, | |
| 8611 | + int (*fpu_fprintf)(FILE *f, const char *fmt, ...), | |
| 8612 | + int flags) | |
| 8611 | 8613 | { |
| 8612 | 8614 | int i; |
| 8613 | 8615 | int is_fpu64 = !!(env->hflags & MIPS_HFLAG_F64); |
| ... | ... | @@ -8640,29 +8642,16 @@ void fpu_dump_state(CPUState *env, FILE *f, |
| 8640 | 8642 | #undef printfpr |
| 8641 | 8643 | } |
| 8642 | 8644 | |
| 8643 | -void dump_fpu (CPUState *env) | |
| 8644 | -{ | |
| 8645 | - if (loglevel) { | |
| 8646 | - fprintf(logfile, | |
| 8647 | - "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx | |
| 8648 | - " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx | |
| 8649 | - " %04x\n", | |
| 8650 | - env->active_tc.PC, env->active_tc.HI[0], | |
| 8651 | - env->active_tc.LO[0], env->hflags, env->btarget, | |
| 8652 | - env->bcond); | |
| 8653 | - fpu_dump_state(env, logfile, fprintf, 0); | |
| 8654 | - } | |
| 8655 | -} | |
| 8656 | - | |
| 8657 | 8645 | #if defined(TARGET_MIPS64) && defined(MIPS_DEBUG_SIGN_EXTENSIONS) |
| 8658 | 8646 | /* Debug help: The architecture requires 32bit code to maintain proper |
| 8659 | 8647 | sign-extended values on 64bit machines. */ |
| 8660 | 8648 | |
| 8661 | 8649 | #define SIGN_EXT_P(val) ((((val) & ~0x7fffffff) == 0) || (((val) & ~0x7fffffff) == ~0x7fffffff)) |
| 8662 | 8650 | |
| 8663 | -void cpu_mips_check_sign_extensions (CPUState *env, FILE *f, | |
| 8664 | - int (*cpu_fprintf)(FILE *f, const char *fmt, ...), | |
| 8665 | - int flags) | |
| 8651 | +static void | |
| 8652 | +cpu_mips_check_sign_extensions (CPUState *env, FILE *f, | |
| 8653 | + int (*cpu_fprintf)(FILE *f, const char *fmt, ...), | |
| 8654 | + int flags) | |
| 8666 | 8655 | { |
| 8667 | 8656 | int i; |
| 8668 | 8657 | ... | ... |
target-mips/translate_init.c