Commit 8686c490f77f79273bd8c08e8d12b3250cd72ba7

Authored by bellard
1 parent 6a8d7b76

use TCG for MMX/SSE memory accesses

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4439 c046a42c-6fe2-441c-8c8c-71466251a162
target-i386/op.c
... ... @@ -423,19 +423,6 @@ void OPPROTO op_addq_A0_AL(void)
423 423  
424 424 #endif
425 425  
426   -/* memory access */
427   -
428   -#define MEMSUFFIX _raw
429   -#include "ops_mem.h"
430   -
431   -#if !defined(CONFIG_USER_ONLY)
432   -#define MEMSUFFIX _kernel
433   -#include "ops_mem.h"
434   -
435   -#define MEMSUFFIX _user
436   -#include "ops_mem.h"
437   -#endif
438   -
439 426 void OPPROTO op_hlt(void)
440 427 {
441 428 helper_hlt();
... ...
target-i386/ops_mem.h deleted 100644 → 0
1   -void OPPROTO glue(glue(op_ldub, MEMSUFFIX), _T0_A0)(void)
2   -{
3   - T0 = glue(ldub, MEMSUFFIX)(A0);
4   -}
5   -
6   -void OPPROTO glue(glue(op_ldsb, MEMSUFFIX), _T0_A0)(void)
7   -{
8   - T0 = glue(ldsb, MEMSUFFIX)(A0);
9   -}
10   -
11   -void OPPROTO glue(glue(op_lduw, MEMSUFFIX), _T0_A0)(void)
12   -{
13   - T0 = glue(lduw, MEMSUFFIX)(A0);
14   -}
15   -
16   -void OPPROTO glue(glue(op_ldsw, MEMSUFFIX), _T0_A0)(void)
17   -{
18   - T0 = glue(ldsw, MEMSUFFIX)(A0);
19   -}
20   -
21   -void OPPROTO glue(glue(op_ldl, MEMSUFFIX), _T0_A0)(void)
22   -{
23   - T0 = (uint32_t)glue(ldl, MEMSUFFIX)(A0);
24   -}
25   -
26   -void OPPROTO glue(glue(op_ldub, MEMSUFFIX), _T1_A0)(void)
27   -{
28   - T1 = glue(ldub, MEMSUFFIX)(A0);
29   -}
30   -
31   -void OPPROTO glue(glue(op_ldsb, MEMSUFFIX), _T1_A0)(void)
32   -{
33   - T1 = glue(ldsb, MEMSUFFIX)(A0);
34   -}
35   -
36   -void OPPROTO glue(glue(op_lduw, MEMSUFFIX), _T1_A0)(void)
37   -{
38   - T1 = glue(lduw, MEMSUFFIX)(A0);
39   -}
40   -
41   -void OPPROTO glue(glue(op_ldsw, MEMSUFFIX), _T1_A0)(void)
42   -{
43   - T1 = glue(ldsw, MEMSUFFIX)(A0);
44   -}
45   -
46   -void OPPROTO glue(glue(op_ldl, MEMSUFFIX), _T1_A0)(void)
47   -{
48   - T1 = (uint32_t)glue(ldl, MEMSUFFIX)(A0);
49   -}
50   -
51   -void OPPROTO glue(glue(op_stb, MEMSUFFIX), _T0_A0)(void)
52   -{
53   - glue(stb, MEMSUFFIX)(A0, T0);
54   - FORCE_RET();
55   -}
56   -
57   -void OPPROTO glue(glue(op_stw, MEMSUFFIX), _T0_A0)(void)
58   -{
59   - glue(stw, MEMSUFFIX)(A0, T0);
60   - FORCE_RET();
61   -}
62   -
63   -void OPPROTO glue(glue(op_stl, MEMSUFFIX), _T0_A0)(void)
64   -{
65   - glue(stl, MEMSUFFIX)(A0, T0);
66   - FORCE_RET();
67   -}
68   -
69   -#if 0
70   -void OPPROTO glue(glue(op_stb, MEMSUFFIX), _T1_A0)(void)
71   -{
72   - glue(stb, MEMSUFFIX)(A0, T1);
73   - FORCE_RET();
74   -}
75   -#endif
76   -
77   -void OPPROTO glue(glue(op_stw, MEMSUFFIX), _T1_A0)(void)
78   -{
79   - glue(stw, MEMSUFFIX)(A0, T1);
80   - FORCE_RET();
81   -}
82   -
83   -void OPPROTO glue(glue(op_stl, MEMSUFFIX), _T1_A0)(void)
84   -{
85   - glue(stl, MEMSUFFIX)(A0, T1);
86   - FORCE_RET();
87   -}
88   -
89   -/* SSE/MMX support */
90   -void OPPROTO glue(glue(op_ldq, MEMSUFFIX), _env_A0)(void)
91   -{
92   - uint64_t *p;
93   - p = (uint64_t *)((char *)env + PARAM1);
94   - *p = glue(ldq, MEMSUFFIX)(A0);
95   -}
96   -
97   -void OPPROTO glue(glue(op_stq, MEMSUFFIX), _env_A0)(void)
98   -{
99   - uint64_t *p;
100   - p = (uint64_t *)((char *)env + PARAM1);
101   - glue(stq, MEMSUFFIX)(A0, *p);
102   - FORCE_RET();
103   -}
104   -
105   -void OPPROTO glue(glue(op_ldo, MEMSUFFIX), _env_A0)(void)
106   -{
107   - XMMReg *p;
108   - p = (XMMReg *)((char *)env + PARAM1);
109   - p->XMM_Q(0) = glue(ldq, MEMSUFFIX)(A0);
110   - p->XMM_Q(1) = glue(ldq, MEMSUFFIX)(A0 + 8);
111   -}
112   -
113   -void OPPROTO glue(glue(op_sto, MEMSUFFIX), _env_A0)(void)
114   -{
115   - XMMReg *p;
116   - p = (XMMReg *)((char *)env + PARAM1);
117   - glue(stq, MEMSUFFIX)(A0, p->XMM_Q(0));
118   - glue(stq, MEMSUFFIX)(A0 + 8, p->XMM_Q(1));
119   - FORCE_RET();
120   -}
121   -
122   -#ifdef TARGET_X86_64
123   -void OPPROTO glue(glue(op_ldsl, MEMSUFFIX), _T0_A0)(void)
124   -{
125   - T0 = (int32_t)glue(ldl, MEMSUFFIX)(A0);
126   -}
127   -
128   -void OPPROTO glue(glue(op_ldsl, MEMSUFFIX), _T1_A0)(void)
129   -{
130   - T1 = (int32_t)glue(ldl, MEMSUFFIX)(A0);
131   -}
132   -
133   -void OPPROTO glue(glue(op_ldq, MEMSUFFIX), _T0_A0)(void)
134   -{
135   - T0 = glue(ldq, MEMSUFFIX)(A0);
136   -}
137   -
138   -void OPPROTO glue(glue(op_ldq, MEMSUFFIX), _T1_A0)(void)
139   -{
140   - T1 = glue(ldq, MEMSUFFIX)(A0);
141   -}
142   -
143   -void OPPROTO glue(glue(op_stq, MEMSUFFIX), _T0_A0)(void)
144   -{
145   - glue(stq, MEMSUFFIX)(A0, T0);
146   - FORCE_RET();
147   -}
148   -
149   -void OPPROTO glue(glue(op_stq, MEMSUFFIX), _T1_A0)(void)
150   -{
151   - glue(stq, MEMSUFFIX)(A0, T1);
152   - FORCE_RET();
153   -}
154   -#endif
155   -
156   -#undef MEMSUFFIX
target-i386/translate.c
... ... @@ -60,7 +60,7 @@
60 60 /* global register indexes */
61 61 static TCGv cpu_env, cpu_T[2], cpu_A0;
62 62 /* local register indexes (only used inside old micro ops) */
63   -static TCGv cpu_tmp0;
  63 +static TCGv cpu_tmp0, cpu_tmp1;
64 64  
65 65 #ifdef TARGET_X86_64
66 66 static int x86_64_hregs;
... ... @@ -2376,37 +2376,39 @@ static void gen_jmp(DisasContext *s, target_ulong eip)
2376 2376 gen_jmp_tb(s, eip, 0);
2377 2377 }
2378 2378  
2379   -static GenOpFunc1 *gen_ldq_env_A0[3] = {
2380   - gen_op_ldq_raw_env_A0,
2381   -#ifndef CONFIG_USER_ONLY
2382   - gen_op_ldq_kernel_env_A0,
2383   - gen_op_ldq_user_env_A0,
2384   -#endif
2385   -};
  2379 +static inline void gen_ldq_env_A0(int idx, int offset)
  2380 +{
  2381 + int mem_index = (idx >> 2) - 1;
  2382 + tcg_gen_qemu_ld64(cpu_tmp1, cpu_A0, mem_index);
  2383 + tcg_gen_st_i64(cpu_tmp1, cpu_env, offset);
  2384 +}
2386 2385  
2387   -static GenOpFunc1 *gen_stq_env_A0[3] = {
2388   - gen_op_stq_raw_env_A0,
2389   -#ifndef CONFIG_USER_ONLY
2390   - gen_op_stq_kernel_env_A0,
2391   - gen_op_stq_user_env_A0,
2392   -#endif
2393   -};
  2386 +static inline void gen_stq_env_A0(int idx, int offset)
  2387 +{
  2388 + int mem_index = (idx >> 2) - 1;
  2389 + tcg_gen_ld_i64(cpu_tmp1, cpu_env, offset);
  2390 + tcg_gen_qemu_st64(cpu_tmp1, cpu_A0, mem_index);
  2391 +}
2394 2392  
2395   -static GenOpFunc1 *gen_ldo_env_A0[3] = {
2396   - gen_op_ldo_raw_env_A0,
2397   -#ifndef CONFIG_USER_ONLY
2398   - gen_op_ldo_kernel_env_A0,
2399   - gen_op_ldo_user_env_A0,
2400   -#endif
2401   -};
  2393 +static inline void gen_ldo_env_A0(int idx, int offset)
  2394 +{
  2395 + int mem_index = (idx >> 2) - 1;
  2396 + tcg_gen_qemu_ld64(cpu_tmp1, cpu_A0, mem_index);
  2397 + tcg_gen_st_i64(cpu_tmp1, cpu_env, offset + offsetof(XMMReg, XMM_Q(0)));
  2398 + tcg_gen_addi_tl(cpu_tmp0, cpu_A0, 8);
  2399 + tcg_gen_qemu_ld64(cpu_tmp1, cpu_tmp0, mem_index);
  2400 + tcg_gen_st_i64(cpu_tmp1, cpu_env, offset + offsetof(XMMReg, XMM_Q(1)));
  2401 +}
2402 2402  
2403   -static GenOpFunc1 *gen_sto_env_A0[3] = {
2404   - gen_op_sto_raw_env_A0,
2405   -#ifndef CONFIG_USER_ONLY
2406   - gen_op_sto_kernel_env_A0,
2407   - gen_op_sto_user_env_A0,
2408   -#endif
2409   -};
  2403 +static inline void gen_sto_env_A0(int idx, int offset)
  2404 +{
  2405 + int mem_index = (idx >> 2) - 1;
  2406 + tcg_gen_ld_i64(cpu_tmp1, cpu_env, offset + offsetof(XMMReg, XMM_Q(0)));
  2407 + tcg_gen_qemu_st64(cpu_tmp1, cpu_A0, mem_index);
  2408 + tcg_gen_addi_tl(cpu_tmp0, cpu_A0, 8);
  2409 + tcg_gen_ld_i64(cpu_tmp1, cpu_env, offset + offsetof(XMMReg, XMM_Q(1)));
  2410 + tcg_gen_qemu_st64(cpu_tmp1, cpu_tmp0, mem_index);
  2411 +}
2410 2412  
2411 2413 #define SSE_SPECIAL ((GenOpFunc2 *)1)
2412 2414 #define SSE_DUMMY ((GenOpFunc2 *)2)
... ... @@ -2680,7 +2682,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2680 2682 if (mod == 3)
2681 2683 goto illegal_op;
2682 2684 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2683   - gen_stq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,fpregs[reg].mmx));
  2685 + gen_stq_env_A0(s->mem_index, offsetof(CPUX86State,fpregs[reg].mmx));
2684 2686 break;
2685 2687 case 0x1e7: /* movntdq */
2686 2688 case 0x02b: /* movntps */
... ... @@ -2689,7 +2691,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2689 2691 if (mod == 3)
2690 2692 goto illegal_op;
2691 2693 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2692   - gen_sto_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg]));
  2694 + gen_sto_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg]));
2693 2695 break;
2694 2696 case 0x6e: /* movd mm, ea */
2695 2697 #ifdef TARGET_X86_64
... ... @@ -2718,7 +2720,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2718 2720 case 0x6f: /* movq mm, ea */
2719 2721 if (mod != 3) {
2720 2722 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2721   - gen_ldq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,fpregs[reg].mmx));
  2723 + gen_ldq_env_A0(s->mem_index, offsetof(CPUX86State,fpregs[reg].mmx));
2722 2724 } else {
2723 2725 rm = (modrm & 7);
2724 2726 gen_op_movq(offsetof(CPUX86State,fpregs[reg].mmx),
... ... @@ -2733,7 +2735,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2733 2735 case 0x26f: /* movdqu xmm, ea */
2734 2736 if (mod != 3) {
2735 2737 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2736   - gen_ldo_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg]));
  2738 + gen_ldo_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg]));
2737 2739 } else {
2738 2740 rm = (modrm & 7) | REX_B(s);
2739 2741 gen_op_movo(offsetof(CPUX86State,xmm_regs[reg]),
... ... @@ -2758,7 +2760,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2758 2760 case 0x310: /* movsd xmm, ea */
2759 2761 if (mod != 3) {
2760 2762 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2761   - gen_ldq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
  2763 + gen_ldq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
2762 2764 gen_op_movl_T0_0();
2763 2765 gen_op_movl_env_T0(offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)));
2764 2766 gen_op_movl_env_T0(offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)));
... ... @@ -2772,7 +2774,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2772 2774 case 0x112: /* movlpd */
2773 2775 if (mod != 3) {
2774 2776 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2775   - gen_ldq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
  2777 + gen_ldq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
2776 2778 } else {
2777 2779 /* movhlps */
2778 2780 rm = (modrm & 7) | REX_B(s);
... ... @@ -2783,7 +2785,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2783 2785 case 0x212: /* movsldup */
2784 2786 if (mod != 3) {
2785 2787 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2786   - gen_ldo_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg]));
  2788 + gen_ldo_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg]));
2787 2789 } else {
2788 2790 rm = (modrm & 7) | REX_B(s);
2789 2791 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)),
... ... @@ -2799,7 +2801,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2799 2801 case 0x312: /* movddup */
2800 2802 if (mod != 3) {
2801 2803 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2802   - gen_ldq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
  2804 + gen_ldq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
2803 2805 } else {
2804 2806 rm = (modrm & 7) | REX_B(s);
2805 2807 gen_op_movq(offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)),
... ... @@ -2812,7 +2814,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2812 2814 case 0x116: /* movhpd */
2813 2815 if (mod != 3) {
2814 2816 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2815   - gen_ldq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg].XMM_Q(1)));
  2817 + gen_ldq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg].XMM_Q(1)));
2816 2818 } else {
2817 2819 /* movlhps */
2818 2820 rm = (modrm & 7) | REX_B(s);
... ... @@ -2823,7 +2825,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2823 2825 case 0x216: /* movshdup */
2824 2826 if (mod != 3) {
2825 2827 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2826   - gen_ldo_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg]));
  2828 + gen_ldo_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg]));
2827 2829 } else {
2828 2830 rm = (modrm & 7) | REX_B(s);
2829 2831 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(1)),
... ... @@ -2863,7 +2865,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2863 2865 case 0x27e: /* movq xmm, ea */
2864 2866 if (mod != 3) {
2865 2867 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2866   - gen_ldq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
  2868 + gen_ldq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
2867 2869 } else {
2868 2870 rm = (modrm & 7) | REX_B(s);
2869 2871 gen_op_movq(offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)),
... ... @@ -2874,7 +2876,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2874 2876 case 0x7f: /* movq ea, mm */
2875 2877 if (mod != 3) {
2876 2878 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2877   - gen_stq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,fpregs[reg].mmx));
  2879 + gen_stq_env_A0(s->mem_index, offsetof(CPUX86State,fpregs[reg].mmx));
2878 2880 } else {
2879 2881 rm = (modrm & 7);
2880 2882 gen_op_movq(offsetof(CPUX86State,fpregs[rm].mmx),
... ... @@ -2889,7 +2891,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2889 2891 case 0x27f: /* movdqu ea, xmm */
2890 2892 if (mod != 3) {
2891 2893 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2892   - gen_sto_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg]));
  2894 + gen_sto_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg]));
2893 2895 } else {
2894 2896 rm = (modrm & 7) | REX_B(s);
2895 2897 gen_op_movo(offsetof(CPUX86State,xmm_regs[rm]),
... ... @@ -2910,7 +2912,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2910 2912 case 0x311: /* movsd ea, xmm */
2911 2913 if (mod != 3) {
2912 2914 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2913   - gen_stq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
  2915 + gen_stq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
2914 2916 } else {
2915 2917 rm = (modrm & 7) | REX_B(s);
2916 2918 gen_op_movq(offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)),
... ... @@ -2921,7 +2923,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2921 2923 case 0x113: /* movlpd */
2922 2924 if (mod != 3) {
2923 2925 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2924   - gen_stq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
  2926 + gen_stq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
2925 2927 } else {
2926 2928 goto illegal_op;
2927 2929 }
... ... @@ -2930,7 +2932,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2930 2932 case 0x117: /* movhpd */
2931 2933 if (mod != 3) {
2932 2934 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2933   - gen_stq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg].XMM_Q(1)));
  2935 + gen_stq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg].XMM_Q(1)));
2934 2936 } else {
2935 2937 goto illegal_op;
2936 2938 }
... ... @@ -2983,7 +2985,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2983 2985 if (mod != 3) {
2984 2986 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2985 2987 op2_offset = offsetof(CPUX86State,mmx_t0);
2986   - gen_ldq_env_A0[s->mem_index >> 2](op2_offset);
  2988 + gen_ldq_env_A0(s->mem_index, op2_offset);
2987 2989 } else {
2988 2990 rm = (modrm & 7);
2989 2991 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
... ... @@ -3014,7 +3016,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
3014 3016 if (mod != 3) {
3015 3017 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
3016 3018 op2_offset = offsetof(CPUX86State,xmm_t0);
3017   - gen_ldo_env_A0[s->mem_index >> 2](op2_offset);
  3019 + gen_ldo_env_A0(s->mem_index, op2_offset);
3018 3020 } else {
3019 3021 rm = (modrm & 7) | REX_B(s);
3020 3022 op2_offset = offsetof(CPUX86State,xmm_regs[rm]);
... ... @@ -3043,7 +3045,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
3043 3045 if (mod != 3) {
3044 3046 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
3045 3047 if ((b >> 8) & 1) {
3046   - gen_ldq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_t0.XMM_Q(0)));
  3048 + gen_ldq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_t0.XMM_Q(0)));
3047 3049 } else {
3048 3050 gen_op_ld_T0_A0(OT_LONG + s->mem_index);
3049 3051 gen_op_movl_env_T0(offsetof(CPUX86State,xmm_t0.XMM_L(0)));
... ... @@ -3090,7 +3092,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
3090 3092 case 0x1d6: /* movq ea, xmm */
3091 3093 if (mod != 3) {
3092 3094 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
3093   - gen_stq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
  3095 + gen_stq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
3094 3096 } else {
3095 3097 rm = (modrm & 7) | REX_B(s);
3096 3098 gen_op_movq(offsetof(CPUX86State,xmm_regs[rm].XMM_Q(0)),
... ... @@ -3169,10 +3171,10 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
3169 3171 gen_op_movl_env_T0(offsetof(CPUX86State,xmm_t0.XMM_L(0)));
3170 3172 } else {
3171 3173 /* 64 bit access */
3172   - gen_ldq_env_A0[s->mem_index >> 2](offsetof(CPUX86State,xmm_t0.XMM_D(0)));
  3174 + gen_ldq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_t0.XMM_D(0)));
3173 3175 }
3174 3176 } else {
3175   - gen_ldo_env_A0[s->mem_index >> 2](op2_offset);
  3177 + gen_ldo_env_A0(s->mem_index, op2_offset);
3176 3178 }
3177 3179 } else {
3178 3180 rm = (modrm & 7) | REX_B(s);
... ... @@ -3183,7 +3185,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
3183 3185 if (mod != 3) {
3184 3186 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
3185 3187 op2_offset = offsetof(CPUX86State,mmx_t0);
3186   - gen_ldq_env_A0[s->mem_index >> 2](op2_offset);
  3188 + gen_ldq_env_A0(s->mem_index, op2_offset);
3187 3189 } else {
3188 3190 rm = (modrm & 7);
3189 3191 op2_offset = offsetof(CPUX86State,fpregs[rm].mmx);
... ... @@ -6689,6 +6691,7 @@ void optimize_flags_init(void)
6689 6691 cpu_T[0] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG1, "T0");
6690 6692 cpu_T[1] = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG2, "T1");
6691 6693 cpu_A0 = tcg_global_reg_new(TCG_TYPE_TL, TCG_AREG3, "A0");
  6694 + cpu_tmp1 = tcg_global_reg2_new_hack(TCG_TYPE_I64, TCG_AREG1, TCG_AREG2, "tmp1");
6692 6695 #endif
6693 6696 /* the helpers are only registered to print debug info */
6694 6697 TCG_HELPER(helper_divl_EAX_T0);
... ... @@ -6786,6 +6789,9 @@ static inline int gen_intermediate_code_internal(CPUState *env,
6786 6789 #endif
6787 6790  
6788 6791 cpu_tmp0 = tcg_temp_new(TCG_TYPE_TL);
  6792 +#if TARGET_LONG_BITS > HOST_LONG_BITS
  6793 + cpu_tmp1 = tcg_temp_new(TCG_TYPE_I64);
  6794 +#endif
6789 6795  
6790 6796 gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
6791 6797  
... ...