Commit 833ed38689cca2b024f7952269f17d7bf2ab6de4
1 parent
f3d8b1eb
[sh4] sleep instruction
This patch adds sleep instruction. (Shin-ichiro KAWASAKI) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5065 c046a42c-6fe2-441c-8c8c-71466251a162
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5 changed files
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17 additions
and
2 deletions
target-sh4/cpu.h
@@ -117,6 +117,7 @@ typedef struct CPUSH4State { | @@ -117,6 +117,7 @@ typedef struct CPUSH4State { | ||
117 | CPU_COMMON tlb_t utlb[UTLB_SIZE]; /* unified translation table */ | 117 | CPU_COMMON tlb_t utlb[UTLB_SIZE]; /* unified translation table */ |
118 | tlb_t itlb[ITLB_SIZE]; /* instruction translation table */ | 118 | tlb_t itlb[ITLB_SIZE]; /* instruction translation table */ |
119 | void *intc_handle; | 119 | void *intc_handle; |
120 | + int intr_at_halt; /* SR_BL ignored during sleep */ | ||
120 | } CPUSH4State; | 121 | } CPUSH4State; |
121 | 122 | ||
122 | CPUSH4State *cpu_sh4_init(const char *cpu_model); | 123 | CPUSH4State *cpu_sh4_init(const char *cpu_model); |
target-sh4/exec.h
@@ -41,6 +41,7 @@ static inline int cpu_halted(CPUState *env) { | @@ -41,6 +41,7 @@ static inline int cpu_halted(CPUState *env) { | ||
41 | return 0; | 41 | return 0; |
42 | if (env->interrupt_request & CPU_INTERRUPT_HARD) { | 42 | if (env->interrupt_request & CPU_INTERRUPT_HARD) { |
43 | env->halted = 0; | 43 | env->halted = 0; |
44 | + env->intr_at_halt = 1; | ||
44 | return 0; | 45 | return 0; |
45 | } | 46 | } |
46 | return EXCP_HALTED; | 47 | return EXCP_HALTED; |
target-sh4/helper.c
@@ -87,9 +87,10 @@ void do_interrupt(CPUState * env) | @@ -87,9 +87,10 @@ void do_interrupt(CPUState * env) | ||
87 | if (do_exp && env->exception_index != 0x1e0) { | 87 | if (do_exp && env->exception_index != 0x1e0) { |
88 | env->exception_index = 0x000; /* masked exception -> reset */ | 88 | env->exception_index = 0x000; /* masked exception -> reset */ |
89 | } | 89 | } |
90 | - if (do_irq) { | 90 | + if (do_irq && !env->intr_at_halt) { |
91 | return; /* masked */ | 91 | return; /* masked */ |
92 | } | 92 | } |
93 | + env->intr_at_halt = 0; | ||
93 | } | 94 | } |
94 | 95 | ||
95 | if (do_irq) { | 96 | if (do_irq) { |
target-sh4/op.c
@@ -1091,6 +1091,13 @@ void OPPROTO op_debug(void) | @@ -1091,6 +1091,13 @@ void OPPROTO op_debug(void) | ||
1091 | cpu_loop_exit(); | 1091 | cpu_loop_exit(); |
1092 | } | 1092 | } |
1093 | 1093 | ||
1094 | +void OPPROTO op_sleep(void) | ||
1095 | +{ | ||
1096 | + env->halted = 1; | ||
1097 | + env->exception_index = EXCP_HLT; | ||
1098 | + cpu_loop_exit(); | ||
1099 | +} | ||
1100 | + | ||
1094 | /* Load and store */ | 1101 | /* Load and store */ |
1095 | #define MEMSUFFIX _raw | 1102 | #define MEMSUFFIX _raw |
1096 | #include "op_mem.c" | 1103 | #include "op_mem.c" |
target-sh4/translate.c
@@ -298,7 +298,12 @@ void _decode_opc(DisasContext * ctx) | @@ -298,7 +298,12 @@ void _decode_opc(DisasContext * ctx) | ||
298 | case 0x0009: /* nop */ | 298 | case 0x0009: /* nop */ |
299 | return; | 299 | return; |
300 | case 0x001b: /* sleep */ | 300 | case 0x001b: /* sleep */ |
301 | - assert(0); /* XXXXX */ | 301 | + if (ctx->memidx) { |
302 | + gen_op_sleep(); | ||
303 | + } else { | ||
304 | + gen_op_raise_illegal_instruction(); | ||
305 | + ctx->bstate = BS_EXCP; | ||
306 | + } | ||
302 | return; | 307 | return; |
303 | } | 308 | } |
304 | 309 |