Commit 82f2cfc31b0189c7b9d88af49e5a2b8c9a335c3e
Committed by
Blue Swirl
1 parent
c0c440f3
sparc64 fix TLB match code
TLB match code must respect page size, otherwise 4M page mappings may be not found. Also correct a typo in get_physical_address_code which should use IMMU registers. Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> -- Kind regards, Igor V. Kovalenko
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1 changed file
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7 additions
and
7 deletions
target-sparc/helper.c
| ... | ... | @@ -404,7 +404,7 @@ static int get_physical_address_data(CPUState *env, |
| 404 | 404 | } |
| 405 | 405 | // ctx match, vaddr match, valid? |
| 406 | 406 | if (env->dmmuregs[1] == (env->dtlb_tag[i] & 0x1fff) && |
| 407 | - (address & mask) == (env->dtlb_tag[i] & ~0x1fffULL) && | |
| 407 | + (address & mask) == (env->dtlb_tag[i] & mask) && | |
| 408 | 408 | (env->dtlb_tte[i] & 0x8000000000000000ULL)) { |
| 409 | 409 | // access ok? |
| 410 | 410 | if (((env->dtlb_tte[i] & 0x4) && is_user) || |
| ... | ... | @@ -420,8 +420,8 @@ static int get_physical_address_data(CPUState *env, |
| 420 | 420 | #endif |
| 421 | 421 | return 1; |
| 422 | 422 | } |
| 423 | - *physical = (env->dtlb_tte[i] & mask & 0x1fffffff000ULL) + | |
| 424 | - (address & ~mask & 0x1fffffff000ULL); | |
| 423 | + *physical = ((env->dtlb_tte[i] & mask) | (address & ~mask)) & | |
| 424 | + 0x1ffffffe000ULL; | |
| 425 | 425 | *prot = PAGE_READ; |
| 426 | 426 | if (env->dtlb_tte[i] & 0x2) |
| 427 | 427 | *prot |= PAGE_WRITE; |
| ... | ... | @@ -467,7 +467,7 @@ static int get_physical_address_code(CPUState *env, |
| 467 | 467 | } |
| 468 | 468 | // ctx match, vaddr match, valid? |
| 469 | 469 | if (env->dmmuregs[1] == (env->itlb_tag[i] & 0x1fff) && |
| 470 | - (address & mask) == (env->itlb_tag[i] & ~0x1fffULL) && | |
| 470 | + (address & mask) == (env->itlb_tag[i] & mask) && | |
| 471 | 471 | (env->itlb_tte[i] & 0x8000000000000000ULL)) { |
| 472 | 472 | // access ok? |
| 473 | 473 | if ((env->itlb_tte[i] & 0x4) && is_user) { |
| ... | ... | @@ -481,8 +481,8 @@ static int get_physical_address_code(CPUState *env, |
| 481 | 481 | #endif |
| 482 | 482 | return 1; |
| 483 | 483 | } |
| 484 | - *physical = (env->itlb_tte[i] & mask & 0x1fffffff000ULL) + | |
| 485 | - (address & ~mask & 0x1fffffff000ULL); | |
| 484 | + *physical = ((env->itlb_tte[i] & mask) | (address & ~mask)) & | |
| 485 | + 0x1ffffffe000ULL; | |
| 486 | 486 | *prot = PAGE_EXEC; |
| 487 | 487 | return 0; |
| 488 | 488 | } |
| ... | ... | @@ -490,7 +490,7 @@ static int get_physical_address_code(CPUState *env, |
| 490 | 490 | #ifdef DEBUG_MMU |
| 491 | 491 | printf("TMISS at 0x%" PRIx64 "\n", address); |
| 492 | 492 | #endif |
| 493 | - env->immuregs[6] = (address & ~0x1fffULL) | (env->dmmuregs[1] & 0x1fff); | |
| 493 | + env->immuregs[6] = (address & ~0x1fffULL) | (env->immuregs[1] & 0x1fff); | |
| 494 | 494 | env->exception_index = TT_TMISS; |
| 495 | 495 | return 1; |
| 496 | 496 | } | ... | ... |