gwj / at91sam9263 · Commits

Commit 8294eba18726b897c6a497b36ecd74a793f90523

Authored by ths
1 parent ee999a88

SPARC host fixes, by Ben Taylor. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 3 changed files with 2 additions and 35 deletions
target-arm/exec.h
  View file @8294eba
@@ -17,19 +17,13 @@ @@ -17,19 +17,13 @@
17 * License along with this library; if not, write to the Free Software 17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
  20 +#include "config.h"
20 #include "dyngen-exec.h" 21 #include "dyngen-exec.h"
21 22
22 -#if defined(__sparc__)  
23 -struct CPUARMState *env;  
24 -uint32_t T0;  
25 -uint32_t T1;  
26 -uint32_t T2;  
27 -#else  
28 register struct CPUARMState *env asm(AREG0); 23 register struct CPUARMState *env asm(AREG0);
29 register uint32_t T0 asm(AREG1); 24 register uint32_t T0 asm(AREG1);
30 register uint32_t T1 asm(AREG2); 25 register uint32_t T1 asm(AREG2);
31 register uint32_t T2 asm(AREG3); 26 register uint32_t T2 asm(AREG3);
32 -#endif  
33 27
34 /* TODO: Put these in FP regs on targets that have such things. */ 28 /* TODO: Put these in FP regs on targets that have such things. */
35 /* It is ok for FT0s and FT0d to overlap. Likewise FT1s and FT1d. */ 29 /* It is ok for FT0s and FT0d to overlap. Likewise FT1s and FT1d. */
target-mips/exec.h
  View file @8294eba
@@ -7,11 +7,7 @@ @@ -7,11 +7,7 @@
7 #include "mips-defs.h" 7 #include "mips-defs.h"
8 #include "dyngen-exec.h" 8 #include "dyngen-exec.h"
9 9
10 -#if defined(__sparc__)  
11 -struct CPUMIPSState *env;  
12 -#else  
13 register struct CPUMIPSState *env asm(AREG0); 10 register struct CPUMIPSState *env asm(AREG0);
14 -#endif  
15 11
16 #if defined (USE_64BITS_REGS) 12 #if defined (USE_64BITS_REGS)
17 typedef int64_t host_int_t; 13 typedef int64_t host_int_t;
@@ -21,11 +17,6 @@ typedef int32_t host_int_t; @@ -21,11 +17,6 @@ typedef int32_t host_int_t;
21 typedef uint32_t host_uint_t; 17 typedef uint32_t host_uint_t;
22 #endif 18 #endif
23 19
24 -#if defined(__sparc__)  
25 -host_uint_t T0;  
26 -host_uint_t T1;  
27 -host_uint_t T2;  
28 -#else  
29 #if TARGET_LONG_BITS > HOST_LONG_BITS 20 #if TARGET_LONG_BITS > HOST_LONG_BITS
30 #define T0 (env->t0) 21 #define T0 (env->t0)
31 #define T1 (env->t1) 22 #define T1 (env->t1)
@@ -35,7 +26,6 @@ register host_uint_t T0 asm(AREG1); @@ -35,7 +26,6 @@ register host_uint_t T0 asm(AREG1);
35 register host_uint_t T1 asm(AREG2); 26 register host_uint_t T1 asm(AREG2);
36 register host_uint_t T2 asm(AREG3); 27 register host_uint_t T2 asm(AREG3);
37 #endif 28 #endif
38 -#endif  
39 29
40 #if defined (USE_HOST_FLOAT_REGS) 30 #if defined (USE_HOST_FLOAT_REGS)
41 #error "implement me." 31 #error "implement me."
target-sparc/exec.h
  View file @8294eba
1 #ifndef EXEC_SPARC_H 1 #ifndef EXEC_SPARC_H
2 #define EXEC_SPARC_H 1 2 #define EXEC_SPARC_H 1
3 -#include "dyngen-exec.h"  
4 #include "config.h" 3 #include "config.h"
  4 +#include "dyngen-exec.h"
5 5
6 -#if defined(__sparc__)  
7 -struct CPUSPARCState *env;  
8 -#else  
9 register struct CPUSPARCState *env asm(AREG0); 6 register struct CPUSPARCState *env asm(AREG0);
10 -#endif  
11 7
12 #ifdef TARGET_SPARC64 8 #ifdef TARGET_SPARC64
13 #define T0 (env->t0) 9 #define T0 (env->t0)
@@ -15,13 +11,8 @@ register struct CPUSPARCState *env asm(AREG0); @@ -15,13 +11,8 @@ register struct CPUSPARCState *env asm(AREG0);
15 #define T2 (env->t2) 11 #define T2 (env->t2)
16 #define REGWPTR env->regwptr 12 #define REGWPTR env->regwptr
17 #else 13 #else
18 -#if defined(__sparc__)  
19 -register uint32_t T0 asm(AREG3);  
20 -register uint32_t T1 asm(AREG2);  
21 -#else  
22 register uint32_t T0 asm(AREG1); 14 register uint32_t T0 asm(AREG1);
23 register uint32_t T1 asm(AREG2); 15 register uint32_t T1 asm(AREG2);
24 -#endif  
25 16
26 #undef REG_REGWPTR // Broken 17 #undef REG_REGWPTR // Broken
27 #ifdef REG_REGWPTR 18 #ifdef REG_REGWPTR
@@ -33,11 +24,7 @@ register uint32_t *REGWPTR asm(AREG3); @@ -33,11 +24,7 @@ register uint32_t *REGWPTR asm(AREG3);
33 #define reg_REGWPTR 24 #define reg_REGWPTR
34 25
35 #ifdef AREG4 26 #ifdef AREG4
36 -#if defined(__sparc__)  
37 -register uint32_t T2 asm(AREG0);  
38 -#else  
39 register uint32_t T2 asm(AREG4); 27 register uint32_t T2 asm(AREG4);
40 -#endif  
41 #define reg_T2 28 #define reg_T2
42 #else 29 #else
43 #define T2 (env->t2) 30 #define T2 (env->t2)
@@ -45,14 +32,10 @@ register uint32_t T2 asm(AREG4); @@ -45,14 +32,10 @@ register uint32_t T2 asm(AREG4);
45 32
46 #else 33 #else
47 #define REGWPTR env->regwptr 34 #define REGWPTR env->regwptr
48 -#if defined(__sparc__)  
49 -register uint32_t T2 asm(AREG0);  
50 -#else  
51 register uint32_t T2 asm(AREG3); 35 register uint32_t T2 asm(AREG3);
52 #endif 36 #endif
53 #define reg_T2 37 #define reg_T2
54 #endif 38 #endif
55 -#endif  
56 39
57 #define FT0 (env->ft0) 40 #define FT0 (env->ft0)
58 #define FT1 (env->ft1) 41 #define FT1 (env->ft1)