Commit 821f7e76100f71d9ad104be9d1e12835e201ce80
1 parent
5fc4adf6
Implement ColdFire ff1.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2883 c046a42c-6fe2-441c-8c8c-71466251a162
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14 additions
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1 deletions
target-m68k/op.c
| ... | ... | @@ -170,6 +170,16 @@ OP(btest) |
| 170 | 170 | FORCE_RET(); |
| 171 | 171 | } |
| 172 | 172 | |
| 173 | +OP(ff1) | |
| 174 | +{ | |
| 175 | + uint32_t arg = get_op(PARAM2); | |
| 176 | + int n; | |
| 177 | + for (n = 32; arg; n--) | |
| 178 | + arg >>= 1; | |
| 179 | + set_op(PARAM1, n); | |
| 180 | + FORCE_RET(); | |
| 181 | +} | |
| 182 | + | |
| 173 | 183 | OP(subx_cc) |
| 174 | 184 | { |
| 175 | 185 | uint32_t op1 = get_op(PARAM1); | ... | ... |
target-m68k/translate.c
| ... | ... | @@ -1929,7 +1929,10 @@ DISAS_INSN(shift_reg) |
| 1929 | 1929 | |
| 1930 | 1930 | DISAS_INSN(ff1) |
| 1931 | 1931 | { |
| 1932 | - cpu_abort(NULL, "Unimplemented insn: ff1"); | |
| 1932 | + int reg; | |
| 1933 | + reg = DREG(insn, 0); | |
| 1934 | + gen_logic_cc(s, reg); | |
| 1935 | + gen_op_ff1(reg, reg); | |
| 1933 | 1936 | } |
| 1934 | 1937 | |
| 1935 | 1938 | static int gen_get_sr(DisasContext *s) | ... | ... |