The remainder of CRIS CPU emulation files, by Edgar E. Iglesias. (81fdc5f8) | Commits | gwj / at91sam9263

Commit 81fdc5f8d2d681da8d255baf0713144f8656bac9

Authored by ths 2007-10-08 13:04:02 +0000

The remainder of CRIS CPU emulation files, by Edgar E. Iglesias.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3361 c046a42c-6fe2-441c-8c8c-71466251a162

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target-cris/cpu.h 0 → 100644

View file @81fdc5f

		1	+/*
		2	+ * CRIS virtual CPU header
		3	+ *
		4	+ * Copyright (c) 2007 AXIS Communications AB
		5	+ * Written by Edgar E. Iglesias
		6	+ *
		7	+ * This library is free software; you can redistribute it and/or
		8	+ * modify it under the terms of the GNU Lesser General Public
		9	+ * License as published by the Free Software Foundation; either
		10	+ * version 2 of the License, or (at your option) any later version.
		11	+ *
		12	+ * This library is distributed in the hope that it will be useful,
		13	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
		14	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
		15	+ * General Public License for more details.
		16	+ *
		17	+ * You should have received a copy of the GNU Lesser General Public
		18	+ * License along with this library; if not, write to the Free Software
		19	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		20	+ */
		21	+#ifndef CPU_CRIS_H
		22	+#define CPU_CRIS_H
		23	+
		24	+#define TARGET_LONG_BITS 32
		25	+
		26	+#include "cpu-defs.h"
		27	+
		28	+#include "softfloat.h"
		29	+
		30	+#define TARGET_HAS_ICE 1
		31	+
		32	+#define ELF_MACHINE EM_CRIS
		33	+
		34	+#define EXCP_MMU_EXEC 0
		35	+#define EXCP_MMU_READ 1
		36	+#define EXCP_MMU_WRITE 2
		37	+#define EXCP_MMU_FLUSH 3
		38	+#define EXCP_MMU_MISS 4
		39	+#define EXCP_BREAK 16 /* trap. */
		40	+
		41	+/* CPU flags. */
		42	+#define S_FLAG 0x200
		43	+#define R_FLAG 0x100
		44	+#define P_FLAG 0x80
		45	+#define U_FLAG 0x40
		46	+#define P_FLAG 0x80
		47	+#define U_FLAG 0x40
		48	+#define I_FLAG 0x20
		49	+#define X_FLAG 0x10
		50	+#define N_FLAG 0x08
		51	+#define Z_FLAG 0x04
		52	+#define V_FLAG 0x02
		53	+#define C_FLAG 0x01
		54	+#define ALU_FLAGS 0x1F
		55	+
		56	+/* Condition codes. */
		57	+#define CC_CC 0
		58	+#define CC_CS 1
		59	+#define CC_NE 2
		60	+#define CC_EQ 3
		61	+#define CC_VC 4
		62	+#define CC_VS 5
		63	+#define CC_PL 6
		64	+#define CC_MI 7
		65	+#define CC_LS 8
		66	+#define CC_HI 9
		67	+#define CC_GE 10
		68	+#define CC_LT 11
		69	+#define CC_GT 12
		70	+#define CC_LE 13
		71	+#define CC_A 14
		72	+#define CC_P 15
		73	+
		74	+/* Internal flags for the implementation. */
		75	+#define F_DELAYSLOT 1
		76	+
		77	+typedef struct CPUCRISState {
		78	+ uint32_t debug1;
		79	+ uint32_t debug2;
		80	+ uint32_t debug3;
		81	+
		82	+ /*
		83	+ * We just store the stores to the tlbset here for later evaluation
		84	+ * when the hw needs access to them.
		85	+ *
		86	+ * One for I and another for D.
		87	+ */
		88	+ struct
		89	+ {
		90	+ uint32_t hi;
		91	+ uint32_t lo;
		92	+ } tlbsets[2][4][16];
		93	+
		94	+ uint32_t sregs[256][16]; /* grrr why so many?? */
		95	+ uint32_t regs[16];
		96	+ uint32_t pregs[16];
		97	+ uint32_t pc;
		98	+ uint32_t sr;
		99	+ uint32_t flag_mask; /* Per insn mask of affected flags. */
		100	+
		101	+ /* SSP and USP. */
		102	+ int current_sp;
		103	+ uint32_t sp[2];
		104	+
		105	+ /* These are setup up by the guest code just before transfering the
		106	+ control back to the host. */
		107	+ int jmp;
		108	+ uint32_t btarget;
		109	+ int btaken;
		110	+
		111	+ /* for traps. */
		112	+ int trapnr;
		113	+
		114	+ /* Condition flag tracking. */
		115	+ uint32_t cc_op;
		116	+ uint32_t cc_mask;
		117	+ uint32_t cc_dest;
		118	+ uint32_t cc_src;
		119	+ uint32_t cc_result;
		120	+
		121	+ /* size of the operation, 1 = byte, 2 = word, 4 = dword. */
		122	+ int cc_size;
		123	+
		124	+ /* extended arithmetics. */
		125	+ int cc_x_live;
		126	+ int cc_x;
		127	+
		128	+ int features;
		129	+
		130	+ uint64_t pending_interrupts;
		131	+ int interrupt_request;
		132	+ int exception_index;
		133	+ int user_mode_only;
		134	+ int halted;
		135	+
		136	+ struct
		137	+ {
		138	+ int exec_insns;
		139	+ int exec_loads;
		140	+ int exec_stores;
		141	+ } stats;
		142	+
		143	+
		144	+ jmp_buf jmp_env;
		145	+ CPU_COMMON
		146	+} CPUCRISState;
		147	+
		148	+CPUCRISState *cpu_cris_init(void);
		149	+int cpu_cris_exec(CPUCRISState *s);
		150	+void cpu_cris_close(CPUCRISState *s);
		151	+void do_interrupt(CPUCRISState *env);
		152	+/* you can call this signal handler from your SIGBUS and SIGSEGV
		153	+ signal handlers to inform the virtual CPU of exceptions. non zero
		154	+ is returned if the signal was handled by the virtual CPU. */
		155	+int cpu_cris_signal_handler(int host_signum, void *pinfo,
		156	+ void *puc);
		157	+void cpu_cris_flush_flags(CPUCRISState *, int);
		158	+
		159	+
		160	+void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
		161	+ int is_asi);
		162	+
		163	+enum {
		164	+ CC_OP_DYNAMIC, /* Use env->cc_op */
		165	+ CC_OP_FLAGS,
		166	+ CC_OP_LOGIC,
		167	+ CC_OP_CMP,
		168	+ CC_OP_MOVE,
		169	+ CC_OP_MOVE_PD,
		170	+ CC_OP_MOVE_SD,
		171	+ CC_OP_ADD,
		172	+ CC_OP_ADDC,
		173	+ CC_OP_MCP,
		174	+ CC_OP_ADDU,
		175	+ CC_OP_SUB,
		176	+ CC_OP_SUBU,
		177	+ CC_OP_NEG,
		178	+ CC_OP_BTST,
		179	+ CC_OP_MULS,
		180	+ CC_OP_MULU,
		181	+ CC_OP_DSTEP,
		182	+ CC_OP_BOUND,
		183	+
		184	+ CC_OP_OR,
		185	+ CC_OP_AND,
		186	+ CC_OP_XOR,
		187	+ CC_OP_LSL,
		188	+ CC_OP_LSR,
		189	+ CC_OP_ASR,
		190	+ CC_OP_LZ
		191	+};
		192	+
		193	+#define CCF_C 0x01
		194	+#define CCF_V 0x02
		195	+#define CCF_Z 0x04
		196	+#define CCF_N 0x08
		197	+#define CCF_X 0x10
		198	+
		199	+#define CRIS_SSP 0
		200	+#define CRIS_USP 1
		201	+
		202	+typedef struct cris_def_t cris_def_t;
		203	+
		204	+int cpu_cris_set_model(CPUCRISState env, const char name);
		205	+
		206	+void cris_set_irq_level(CPUCRISState *env, int level, uint8_t vector);
		207	+void cris_set_macsr(CPUCRISState *env, uint32_t val);
		208	+void cris_switch_sp(CPUCRISState *env);
		209	+
		210	+void do_cris_semihosting(CPUCRISState *env, int nr);
		211	+
		212	+enum cris_features {
		213	+ CRIS_FEATURE_CF_ISA_MUL,
		214	+};
		215	+
		216	+static inline int cris_feature(CPUCRISState *env, int feature)
		217	+{
		218	+ return (env->features & (1u << feature)) != 0;
		219	+}
		220	+
		221	+void register_cris_insns (CPUCRISState *env);
		222	+
		223	+/* CRIS uses 8k pages. */
		224	+#define TARGET_PAGE_BITS 13
		225	+
		226	+#define CPUState CPUCRISState
		227	+#define cpu_init cpu_cris_init
		228	+#define cpu_exec cpu_cris_exec
		229	+#define cpu_gen_code cpu_cris_gen_code
		230	+#define cpu_signal_handler cpu_cris_signal_handler
		231	+
		232	+#include "cpu-all.h"
		233	+
		234	+/* Register aliases. */
		235	+#define REG_SP 14
		236	+#define REG_ACR 15
		237	+#define REG_MOF 7
		238	+
		239	+/* Support regs. */
		240	+#define SR_PID 2
		241	+#define SR_SRS 3
		242	+#define SR_EBP 9
		243	+#define SR_ERP 10
		244	+#define SR_CCS 13
		245	+
		246	+/* Support func regs. */
		247	+#define SFR_RW_GC_CFG 0][0
		248	+#define SFR_RW_MM_CFG 1][0
		249	+#define SFR_RW_MM_KBASE_LO 1][1
		250	+#define SFR_RW_MM_KBASE_HI 1][2
		251	+#define SFR_R_MM_CAUSE 1][3
		252	+#define SFR_RW_MM_TLB_SEL 1][4
		253	+#define SFR_RW_MM_TLB_LO 1][5
		254	+#define SFR_RW_MM_TLB_HI 1][6
		255	+
		256	+#endif

target-cris/exec.h 0 → 100644

View file @81fdc5f

		1	+/*
		2	+ * CRIS execution defines
		3	+ *
		4	+ * Copyright (c) 2007 AXIS Communications AB
		5	+ * Written by Edgar E. Iglesias
		6	+ *
		7	+ * This library is free software; you can redistribute it and/or
		8	+ * modify it under the terms of the GNU Lesser General Public
		9	+ * License as published by the Free Software Foundation; either
		10	+ * version 2 of the License, or (at your option) any later version.
		11	+ *
		12	+ * This library is distributed in the hope that it will be useful,
		13	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
		14	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
		15	+ * General Public License for more details.
		16	+ *
		17	+ * You should have received a copy of the GNU Lesser General Public
		18	+ * License along with this library; if not, write to the Free Software
		19	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		20	+ */
		21	+#include "dyngen-exec.h"
		22	+
		23	+#if 1
		24	+register struct CPUCRISState *env asm(AREG0);
		25	+/* This is only used for tb lookup. */
		26	+register uint32_t T0 asm(AREG1);
		27	+register uint32_t T1 asm(AREG2);
		28	+#else
		29	+struct CPUCRISState *env;
		30	+/* This is only used for tb lookup. */
		31	+uint32_t T0;
		32	+uint32_t T1;
		33	+#endif
		34	+#include "cpu.h"
		35	+#include "exec-all.h"
		36	+
		37	+#define RETURN() __asm__ __volatile__("" : : : "memory");
		38	+
		39	+static inline void env_to_regs(void)
		40	+{
		41	+}
		42	+
		43	+static inline void regs_to_env(void)
		44	+{
		45	+}
		46	+
		47	+int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
		48	+ int is_user, int is_softmmu);
		49	+void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr);
		50	+
		51	+#if !defined(CONFIG_USER_ONLY)
		52	+#include "softmmu_exec.h"
		53	+#endif
		54	+
		55	+void cpu_cris_flush_flags(CPUCRISState *env, int cc_op);
		56	+void helper_movec(CPUCRISState *env, int reg, uint32_t val);
		57	+
		58	+void cpu_loop_exit(void);
		59	+
		60	+static inline int cpu_halted(CPUState *env) {
		61	+ if (!env->halted)
		62	+ return 0;
		63	+ if (env->interrupt_request & CPU_INTERRUPT_HARD) {
		64	+ env->halted = 0;
		65	+ return 0;
		66	+ }
		67	+ return EXCP_HALTED;
		68	+}

target-cris/helper.c 0 → 100644

View file @81fdc5f

		1	+/*
		2	+ * CRIS helper routines.
		3	+ *
		4	+ * Copyright (c) 2007 AXIS Communications AB
		5	+ * Written by Edgar E. Iglesias.
		6	+ *
		7	+ * This library is free software; you can redistribute it and/or
		8	+ * modify it under the terms of the GNU Lesser General Public
		9	+ * License as published by the Free Software Foundation; either
		10	+ * version 2 of the License, or (at your option) any later version.
		11	+ *
		12	+ * This library is distributed in the hope that it will be useful,
		13	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
		14	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
		15	+ * Lesser General Public License for more details.
		16	+ *
		17	+ * You should have received a copy of the GNU Lesser General Public
		18	+ * License along with this library; if not, write to the Free Software
		19	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		20	+ */
		21	+
		22	+#include <stdio.h>
		23	+#include <string.h>
		24	+
		25	+#include "config.h"
		26	+#include "cpu.h"
		27	+#include "mmu.h"
		28	+#include "exec-all.h"
		29	+
		30	+#if defined(CONFIG_USER_ONLY)
		31	+
		32	+void do_interrupt (CPUState *env)
		33	+{
		34	+ env->exception_index = -1;
		35	+}
		36	+
		37	+int cpu_cris_handle_mmu_fault(CPUState * env, target_ulong address, int rw,
		38	+ int is_user, int is_softmmu)
		39	+{
		40	+ env->exception_index = 0xaa;
		41	+ env->debug1 = address;
		42	+ cpu_dump_state(env, stderr, fprintf, 0);
		43	+ printf("%s addr=%x env->pc=%x\n", __func__, address, env->pc);
		44	+ return 1;
		45	+}
		46	+
		47	+target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
		48	+{
		49	+ return addr;
		50	+}
		51	+
		52	+#else /* !CONFIG_USER_ONLY */
		53	+
		54	+int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
		55	+ int is_user, int is_softmmu)
		56	+{
		57	+ struct cris_mmu_result_t res;
		58	+ int prot, miss;
		59	+ target_ulong phy;
		60	+
		61	+ address &= TARGET_PAGE_MASK;
		62	+ prot = PAGE_READ \| PAGE_WRITE \| PAGE_EXEC;
		63	+// printf ("%s pc=%x %x w=%d smmu=%d\n", __func__, env->pc, address, rw, is_softmmu);
		64	+ miss = cris_mmu_translate(&res, env, address, rw, is_user);
		65	+ if (miss)
		66	+ {
		67	+ /* handle the miss. */
		68	+ phy = 0;
		69	+ env->exception_index = EXCP_MMU_MISS;
		70	+ }
		71	+ else
		72	+ {
		73	+ phy = res.phy;
		74	+ }
		75	+// printf ("a=%x phy=%x\n", address, phy);
		76	+ return tlb_set_page(env, address, phy, prot, is_user, is_softmmu);
		77	+}
		78	+
		79	+
		80	+static void cris_shift_ccs(CPUState *env)
		81	+{
		82	+ uint32_t ccs;
		83	+ /* Apply the ccs shift. */
		84	+ ccs = env->pregs[SR_CCS];
		85	+ ccs = (ccs & 0xc0000000) \| ((ccs << 12) >> 2);
		86	+// printf ("ccs=%x %x\n", env->pregs[SR_CCS], ccs);
		87	+ env->pregs[SR_CCS] = ccs;
		88	+}
		89	+
		90	+void do_interrupt(CPUState *env)
		91	+{
		92	+ uint32_t ebp, isr;
		93	+ int irqnum;
		94	+
		95	+ fflush(NULL);
		96	+
		97	+#if 0
		98	+ printf ("exception index=%d interrupt_req=%d\n",
		99	+ env->exception_index,
		100	+ env->interrupt_request);
		101	+#endif
		102	+
		103	+ switch (env->exception_index)
		104	+ {
		105	+ case EXCP_BREAK:
		106	+// printf ("BREAK! %d\n", env->trapnr);
		107	+ irqnum = env->trapnr;
		108	+ ebp = env->pregs[SR_EBP];
		109	+ isr = ldl_code(ebp + irqnum * 4);
		110	+ env->pregs[SR_ERP] = env->pc + 2;
		111	+ env->pc = isr;
		112	+
		113	+ cris_shift_ccs(env);
		114	+
		115	+ break;
		116	+ case EXCP_MMU_MISS:
		117	+// printf ("MMU miss\n");
		118	+ irqnum = 4;
		119	+ ebp = env->pregs[SR_EBP];
		120	+ isr = ldl_code(ebp + irqnum * 4);
		121	+ env->pregs[SR_ERP] = env->pc;
		122	+ env->pc = isr;
		123	+ cris_shift_ccs(env);
		124	+ break;
		125	+
		126	+ default:
		127	+ {
		128	+ /* Maybe the irq was acked by sw before we got a
		129	+ change to take it. */
		130	+ if (env->interrupt_request & CPU_INTERRUPT_HARD) {
		131	+ if (!env->pending_interrupts)
		132	+ return;
		133	+ if (!(env->pregs[SR_CCS] & I_FLAG)) {
		134	+ return;
		135	+ }
		136	+
		137	+ irqnum = 31 -
		138	+ __builtin_clz(env->pending_interrupts);
		139	+ irqnum += 0x30;
		140	+ ebp = env->pregs[SR_EBP];
		141	+ isr = ldl_code(ebp + irqnum * 4);
		142	+ env->pregs[SR_ERP] = env->pc;
		143	+ env->pc = isr;
		144	+
		145	+ cris_shift_ccs(env);
		146	+#if 0
		147	+ printf ("%s ebp=%x %x isr=%x %d"
		148	+ " ir=%x pending=%x\n",
		149	+ __func__,
		150	+ ebp, ebp + irqnum * 4,
		151	+ isr, env->exception_index,
		152	+ env->interrupt_request,
		153	+ env->pending_interrupts);
		154	+#endif
		155	+ }
		156	+
		157	+ }
		158	+ break;
		159	+ }
		160	+}
		161	+
		162	+target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
		163	+{
		164	+// printf ("%s\n", __func__);
		165	+ uint32_t phy = addr;
		166	+ struct cris_mmu_result_t res;
		167	+ int miss;
		168	+ miss = cris_mmu_translate(&res, env, addr, 0, 0);
		169	+ if (!miss)
		170	+ phy = res.phy;
		171	+ return phy;
		172	+}
		173	+#endif

target-cris/op_helper.c 0 → 100644

View file @81fdc5f

		1	+/*
		2	+ * CRIS helper routines
		3	+ *
		4	+ * Copyright (c) 2007 AXIS Communications
		5	+ * Written by Edgar E. Iglesias
		6	+ *
		7	+ * This library is free software; you can redistribute it and/or
		8	+ * modify it under the terms of the GNU Lesser General Public
		9	+ * License as published by the Free Software Foundation; either
		10	+ * version 2 of the License, or (at your option) any later version.
		11	+ *
		12	+ * This library is distributed in the hope that it will be useful,
		13	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
		14	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
		15	+ * Lesser General Public License for more details.
		16	+ *
		17	+ * You should have received a copy of the GNU Lesser General Public
		18	+ * License along with this library; if not, write to the Free Software
		19	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		20	+ */
		21	+
		22	+#include <assert.h>
		23	+#include "exec.h"
		24	+
		25	+#define MMUSUFFIX _mmu
		26	+#define GETPC() (__builtin_return_address(0))
		27	+
		28	+#define SHIFT 0
		29	+#include "softmmu_template.h"
		30	+
		31	+#define SHIFT 1
		32	+#include "softmmu_template.h"
		33	+
		34	+#define SHIFT 2
		35	+#include "softmmu_template.h"
		36	+
		37	+#define SHIFT 3
		38	+#include "softmmu_template.h"
		39	+
		40	+/* Try to fill the TLB and return an exception if error. If retaddr is
		41	+ NULL, it means that the function was called in C code (i.e. not
		42	+ from generated code or from helper.c) */
		43	+/* XXX: fix it to restore all registers */
		44	+void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr)
		45	+{
		46	+ TranslationBlock *tb;
		47	+ CPUState *saved_env;
		48	+ target_phys_addr_t pc;
		49	+ int ret;
		50	+
		51	+ /* XXX: hack to restore env in all cases, even if not called from
		52	+ generated code */
		53	+ saved_env = env;
		54	+ env = cpu_single_env;
		55	+ ret = cpu_cris_handle_mmu_fault(env, addr, is_write, is_user, 1);
		56	+ if (__builtin_expect(ret, 0)) {
		57	+ if (retaddr) {
		58	+ /* now we have a real cpu fault */
		59	+ pc = (target_phys_addr_t)retaddr;
		60	+ tb = tb_find_pc(pc);
		61	+ if (tb) {
		62	+ /* the PC is inside the translated code. It means that we have
		63	+ a virtual CPU fault */
		64	+ cpu_restore_state(tb, env, pc, NULL);
		65	+ }
		66	+ }
		67	+ cpu_loop_exit();
		68	+ }
		69	+ env = saved_env;
		70	+}
		71	+
		72	+void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
		73	+ int is_asi)
		74	+{
		75	+
		76	+}

target-cris/op_mem.c 0 → 100644

View file @81fdc5f

		1	+/*
		2	+ * CRIS memory access (load and store) micro operations.
		3	+ *
		4	+ * Copyright (c) 2007 Edgar E. Iglesias, Axis Communications AB.
		5	+ *
		6	+ * This library is free software; you can redistribute it and/or
		7	+ * modify it under the terms of the GNU Lesser General Public
		8	+ * License as published by the Free Software Foundation; either
		9	+ * version 2 of the License, or (at your option) any later version.
		10	+ *
		11	+ * This library is distributed in the hope that it will be useful,
		12	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
		13	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
		14	+ * Lesser General Public License for more details.
		15	+ *
		16	+ * You should have received a copy of the GNU Lesser General Public
		17	+ * License along with this library; if not, write to the Free Software
		18	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		19	+ */
		20	+
		21	+void glue(op_ldb_T0_T0, MEMSUFFIX) (void) {
		22	+ T0 = glue(ldsb, MEMSUFFIX) (T0);
		23	+ RETURN();
		24	+}
		25	+
		26	+void glue(op_ldub_T0_T0, MEMSUFFIX) (void) {
		27	+ T0 = glue(ldub, MEMSUFFIX) (T0);
		28	+ RETURN();
		29	+}
		30	+
		31	+void glue(op_stb_T0_T1, MEMSUFFIX) (void) {
		32	+ glue(stb, MEMSUFFIX) (T0, T1);
		33	+ RETURN();
		34	+}
		35	+
		36	+void glue(op_ldw_T0_T0, MEMSUFFIX) (void) {
		37	+ T0 = glue(ldsw, MEMSUFFIX) (T0);
		38	+ RETURN();
		39	+}
		40	+
		41	+void glue(op_lduw_T0_T0, MEMSUFFIX) (void) {
		42	+ T0 = glue(lduw, MEMSUFFIX) (T0);
		43	+ RETURN();
		44	+}
		45	+
		46	+void glue(op_stw_T0_T1, MEMSUFFIX) (void) {
		47	+ glue(stw, MEMSUFFIX) (T0, T1);
		48	+ RETURN();
		49	+}
		50	+
		51	+void glue(op_ldl_T0_T0, MEMSUFFIX) (void) {
		52	+ T0 = glue(ldl, MEMSUFFIX) (T0);
		53	+ RETURN();
		54	+}
		55	+
		56	+void glue(op_stl_T0_T1, MEMSUFFIX) (void) {
		57	+ glue(stl, MEMSUFFIX) (T0, T1);
		58	+ RETURN();
		59	+}

target-cris/op_template.h 0 → 100644

View file @81fdc5f

		1	+/*
		2	+ * CRIS micro operations (templates for various register related
		3	+ * operations)
		4	+ *
		5	+ * Copyright (c) 2003 Fabrice Bellard
		6	+ *
		7	+ * This library is free software; you can redistribute it and/or
		8	+ * modify it under the terms of the GNU Lesser General Public
		9	+ * License as published by the Free Software Foundation; either
		10	+ * version 2 of the License, or (at your option) any later version.
		11	+ *
		12	+ * This library is distributed in the hope that it will be useful,
		13	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
		14	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
		15	+ * Lesser General Public License for more details.
		16	+ *
		17	+ * You should have received a copy of the GNU Lesser General Public
		18	+ * License along with this library; if not, write to the Free Software
		19	+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
		20	+ */
		21	+
		22	+#ifndef SET_REG
		23	+#define SET_REG(x) REG = x
		24	+#endif
		25	+
		26	+void OPPROTO glue(op_movl_T0_, REGNAME)(void)
		27	+{
		28	+ T0 = REG;
		29	+}
		30	+
		31	+void OPPROTO glue(op_movl_T1_, REGNAME)(void)
		32	+{
		33	+ T1 = REG;
		34	+}
		35	+
		36	+void OPPROTO glue(glue(op_movl_, REGNAME), _T0)(void)
		37	+{
		38	+ SET_REG (T0);
		39	+}
		40	+
		41	+void OPPROTO glue(glue(op_movl_, REGNAME), _T1)(void)
		42	+{
		43	+ SET_REG (T1);
		44	+}
		45	+
		46	+#undef REG
		47	+#undef REGNAME
		48	+#undef SET_REG

gwj / at91sam9263 · Commits

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The remainder of CRIS CPU emulation files, by Edgar E. Iglesias.