Commit 815a67426681d057d09c56bf58137b222847fdbb

Authored by pbrook
1 parent adf7d8fb

Fix coprocessor register types.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4866 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 13 additions and 13 deletions
target-m68k/translate.c
... ... @@ -36,6 +36,17 @@
36 36  
37 37 //#define DEBUG_DISPATCH 1
38 38  
  39 +/* Fake floating point. */
  40 +#define TCG_TYPE_F32 TCG_TYPE_I32
  41 +#define TCG_TYPE_F64 TCG_TYPE_I64
  42 +#define tcg_gen_mov_f64 tcg_gen_mov_i64
  43 +#define tcg_gen_qemu_ldf32 tcg_gen_qemu_ld32u
  44 +#define tcg_gen_qemu_ldf64 tcg_gen_qemu_ld64
  45 +#define tcg_gen_qemu_stf32 tcg_gen_qemu_st32
  46 +#define tcg_gen_qemu_stf64 tcg_gen_qemu_st64
  47 +#define gen_helper_pack_32_f32 tcg_gen_mov_i32
  48 +#define gen_helper_pack_f32_32 tcg_gen_mov_i32
  49 +
39 50 #define DEFO32(name, offset) static TCGv QREG_##name;
40 51 #define DEFO64(name, offset) static TCGv QREG_##name;
41 52 #define DEFF64(name, offset) static TCGv QREG_##name;
... ... @@ -91,13 +102,13 @@ void m68k_tcg_init(void)
91 102 offsetof(CPUM68KState, aregs[i]), p);
92 103 p += 3;
93 104 sprintf(p, "F%d", i);
94   - cpu_fregs[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
  105 + cpu_fregs[i] = tcg_global_mem_new(TCG_TYPE_F64, TCG_AREG0,
95 106 offsetof(CPUM68KState, fregs[i]), p);
96 107 p += 3;
97 108 }
98 109 for (i = 0; i < 4; i++) {
99 110 sprintf(p, "ACC%d", i);
100   - cpu_macc[i] = tcg_global_mem_new(TCG_TYPE_I32, TCG_AREG0,
  111 + cpu_macc[i] = tcg_global_mem_new(TCG_TYPE_I64, TCG_AREG0,
101 112 offsetof(CPUM68KState, macc[i]), p);
102 113 p += 5;
103 114 }
... ... @@ -172,17 +183,6 @@ typedef void (*disas_proc)(DisasContext *, uint16_t);
172 183 /* FIXME: Remove this. */
173 184 #define gen_im32(val) tcg_const_i32(val)
174 185  
175   -/* Fake floating point. */
176   -#define TCG_TYPE_F32 TCG_TYPE_I32
177   -#define TCG_TYPE_F64 TCG_TYPE_I64
178   -#define tcg_gen_mov_f64 tcg_gen_mov_i64
179   -#define tcg_gen_qemu_ldf32 tcg_gen_qemu_ld32u
180   -#define tcg_gen_qemu_ldf64 tcg_gen_qemu_ld64
181   -#define tcg_gen_qemu_stf32 tcg_gen_qemu_st32
182   -#define tcg_gen_qemu_stf64 tcg_gen_qemu_st64
183   -#define gen_helper_pack_32_f32 tcg_gen_mov_i32
184   -#define gen_helper_pack_f32_32 tcg_gen_mov_i32
185   -
186 186 #define QMODE_I32 TCG_TYPE_I32
187 187 #define QMODE_I64 TCG_TYPE_I64
188 188 #define QMODE_F32 TCG_TYPE_F32
... ...