gwj / at91sam9263 · Commits

Commit 8137cde8f95ebb6bb0fa1934c01575c410ccebbb

Authored by blueswir1
1 parent 43d7ac4e

Move sun4c to its own hwdef (Robert Reif) 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5549 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 241 additions and 239 deletions
hw/sun4m.c
  View file @8137cde
... ... @@ -88,7 +88,7 @@
88 88 #define MAX_CPUS 16
89 89 #define MAX_PILS 16
90 90  
91   -struct hwdef {
  91 +struct sun4m_hwdef {
92 92 target_phys_addr_t iommu_base, slavio_base;
93 93 target_phys_addr_t intctl_base, counter_base, nvram_base, ms_kb_base;
94 94 target_phys_addr_t serial_base, fd_base;
... ... @@ -96,7 +96,6 @@ struct hwdef {
96 96 target_phys_addr_t tcx_base, cs_base, apc_base, aux1_base, aux2_base;
97 97 target_phys_addr_t ecc_base;
98 98 uint32_t ecc_version;
99   - target_phys_addr_t sun4c_intctl_base, sun4c_counter_base;
100 99 long vram_size, nvram_size;
101 100 // IRQ numbers are not PIL ones, but master interrupt controller
102 101 // register bit numbers
... ... @@ -131,6 +130,25 @@ struct sun4d_hwdef {
131 130 const char * const default_cpu_model;
132 131 };
133 132  
  133 +struct sun4c_hwdef {
  134 + target_phys_addr_t iommu_base, slavio_base;
  135 + target_phys_addr_t intctl_base, counter_base, nvram_base, ms_kb_base;
  136 + target_phys_addr_t serial_base, fd_base;
  137 + target_phys_addr_t idreg_base, dma_base, esp_base, le_base;
  138 + target_phys_addr_t tcx_base, cs_base, apc_base, aux1_base, aux2_base;
  139 + long vram_size, nvram_size;
  140 + // IRQ numbers are not PIL ones, but master interrupt controller
  141 + // register bit numbers
  142 + int intctl_g_intr, esp_irq, le_irq, clock_irq, clock1_irq;
  143 + int ser_irq, ms_kb_irq, fd_irq, me_irq, cs_irq;
  144 + uint8_t nvram_machine_id;
  145 + uint16_t machine_id;
  146 + uint32_t iommu_version;
  147 + uint32_t intbit_to_level[32];
  148 + uint64_t max_mem;
  149 + const char * const default_cpu_model;
  150 +};
  151 +
134 152 int DMA_get_channel_mode (int nchan)
135 153 {
136 154 return 0;
... ... @@ -395,7 +413,7 @@ static unsigned long sun4m_load_kernel(const char *kernel_filename,
395 413 return kernel_size;
396 414 }
397 415  
398   -static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
  416 +static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
399 417 const char *boot_device,
400 418 DisplayState *ds, const char *kernel_filename,
401 419 const char *kernel_cmdline,
... ... @@ -584,158 +602,6 @@ static void sun4m_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
584 602 fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_DEPTH, graphic_depth);
585 603 }
586 604  
587   -static void sun4c_hw_init(const struct hwdef *hwdef, ram_addr_t RAM_size,
588   - const char *boot_device,
589   - DisplayState *ds, const char *kernel_filename,
590   - const char *kernel_cmdline,
591   - const char *initrd_filename, const char *cpu_model)
592   -{
593   - CPUState *env;
594   - unsigned int i;
595   - void *iommu, *espdma, *ledma, *main_esp, *nvram;
596   - qemu_irq *cpu_irqs, *slavio_irq, *espdma_irq, *ledma_irq;
597   - qemu_irq *esp_reset, *le_reset;
598   - qemu_irq *fdc_tc;
599   - unsigned long prom_offset, kernel_size;
600   - int ret;
601   - char buf[1024];
602   - BlockDriverState *fd[MAX_FD];
603   - int drive_index;
604   - void *fw_cfg;
605   -
606   - /* init CPU */
607   - if (!cpu_model)
608   - cpu_model = hwdef->default_cpu_model;
609   -
610   - env = cpu_init(cpu_model);
611   - if (!env) {
612   - fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n");
613   - exit(1);
614   - }
615   -
616   - cpu_sparc_set_id(env, 0);
617   -
618   - qemu_register_reset(main_cpu_reset, env);
619   - cpu_irqs = qemu_allocate_irqs(cpu_set_irq, env, MAX_PILS);
620   - env->prom_addr = hwdef->slavio_base;
621   -
622   - /* allocate RAM */
623   - if ((uint64_t)RAM_size > hwdef->max_mem) {
624   - fprintf(stderr,
625   - "qemu: Too much memory for this machine: %d, maximum %d\n",
626   - (unsigned int)(RAM_size / (1024 * 1024)),
627   - (unsigned int)(hwdef->max_mem / (1024 * 1024)));
628   - exit(1);
629   - }
630   - cpu_register_physical_memory(0, RAM_size, 0);
631   -
632   - /* load boot prom */
633   - prom_offset = RAM_size + hwdef->vram_size;
634   - cpu_register_physical_memory(hwdef->slavio_base,
635   - (PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) &
636   - TARGET_PAGE_MASK,
637   - prom_offset | IO_MEM_ROM);
638   -
639   - if (bios_name == NULL)
640   - bios_name = PROM_FILENAME;
641   - snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
642   - ret = load_elf(buf, hwdef->slavio_base - PROM_VADDR, NULL, NULL, NULL);
643   - if (ret < 0 || ret > PROM_SIZE_MAX)
644   - ret = load_image_targphys(buf, hwdef->slavio_base, PROM_SIZE_MAX);
645   - if (ret < 0 || ret > PROM_SIZE_MAX) {
646   - fprintf(stderr, "qemu: could not load prom '%s'\n",
647   - buf);
648   - exit(1);
649   - }
650   - prom_offset += (ret + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
651   -
652   - /* set up devices */
653   - slavio_intctl = sun4c_intctl_init(hwdef->sun4c_intctl_base,
654   - &slavio_irq, cpu_irqs);
655   -
656   - iommu = iommu_init(hwdef->iommu_base, hwdef->iommu_version,
657   - slavio_irq[hwdef->me_irq]);
658   -
659   - espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[hwdef->esp_irq],
660   - iommu, &espdma_irq, &esp_reset);
661   -
662   - ledma = sparc32_dma_init(hwdef->dma_base + 16ULL,
663   - slavio_irq[hwdef->le_irq], iommu, &ledma_irq,
664   - &le_reset);
665   -
666   - if (graphic_depth != 8 && graphic_depth != 24) {
667   - fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
668   - exit (1);
669   - }
670   - tcx_init(ds, hwdef->tcx_base, phys_ram_base + RAM_size, RAM_size,
671   - hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
672   -
673   - if (nd_table[0].model == NULL
674   - || strcmp(nd_table[0].model, "lance") == 0) {
675   - lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
676   - } else if (strcmp(nd_table[0].model, "?") == 0) {
677   - fprintf(stderr, "qemu: Supported NICs: lance\n");
678   - exit (1);
679   - } else {
680   - fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
681   - exit (1);
682   - }
683   -
684   - nvram = m48t59_init(slavio_irq[0], hwdef->nvram_base, 0,
685   - hwdef->nvram_size, 2);
686   -
687   - slavio_serial_ms_kbd_init(hwdef->ms_kb_base, slavio_irq[hwdef->ms_kb_irq],
688   - nographic);
689   - // Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
690   - // Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
691   - slavio_serial_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq],
692   - serial_hds[1], serial_hds[0]);
693   -
694   - slavio_misc = slavio_misc_init(0, hwdef->apc_base,
695   - hwdef->aux1_base, hwdef->aux2_base,
696   - slavio_irq[hwdef->me_irq], env, &fdc_tc);
697   -
698   - if (hwdef->fd_base != (target_phys_addr_t)-1) {
699   - /* there is zero or one floppy drive */
700   - fd[1] = fd[0] = NULL;
701   - drive_index = drive_get_index(IF_FLOPPY, 0, 0);
702   - if (drive_index != -1)
703   - fd[0] = drives_table[drive_index].bdrv;
704   -
705   - sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,
706   - fdc_tc);
707   - }
708   -
709   - if (drive_get_max_bus(IF_SCSI) > 0) {
710   - fprintf(stderr, "qemu: too many SCSI bus\n");
711   - exit(1);
712   - }
713   -
714   - main_esp = esp_init(hwdef->esp_base, 2,
715   - espdma_memory_read, espdma_memory_write,
716   - espdma, *espdma_irq, esp_reset);
717   -
718   - for (i = 0; i < ESP_MAX_DEVS; i++) {
719   - drive_index = drive_get_index(IF_SCSI, 0, i);
720   - if (drive_index == -1)
721   - continue;
722   - esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i);
723   - }
724   -
725   - kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename,
726   - RAM_size);
727   -
728   - nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
729   - boot_device, RAM_size, kernel_size, graphic_width,
730   - graphic_height, graphic_depth, hwdef->nvram_machine_id,
731   - "Sun4c");
732   -
733   - fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
734   - fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
735   - fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
736   - fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
737   -}
738   -
739 605 enum {
740 606 ss2_id = 0,
741 607 ss5_id = 32,
... ... @@ -751,7 +617,7 @@ enum {
751 617 ss2000_id,
752 618 };
753 619  
754   -static const struct hwdef hwdefs[] = {
  620 +static const struct sun4m_hwdef sun4m_hwdefs[] = {
755 621 /* SS-5 */
756 622 {
757 623 .iommu_base = 0x10000000,
... ... @@ -772,8 +638,6 @@ static const struct hwdef hwdefs[] = {
772 638 .aux1_base = 0x71900000,
773 639 .aux2_base = 0x71910000,
774 640 .ecc_base = -1,
775   - .sun4c_intctl_base = -1,
776   - .sun4c_counter_base = -1,
777 641 .vram_size = 0x00100000,
778 642 .nvram_size = 0x2000,
779 643 .esp_irq = 18,
... ... @@ -816,8 +680,6 @@ static const struct hwdef hwdefs[] = {
816 680 .aux2_base = 0xff1a01000ULL,
817 681 .ecc_base = 0xf00000000ULL,
818 682 .ecc_version = 0x10000000, // version 0, implementation 1
819   - .sun4c_intctl_base = -1,
820   - .sun4c_counter_base = -1,
821 683 .vram_size = 0x00100000,
822 684 .nvram_size = 0x2000,
823 685 .esp_irq = 18,
... ... @@ -861,8 +723,6 @@ static const struct hwdef hwdefs[] = {
861 723 .aux2_base = 0xff1a01000ULL, // XXX should not exist
862 724 .ecc_base = 0xf00000000ULL,
863 725 .ecc_version = 0x00000000, // version 0, implementation 0
864   - .sun4c_intctl_base = -1,
865   - .sun4c_counter_base = -1,
866 726 .vram_size = 0x00100000,
867 727 .nvram_size = 0x2000,
868 728 .esp_irq = 18,
... ... @@ -906,8 +766,6 @@ static const struct hwdef hwdefs[] = {
906 766 .aux2_base = 0xff1a01000ULL,
907 767 .ecc_base = 0xf00000000ULL,
908 768 .ecc_version = 0x20000000, // version 0, implementation 2
909   - .sun4c_intctl_base = -1,
910   - .sun4c_counter_base = -1,
911 769 .vram_size = 0x00100000,
912 770 .nvram_size = 0x2000,
913 771 .esp_irq = 18,
... ... @@ -930,42 +788,6 @@ static const struct hwdef hwdefs[] = {
930 788 .max_mem = 0xf00000000ULL,
931 789 .default_cpu_model = "TI SuperSparc II",
932 790 },
933   - /* SS-2 */
934   - {
935   - .iommu_base = 0xf8000000,
936   - .tcx_base = 0xfe000000,
937   - .cs_base = -1,
938   - .slavio_base = 0xf6000000,
939   - .ms_kb_base = 0xf0000000,
940   - .serial_base = 0xf1000000,
941   - .nvram_base = 0xf2000000,
942   - .fd_base = 0xf7200000,
943   - .counter_base = -1,
944   - .intctl_base = -1,
945   - .dma_base = 0xf8400000,
946   - .esp_base = 0xf8800000,
947   - .le_base = 0xf8c00000,
948   - .apc_base = -1,
949   - .aux1_base = 0xf7400003,
950   - .aux2_base = -1,
951   - .sun4c_intctl_base = 0xf5000000,
952   - .sun4c_counter_base = 0xf3000000,
953   - .vram_size = 0x00100000,
954   - .nvram_size = 0x800,
955   - .esp_irq = 2,
956   - .le_irq = 3,
957   - .clock_irq = 5,
958   - .clock1_irq = 7,
959   - .ms_kb_irq = 1,
960   - .ser_irq = 1,
961   - .fd_irq = 1,
962   - .me_irq = 1,
963   - .cs_irq = -1,
964   - .nvram_machine_id = 0x55,
965   - .machine_id = ss2_id,
966   - .max_mem = 0x10000000,
967   - .default_cpu_model = "Cypress CY7C601",
968   - },
969 791 /* Voyager */
970 792 {
971 793 .iommu_base = 0x10000000,
... ... @@ -986,8 +808,6 @@ static const struct hwdef hwdefs[] = {
986 808 .aux1_base = 0x71900000,
987 809 .aux2_base = 0x71910000,
988 810 .ecc_base = -1,
989   - .sun4c_intctl_base = -1,
990   - .sun4c_counter_base = -1,
991 811 .vram_size = 0x00100000,
992 812 .nvram_size = 0x2000,
993 813 .esp_irq = 18,
... ... @@ -1029,8 +849,6 @@ static const struct hwdef hwdefs[] = {
1029 849 .aux1_base = 0x71900000,
1030 850 .aux2_base = 0x71910000,
1031 851 .ecc_base = -1,
1032   - .sun4c_intctl_base = -1,
1033   - .sun4c_counter_base = -1,
1034 852 .vram_size = 0x00100000,
1035 853 .nvram_size = 0x2000,
1036 854 .esp_irq = 18,
... ... @@ -1072,8 +890,6 @@ static const struct hwdef hwdefs[] = {
1072 890 .aux1_base = 0x71900000,
1073 891 .aux2_base = 0x71910000,
1074 892 .ecc_base = -1,
1075   - .sun4c_intctl_base = -1,
1076   - .sun4c_counter_base = -1,
1077 893 .vram_size = 0x00100000,
1078 894 .nvram_size = 0x2000,
1079 895 .esp_irq = 18,
... ... @@ -1115,8 +931,6 @@ static const struct hwdef hwdefs[] = {
1115 931 .aux1_base = 0x71900000,
1116 932 .aux2_base = 0x71910000,
1117 933 .ecc_base = -1,
1118   - .sun4c_intctl_base = -1,
1119   - .sun4c_counter_base = -1,
1120 934 .vram_size = 0x00100000,
1121 935 .nvram_size = 0x2000,
1122 936 .esp_irq = 18,
... ... @@ -1158,8 +972,6 @@ static const struct hwdef hwdefs[] = {
1158 972 .aux1_base = 0x71900000,
1159 973 .aux2_base = 0x71910000,
1160 974 .ecc_base = -1,
1161   - .sun4c_intctl_base = -1,
1162   - .sun4c_counter_base = -1,
1163 975 .vram_size = 0x00100000,
1164 976 .nvram_size = 0x2000,
1165 977 .esp_irq = 18,
... ... @@ -1189,7 +1001,7 @@ static void ss5_init(ram_addr_t RAM_size, int vga_ram_size,
1189 1001 const char *kernel_filename, const char *kernel_cmdline,
1190 1002 const char *initrd_filename, const char *cpu_model)
1191 1003 {
1192   - sun4m_hw_init(&hwdefs[0], RAM_size, boot_device, ds, kernel_filename,
  1004 + sun4m_hw_init(&sun4m_hwdefs[0], RAM_size, boot_device, ds, kernel_filename,
1193 1005 kernel_cmdline, initrd_filename, cpu_model);
1194 1006 }
1195 1007  
... ... @@ -1199,7 +1011,7 @@ static void ss10_init(ram_addr_t RAM_size, int vga_ram_size,
1199 1011 const char *kernel_filename, const char *kernel_cmdline,
1200 1012 const char *initrd_filename, const char *cpu_model)
1201 1013 {
1202   - sun4m_hw_init(&hwdefs[1], RAM_size, boot_device, ds, kernel_filename,
  1014 + sun4m_hw_init(&sun4m_hwdefs[1], RAM_size, boot_device, ds, kernel_filename,
1203 1015 kernel_cmdline, initrd_filename, cpu_model);
1204 1016 }
1205 1017  
... ... @@ -1210,7 +1022,7 @@ static void ss600mp_init(ram_addr_t RAM_size, int vga_ram_size,
1210 1022 const char *kernel_cmdline,
1211 1023 const char *initrd_filename, const char *cpu_model)
1212 1024 {
1213   - sun4m_hw_init(&hwdefs[2], RAM_size, boot_device, ds, kernel_filename,
  1025 + sun4m_hw_init(&sun4m_hwdefs[2], RAM_size, boot_device, ds, kernel_filename,
1214 1026 kernel_cmdline, initrd_filename, cpu_model);
1215 1027 }
1216 1028  
... ... @@ -1220,17 +1032,7 @@ static void ss20_init(ram_addr_t RAM_size, int vga_ram_size,
1220 1032 const char *kernel_filename, const char *kernel_cmdline,
1221 1033 const char *initrd_filename, const char *cpu_model)
1222 1034 {
1223   - sun4m_hw_init(&hwdefs[3], RAM_size, boot_device, ds, kernel_filename,
1224   - kernel_cmdline, initrd_filename, cpu_model);
1225   -}
1226   -
1227   -/* SPARCstation 2 hardware initialisation */
1228   -static void ss2_init(ram_addr_t RAM_size, int vga_ram_size,
1229   - const char *boot_device, DisplayState *ds,
1230   - const char *kernel_filename, const char *kernel_cmdline,
1231   - const char *initrd_filename, const char *cpu_model)
1232   -{
1233   - sun4c_hw_init(&hwdefs[4], RAM_size, boot_device, ds, kernel_filename,
  1035 + sun4m_hw_init(&sun4m_hwdefs[3], RAM_size, boot_device, ds, kernel_filename,
1234 1036 kernel_cmdline, initrd_filename, cpu_model);
1235 1037 }
1236 1038  
... ... @@ -1240,7 +1042,7 @@ static void vger_init(ram_addr_t RAM_size, int vga_ram_size,
1240 1042 const char *kernel_filename, const char *kernel_cmdline,
1241 1043 const char *initrd_filename, const char *cpu_model)
1242 1044 {
1243   - sun4m_hw_init(&hwdefs[5], RAM_size, boot_device, ds, kernel_filename,
  1045 + sun4m_hw_init(&sun4m_hwdefs[4], RAM_size, boot_device, ds, kernel_filename,
1244 1046 kernel_cmdline, initrd_filename, cpu_model);
1245 1047 }
1246 1048  
... ... @@ -1250,7 +1052,7 @@ static void ss_lx_init(ram_addr_t RAM_size, int vga_ram_size,
1250 1052 const char *kernel_filename, const char *kernel_cmdline,
1251 1053 const char *initrd_filename, const char *cpu_model)
1252 1054 {
1253   - sun4m_hw_init(&hwdefs[6], RAM_size, boot_device, ds, kernel_filename,
  1055 + sun4m_hw_init(&sun4m_hwdefs[5], RAM_size, boot_device, ds, kernel_filename,
1254 1056 kernel_cmdline, initrd_filename, cpu_model);
1255 1057 }
1256 1058  
... ... @@ -1260,7 +1062,7 @@ static void ss4_init(ram_addr_t RAM_size, int vga_ram_size,
1260 1062 const char *kernel_filename, const char *kernel_cmdline,
1261 1063 const char *initrd_filename, const char *cpu_model)
1262 1064 {
1263   - sun4m_hw_init(&hwdefs[7], RAM_size, boot_device, ds, kernel_filename,
  1065 + sun4m_hw_init(&sun4m_hwdefs[6], RAM_size, boot_device, ds, kernel_filename,
1264 1066 kernel_cmdline, initrd_filename, cpu_model);
1265 1067 }
1266 1068  
... ... @@ -1270,7 +1072,7 @@ static void scls_init(ram_addr_t RAM_size, int vga_ram_size,
1270 1072 const char *kernel_filename, const char *kernel_cmdline,
1271 1073 const char *initrd_filename, const char *cpu_model)
1272 1074 {
1273   - sun4m_hw_init(&hwdefs[8], RAM_size, boot_device, ds, kernel_filename,
  1075 + sun4m_hw_init(&sun4m_hwdefs[7], RAM_size, boot_device, ds, kernel_filename,
1274 1076 kernel_cmdline, initrd_filename, cpu_model);
1275 1077 }
1276 1078  
... ... @@ -1280,7 +1082,7 @@ static void sbook_init(ram_addr_t RAM_size, int vga_ram_size,
1280 1082 const char *kernel_filename, const char *kernel_cmdline,
1281 1083 const char *initrd_filename, const char *cpu_model)
1282 1084 {
1283   - sun4m_hw_init(&hwdefs[9], RAM_size, boot_device, ds, kernel_filename,
  1085 + sun4m_hw_init(&sun4m_hwdefs[8], RAM_size, boot_device, ds, kernel_filename,
1284 1086 kernel_cmdline, initrd_filename, cpu_model);
1285 1087 }
1286 1088  
... ... @@ -1324,16 +1126,6 @@ QEMUMachine ss20_machine = {
1324 1126 .max_cpus = 16,
1325 1127 };
1326 1128  
1327   -QEMUMachine ss2_machine = {
1328   - .name = "SS-2",
1329   - .desc = "Sun4c platform, SPARCstation 2",
1330   - .init = ss2_init,
1331   - .ram_require = PROM_SIZE_MAX + TCX_SIZE,
1332   - .nodisk_ok = 1,
1333   - .use_scsi = 1,
1334   - .max_cpus = 16,
1335   -};
1336   -
1337 1129 QEMUMachine voyager_machine = {
1338 1130 .name = "Voyager",
1339 1131 .desc = "Sun4m platform, SPARCstation Voyager",
... ... @@ -1642,3 +1434,213 @@ QEMUMachine ss2000_machine = {
1642 1434 .use_scsi = 1,
1643 1435 .max_cpus = 16,
1644 1436 };
  1437 +
  1438 +static const struct sun4c_hwdef sun4c_hwdefs[] = {
  1439 + /* SS-2 */
  1440 + {
  1441 + .iommu_base = 0xf8000000,
  1442 + .tcx_base = 0xfe000000,
  1443 + .cs_base = -1,
  1444 + .slavio_base = 0xf6000000,
  1445 + .intctl_base = 0xf5000000,
  1446 + .counter_base = 0xf3000000,
  1447 + .ms_kb_base = 0xf0000000,
  1448 + .serial_base = 0xf1000000,
  1449 + .nvram_base = 0xf2000000,
  1450 + .fd_base = 0xf7200000,
  1451 + .dma_base = 0xf8400000,
  1452 + .esp_base = 0xf8800000,
  1453 + .le_base = 0xf8c00000,
  1454 + .apc_base = -1,
  1455 + .aux1_base = 0xf7400003,
  1456 + .aux2_base = -1,
  1457 + .vram_size = 0x00100000,
  1458 + .nvram_size = 0x800,
  1459 + .esp_irq = 2,
  1460 + .le_irq = 3,
  1461 + .clock_irq = 5,
  1462 + .clock1_irq = 7,
  1463 + .ms_kb_irq = 1,
  1464 + .ser_irq = 1,
  1465 + .fd_irq = 1,
  1466 + .me_irq = 1,
  1467 + .cs_irq = -1,
  1468 + .nvram_machine_id = 0x55,
  1469 + .machine_id = ss2_id,
  1470 + .max_mem = 0x10000000,
  1471 + .default_cpu_model = "Cypress CY7C601",
  1472 + },
  1473 +};
  1474 +
  1475 +static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
  1476 + const char *boot_device,
  1477 + DisplayState *ds, const char *kernel_filename,
  1478 + const char *kernel_cmdline,
  1479 + const char *initrd_filename, const char *cpu_model)
  1480 +{
  1481 + CPUState *env;
  1482 + unsigned int i;
  1483 + void *iommu, *espdma, *ledma, *main_esp, *nvram;
  1484 + qemu_irq *cpu_irqs, *slavio_irq, *espdma_irq, *ledma_irq;
  1485 + qemu_irq *esp_reset, *le_reset;
  1486 + qemu_irq *fdc_tc;
  1487 + unsigned long prom_offset, kernel_size;
  1488 + int ret;
  1489 + char buf[1024];
  1490 + BlockDriverState *fd[MAX_FD];
  1491 + int drive_index;
  1492 + void *fw_cfg;
  1493 +
  1494 + /* init CPU */
  1495 + if (!cpu_model)
  1496 + cpu_model = hwdef->default_cpu_model;
  1497 +
  1498 + env = cpu_init(cpu_model);
  1499 + if (!env) {
  1500 + fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n");
  1501 + exit(1);
  1502 + }
  1503 +
  1504 + cpu_sparc_set_id(env, 0);
  1505 +
  1506 + qemu_register_reset(main_cpu_reset, env);
  1507 + cpu_irqs = qemu_allocate_irqs(cpu_set_irq, env, MAX_PILS);
  1508 + env->prom_addr = hwdef->slavio_base;
  1509 +
  1510 + /* allocate RAM */
  1511 + if ((uint64_t)RAM_size > hwdef->max_mem) {
  1512 + fprintf(stderr,
  1513 + "qemu: Too much memory for this machine: %d, maximum %d\n",
  1514 + (unsigned int)(RAM_size / (1024 * 1024)),
  1515 + (unsigned int)(hwdef->max_mem / (1024 * 1024)));
  1516 + exit(1);
  1517 + }
  1518 + cpu_register_physical_memory(0, RAM_size, 0);
  1519 +
  1520 + /* load boot prom */
  1521 + prom_offset = RAM_size + hwdef->vram_size;
  1522 + cpu_register_physical_memory(hwdef->slavio_base,
  1523 + (PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) &
  1524 + TARGET_PAGE_MASK,
  1525 + prom_offset | IO_MEM_ROM);
  1526 +
  1527 + if (bios_name == NULL)
  1528 + bios_name = PROM_FILENAME;
  1529 + snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
  1530 + ret = load_elf(buf, hwdef->slavio_base - PROM_VADDR, NULL, NULL, NULL);
  1531 + if (ret < 0 || ret > PROM_SIZE_MAX)
  1532 + ret = load_image_targphys(buf, hwdef->slavio_base, PROM_SIZE_MAX);
  1533 + if (ret < 0 || ret > PROM_SIZE_MAX) {
  1534 + fprintf(stderr, "qemu: could not load prom '%s'\n",
  1535 + buf);
  1536 + exit(1);
  1537 + }
  1538 + prom_offset += (ret + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
  1539 +
  1540 + /* set up devices */
  1541 + slavio_intctl = sun4c_intctl_init(hwdef->intctl_base,
  1542 + &slavio_irq, cpu_irqs);
  1543 +
  1544 + iommu = iommu_init(hwdef->iommu_base, hwdef->iommu_version,
  1545 + slavio_irq[hwdef->me_irq]);
  1546 +
  1547 + espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[hwdef->esp_irq],
  1548 + iommu, &espdma_irq, &esp_reset);
  1549 +
  1550 + ledma = sparc32_dma_init(hwdef->dma_base + 16ULL,
  1551 + slavio_irq[hwdef->le_irq], iommu, &ledma_irq,
  1552 + &le_reset);
  1553 +
  1554 + if (graphic_depth != 8 && graphic_depth != 24) {
  1555 + fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
  1556 + exit (1);
  1557 + }
  1558 + tcx_init(ds, hwdef->tcx_base, phys_ram_base + RAM_size, RAM_size,
  1559 + hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
  1560 +
  1561 + if (nd_table[0].model == NULL
  1562 + || strcmp(nd_table[0].model, "lance") == 0) {
  1563 + lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
  1564 + } else if (strcmp(nd_table[0].model, "?") == 0) {
  1565 + fprintf(stderr, "qemu: Supported NICs: lance\n");
  1566 + exit (1);
  1567 + } else {
  1568 + fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
  1569 + exit (1);
  1570 + }
  1571 +
  1572 + nvram = m48t59_init(slavio_irq[0], hwdef->nvram_base, 0,
  1573 + hwdef->nvram_size, 2);
  1574 +
  1575 + slavio_serial_ms_kbd_init(hwdef->ms_kb_base, slavio_irq[hwdef->ms_kb_irq],
  1576 + nographic);
  1577 + // Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
  1578 + // Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
  1579 + slavio_serial_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq],
  1580 + serial_hds[1], serial_hds[0]);
  1581 +
  1582 + slavio_misc = slavio_misc_init(0, hwdef->apc_base,
  1583 + hwdef->aux1_base, hwdef->aux2_base,
  1584 + slavio_irq[hwdef->me_irq], env, &fdc_tc);
  1585 +
  1586 + if (hwdef->fd_base != (target_phys_addr_t)-1) {
  1587 + /* there is zero or one floppy drive */
  1588 + fd[1] = fd[0] = NULL;
  1589 + drive_index = drive_get_index(IF_FLOPPY, 0, 0);
  1590 + if (drive_index != -1)
  1591 + fd[0] = drives_table[drive_index].bdrv;
  1592 +
  1593 + sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,
  1594 + fdc_tc);
  1595 + }
  1596 +
  1597 + if (drive_get_max_bus(IF_SCSI) > 0) {
  1598 + fprintf(stderr, "qemu: too many SCSI bus\n");
  1599 + exit(1);
  1600 + }
  1601 +
  1602 + main_esp = esp_init(hwdef->esp_base, 2,
  1603 + espdma_memory_read, espdma_memory_write,
  1604 + espdma, *espdma_irq, esp_reset);
  1605 +
  1606 + for (i = 0; i < ESP_MAX_DEVS; i++) {
  1607 + drive_index = drive_get_index(IF_SCSI, 0, i);
  1608 + if (drive_index == -1)
  1609 + continue;
  1610 + esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i);
  1611 + }
  1612 +
  1613 + kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename,
  1614 + RAM_size);
  1615 +
  1616 + nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
  1617 + boot_device, RAM_size, kernel_size, graphic_width,
  1618 + graphic_height, graphic_depth, hwdef->nvram_machine_id,
  1619 + "Sun4c");
  1620 +
  1621 + fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
  1622 + fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
  1623 + fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
  1624 + fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
  1625 +}
  1626 +
  1627 +/* SPARCstation 2 hardware initialisation */
  1628 +static void ss2_init(ram_addr_t RAM_size, int vga_ram_size,
  1629 + const char *boot_device, DisplayState *ds,
  1630 + const char *kernel_filename, const char *kernel_cmdline,
  1631 + const char *initrd_filename, const char *cpu_model)
  1632 +{
  1633 + sun4c_hw_init(&sun4c_hwdefs[0], RAM_size, boot_device, ds, kernel_filename,
  1634 + kernel_cmdline, initrd_filename, cpu_model);
  1635 +}
  1636 +
  1637 +QEMUMachine ss2_machine = {
  1638 + .name = "SS-2",
  1639 + .desc = "Sun4c platform, SPARCstation 2",
  1640 + .init = ss2_init,
  1641 + .ram_require = PROM_SIZE_MAX + TCX_SIZE,
  1642 + .nodisk_ok = 1,
  1643 + .use_scsi = 1,
  1644 + .max_cpus = 16,
  1645 +};
  1646 +
... ...