Commit 80e8bd2b0fe8afe3d5f2bd4960ab83514d97b992
1 parent
61b24405
target-ppc: rename ppc405_sdram_init() to ppc4xx_sdram_init()
The SDRAM controller is shared across almost all 405 and 440 embedded processors, with some slight differences such as the sizes supported for each memory bank. Rename only; no functional changes. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6062 c046a42c-6fe2-441c-8c8c-71466251a162
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3 changed files
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4 additions
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4 deletions
hw/ppc405_uc.c
... | ... | @@ -2230,7 +2230,7 @@ CPUState *ppc405cr_init (target_phys_addr_t ram_bases[4], |
2230 | 2230 | pic = ppcuic_init(env, irqs, 0x0C0, 0, 1); |
2231 | 2231 | *picp = pic; |
2232 | 2232 | /* SDRAM controller */ |
2233 | - ppc405_sdram_init(env, pic[14], 1, ram_bases, ram_sizes, do_init); | |
2233 | + ppc4xx_sdram_init(env, pic[14], 1, ram_bases, ram_sizes, do_init); | |
2234 | 2234 | offset = 0; |
2235 | 2235 | for (i = 0; i < 4; i++) |
2236 | 2236 | offset += ram_sizes[i]; |
... | ... | @@ -2588,7 +2588,7 @@ CPUState *ppc405ep_init (target_phys_addr_t ram_bases[2], |
2588 | 2588 | *picp = pic; |
2589 | 2589 | /* SDRAM controller */ |
2590 | 2590 | /* XXX 405EP has no ECC interrupt */ |
2591 | - ppc405_sdram_init(env, pic[17], 2, ram_bases, ram_sizes, do_init); | |
2591 | + ppc4xx_sdram_init(env, pic[17], 2, ram_bases, ram_sizes, do_init); | |
2592 | 2592 | offset = 0; |
2593 | 2593 | for (i = 0; i < 2; i++) |
2594 | 2594 | offset += ram_sizes[i]; | ... | ... |
hw/ppc4xx.h
... | ... | @@ -48,7 +48,7 @@ enum { |
48 | 48 | qemu_irq *ppcuic_init (CPUState *env, qemu_irq *irqs, |
49 | 49 | uint32_t dcr_base, int has_ssr, int has_vr); |
50 | 50 | |
51 | -void ppc405_sdram_init (CPUState *env, qemu_irq irq, int nbanks, | |
51 | +void ppc4xx_sdram_init (CPUState *env, qemu_irq irq, int nbanks, | |
52 | 52 | target_phys_addr_t *ram_bases, |
53 | 53 | target_phys_addr_t *ram_sizes, |
54 | 54 | int do_init); | ... | ... |
hw/ppc4xx_devs.c
... | ... | @@ -846,7 +846,7 @@ static void sdram_reset (void *opaque) |
846 | 846 | sdram_unmap_bcr(sdram); |
847 | 847 | } |
848 | 848 | |
849 | -void ppc405_sdram_init (CPUState *env, qemu_irq irq, int nbanks, | |
849 | +void ppc4xx_sdram_init (CPUState *env, qemu_irq irq, int nbanks, | |
850 | 850 | target_phys_addr_t *ram_bases, |
851 | 851 | target_phys_addr_t *ram_sizes, |
852 | 852 | int do_init) | ... | ... |