Commit 803b3c7b4d3a74d54a3f63857ffecefd539279f9
1 parent
eddf68a6
Fill in real SparcStation 10 values
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2602 c046a42c-6fe2-441c-8c8c-71466251a162
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17 additions
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17 deletions
hw/sun4m.c
| @@ -272,7 +272,8 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size, | @@ -272,7 +272,8 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int ram_size, | ||
| 272 | 272 | ||
| 273 | slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->me_irq, | 273 | slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->me_irq, |
| 274 | slavio_intctl); | 274 | slavio_intctl); |
| 275 | - cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl); | 275 | + if (hwdef->cs_base != (target_ulong)-1) |
| 276 | + cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl); | ||
| 276 | sparc32_dma_set_reset_data(dma, main_esp, main_lance); | 277 | sparc32_dma_set_reset_data(dma, main_esp, main_lance); |
| 277 | } | 278 | } |
| 278 | 279 | ||
| @@ -375,21 +376,20 @@ static const struct hwdef hwdefs[] = { | @@ -375,21 +376,20 @@ static const struct hwdef hwdefs[] = { | ||
| 375 | }, | 376 | }, |
| 376 | }, | 377 | }, |
| 377 | /* SS-10 */ | 378 | /* SS-10 */ |
| 378 | - /* XXX: Replace with real values */ | ||
| 379 | { | 379 | { |
| 380 | - .iommu_base = 0x10000000, | ||
| 381 | - .tcx_base = 0x50000000, | ||
| 382 | - .cs_base = 0x6c000000, | ||
| 383 | - .slavio_base = 0x71000000, | ||
| 384 | - .ms_kb_base = 0x71000000, | ||
| 385 | - .serial_base = 0x71100000, | ||
| 386 | - .nvram_base = 0x71200000, | ||
| 387 | - .fd_base = 0x71400000, | ||
| 388 | - .counter_base = 0x71d00000, | ||
| 389 | - .intctl_base = 0x71e00000, | ||
| 390 | - .dma_base = 0x78400000, | ||
| 391 | - .esp_base = 0x78800000, | ||
| 392 | - .le_base = 0x78c00000, | 380 | + .iommu_base = 0xe0000000, // XXX Actually at 0xfe0000000ULL (36 bits) |
| 381 | + .tcx_base = 0x21000000, // 0xe21000000ULL, | ||
| 382 | + .cs_base = -1, | ||
| 383 | + .slavio_base = 0xf1000000, // 0xff1000000ULL, | ||
| 384 | + .ms_kb_base = 0xf1000000, // 0xff1000000ULL, | ||
| 385 | + .serial_base = 0xf1100000, // 0xff1100000ULL, | ||
| 386 | + .nvram_base = 0xf1200000, // 0xff1200000ULL, | ||
| 387 | + .fd_base = 0xf1700000, // 0xff1700000ULL, | ||
| 388 | + .counter_base = 0xf1300000, // 0xff1300000ULL, | ||
| 389 | + .intctl_base = 0xf1400000, // 0xff1400000ULL, | ||
| 390 | + .dma_base = 0xf0400000, // 0xef0400000ULL, | ||
| 391 | + .esp_base = 0xf0800000, // 0xef0800000ULL, | ||
| 392 | + .le_base = 0xf0c00000, // 0xef0c00000ULL, | ||
| 393 | .vram_size = 0x00100000, | 393 | .vram_size = 0x00100000, |
| 394 | .nvram_size = 0x2000, | 394 | .nvram_size = 0x2000, |
| 395 | .esp_irq = 18, | 395 | .esp_irq = 18, |
| @@ -400,8 +400,8 @@ static const struct hwdef hwdefs[] = { | @@ -400,8 +400,8 @@ static const struct hwdef hwdefs[] = { | ||
| 400 | .ser_irq = 15, | 400 | .ser_irq = 15, |
| 401 | .fd_irq = 22, | 401 | .fd_irq = 22, |
| 402 | .me_irq = 30, | 402 | .me_irq = 30, |
| 403 | - .cs_irq = 5, | ||
| 404 | - .machine_id = 0x73, | 403 | + .cs_irq = -1, |
| 404 | + .machine_id = 0x72, | ||
| 405 | .intbit_to_level = { | 405 | .intbit_to_level = { |
| 406 | 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12, | 406 | 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12, |
| 407 | 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0, | 407 | 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0, |