Commit 7fb4fdcffeb199c1a742c45ac2413be8a9a33354
1 parent
c73f96fd
RAM usage information in machine definition.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4246 c046a42c-6fe2-441c-8c8c-71466251a162
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28 changed files
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98 additions
and
32 deletions
exec.c
| @@ -2093,7 +2093,7 @@ uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr) | @@ -2093,7 +2093,7 @@ uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr) | ||
| 2093 | ram_addr_t qemu_ram_alloc(unsigned int size) | 2093 | ram_addr_t qemu_ram_alloc(unsigned int size) |
| 2094 | { | 2094 | { |
| 2095 | ram_addr_t addr; | 2095 | ram_addr_t addr; |
| 2096 | - if ((phys_ram_alloc_offset + size) >= phys_ram_size) { | 2096 | + if ((phys_ram_alloc_offset + size) > phys_ram_size) { |
| 2097 | fprintf(stderr, "Not enough memory (requested_size = %u, max memory = %d)\n", | 2097 | fprintf(stderr, "Not enough memory (requested_size = %u, max memory = %d)\n", |
| 2098 | size, phys_ram_size); | 2098 | size, phys_ram_size); |
| 2099 | abort(); | 2099 | abort(); |
hw/an5206.c
hw/boards.h
| @@ -14,6 +14,8 @@ typedef struct QEMUMachine { | @@ -14,6 +14,8 @@ typedef struct QEMUMachine { | ||
| 14 | const char *name; | 14 | const char *name; |
| 15 | const char *desc; | 15 | const char *desc; |
| 16 | QEMUMachineInitFunc *init; | 16 | QEMUMachineInitFunc *init; |
| 17 | +#define RAMSIZE_FIXED (1 << 0) | ||
| 18 | + size_t ram_require; | ||
| 17 | struct QEMUMachine *next; | 19 | struct QEMUMachine *next; |
| 18 | } QEMUMachine; | 20 | } QEMUMachine; |
| 19 | 21 |
hw/etraxfs.c
hw/gumstix.c
| @@ -125,10 +125,12 @@ QEMUMachine connex_machine = { | @@ -125,10 +125,12 @@ QEMUMachine connex_machine = { | ||
| 125 | "connex", | 125 | "connex", |
| 126 | "Gumstix Connex (PXA255)", | 126 | "Gumstix Connex (PXA255)", |
| 127 | connex_init, | 127 | connex_init, |
| 128 | + (0x05000000 + PXA2XX_INTERNAL_SIZE) | RAMSIZE_FIXED, | ||
| 128 | }; | 129 | }; |
| 129 | 130 | ||
| 130 | QEMUMachine verdex_machine = { | 131 | QEMUMachine verdex_machine = { |
| 131 | "verdex", | 132 | "verdex", |
| 132 | "Gumstix Verdex (PXA270)", | 133 | "Gumstix Verdex (PXA270)", |
| 133 | verdex_init, | 134 | verdex_init, |
| 135 | + (0x12000000 + PXA2XX_INTERNAL_SIZE) | RAMSIZE_FIXED, | ||
| 134 | }; | 136 | }; |
hw/integratorcp.c
| @@ -231,7 +231,7 @@ static CPUWriteMemoryFunc *integratorcm_writefn[] = { | @@ -231,7 +231,7 @@ static CPUWriteMemoryFunc *integratorcm_writefn[] = { | ||
| 231 | integratorcm_write | 231 | integratorcm_write |
| 232 | }; | 232 | }; |
| 233 | 233 | ||
| 234 | -static void integratorcm_init(int memsz, uint32_t flash_offset) | 234 | +static void integratorcm_init(int memsz) |
| 235 | { | 235 | { |
| 236 | int iomemtype; | 236 | int iomemtype; |
| 237 | integratorcm_state *s; | 237 | integratorcm_state *s; |
| @@ -258,7 +258,7 @@ static void integratorcm_init(int memsz, uint32_t flash_offset) | @@ -258,7 +258,7 @@ static void integratorcm_init(int memsz, uint32_t flash_offset) | ||
| 258 | } | 258 | } |
| 259 | memcpy(integrator_spd + 73, "QEMU-MEMORY", 11); | 259 | memcpy(integrator_spd + 73, "QEMU-MEMORY", 11); |
| 260 | s->cm_init = 0x00000112; | 260 | s->cm_init = 0x00000112; |
| 261 | - s->flash_offset = flash_offset; | 261 | + s->flash_offset = qemu_ram_alloc(0x100000); |
| 262 | 262 | ||
| 263 | iomemtype = cpu_register_io_memory(0, integratorcm_readfn, | 263 | iomemtype = cpu_register_io_memory(0, integratorcm_readfn, |
| 264 | integratorcm_writefn, s); | 264 | integratorcm_writefn, s); |
| @@ -480,7 +480,7 @@ static void integratorcp_init(int ram_size, int vga_ram_size, | @@ -480,7 +480,7 @@ static void integratorcp_init(int ram_size, int vga_ram_size, | ||
| 480 | const char *initrd_filename, const char *cpu_model) | 480 | const char *initrd_filename, const char *cpu_model) |
| 481 | { | 481 | { |
| 482 | CPUState *env; | 482 | CPUState *env; |
| 483 | - uint32_t bios_offset; | 483 | + uint32_t ram_offset; |
| 484 | qemu_irq *pic; | 484 | qemu_irq *pic; |
| 485 | qemu_irq *cpu_pic; | 485 | qemu_irq *cpu_pic; |
| 486 | int sd; | 486 | int sd; |
| @@ -492,15 +492,15 @@ static void integratorcp_init(int ram_size, int vga_ram_size, | @@ -492,15 +492,15 @@ static void integratorcp_init(int ram_size, int vga_ram_size, | ||
| 492 | fprintf(stderr, "Unable to find CPU definition\n"); | 492 | fprintf(stderr, "Unable to find CPU definition\n"); |
| 493 | exit(1); | 493 | exit(1); |
| 494 | } | 494 | } |
| 495 | - bios_offset = ram_size + vga_ram_size; | 495 | + ram_offset = qemu_ram_alloc(ram_size); |
| 496 | /* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */ | 496 | /* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */ |
| 497 | /* ??? RAM shoud repeat to fill physical memory space. */ | 497 | /* ??? RAM shoud repeat to fill physical memory space. */ |
| 498 | /* SDRAM at address zero*/ | 498 | /* SDRAM at address zero*/ |
| 499 | - cpu_register_physical_memory(0, ram_size, IO_MEM_RAM); | 499 | + cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); |
| 500 | /* And again at address 0x80000000 */ | 500 | /* And again at address 0x80000000 */ |
| 501 | - cpu_register_physical_memory(0x80000000, ram_size, IO_MEM_RAM); | 501 | + cpu_register_physical_memory(0x80000000, ram_size, ram_offset | IO_MEM_RAM); |
| 502 | 502 | ||
| 503 | - integratorcm_init(ram_size >> 20, bios_offset); | 503 | + integratorcm_init(ram_size >> 20); |
| 504 | cpu_pic = arm_pic_init_cpu(env); | 504 | cpu_pic = arm_pic_init_cpu(env); |
| 505 | pic = icp_pic_init(0x14000000, cpu_pic[ARM_PIC_CPU_IRQ], | 505 | pic = icp_pic_init(0x14000000, cpu_pic[ARM_PIC_CPU_IRQ], |
| 506 | cpu_pic[ARM_PIC_CPU_FIQ]); | 506 | cpu_pic[ARM_PIC_CPU_FIQ]); |
| @@ -543,4 +543,5 @@ QEMUMachine integratorcp_machine = { | @@ -543,4 +543,5 @@ QEMUMachine integratorcp_machine = { | ||
| 543 | "integratorcp", | 543 | "integratorcp", |
| 544 | "ARM Integrator/CP (ARM926EJ-S)", | 544 | "ARM Integrator/CP (ARM926EJ-S)", |
| 545 | integratorcp_init, | 545 | integratorcp_init, |
| 546 | + 0x100000, | ||
| 546 | }; | 547 | }; |
hw/mainstone.c
| @@ -59,6 +59,10 @@ static struct keymap map[0xE0] = { | @@ -59,6 +59,10 @@ static struct keymap map[0xE0] = { | ||
| 59 | 59 | ||
| 60 | enum mainstone_model_e { mainstone }; | 60 | enum mainstone_model_e { mainstone }; |
| 61 | 61 | ||
| 62 | +#define MAINSTONE_RAM 0x04000000 | ||
| 63 | +#define MAINSTONE_ROM 0x00800000 | ||
| 64 | +#define MAINSTONE_FLASH 0x02000000 | ||
| 65 | + | ||
| 62 | static struct arm_boot_info mainstone_binfo = { | 66 | static struct arm_boot_info mainstone_binfo = { |
| 63 | .loader_start = PXA2XX_SDRAM_BASE, | 67 | .loader_start = PXA2XX_SDRAM_BASE, |
| 64 | .ram_size = 0x04000000, | 68 | .ram_size = 0x04000000, |
| @@ -69,9 +73,6 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, | @@ -69,9 +73,6 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, | ||
| 69 | const char *kernel_cmdline, const char *initrd_filename, | 73 | const char *kernel_cmdline, const char *initrd_filename, |
| 70 | const char *cpu_model, enum mainstone_model_e model, int arm_id) | 74 | const char *cpu_model, enum mainstone_model_e model, int arm_id) |
| 71 | { | 75 | { |
| 72 | - uint32_t mainstone_ram = mainstone_binfo.ram_size; | ||
| 73 | - uint32_t mainstone_rom = 0x00800000; | ||
| 74 | - uint32_t mainstone_flash = 0x02000000; | ||
| 75 | uint32_t sector_len = 256 * 1024; | 76 | uint32_t sector_len = 256 * 1024; |
| 76 | target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 }; | 77 | target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 }; |
| 77 | struct pxa2xx_state_s *cpu; | 78 | struct pxa2xx_state_s *cpu; |
| @@ -82,17 +83,17 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, | @@ -82,17 +83,17 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, | ||
| 82 | cpu_model = "pxa270-c5"; | 83 | cpu_model = "pxa270-c5"; |
| 83 | 84 | ||
| 84 | /* Setup CPU & memory */ | 85 | /* Setup CPU & memory */ |
| 85 | - if (ram_size < mainstone_ram + mainstone_rom + 2 * mainstone_flash + | 86 | + if (ram_size < MAINSTONE_RAM + MAINSTONE_ROM + 2 * MAINSTONE_FLASH + |
| 86 | PXA2XX_INTERNAL_SIZE) { | 87 | PXA2XX_INTERNAL_SIZE) { |
| 87 | fprintf(stderr, "This platform requires %i bytes of memory\n", | 88 | fprintf(stderr, "This platform requires %i bytes of memory\n", |
| 88 | - mainstone_ram + mainstone_rom + 2 * mainstone_flash + | 89 | + MAINSTONE_RAM + MAINSTONE_ROM + 2 * MAINSTONE_FLASH + |
| 89 | PXA2XX_INTERNAL_SIZE); | 90 | PXA2XX_INTERNAL_SIZE); |
| 90 | exit(1); | 91 | exit(1); |
| 91 | } | 92 | } |
| 92 | 93 | ||
| 93 | - cpu = pxa270_init(mainstone_ram, ds, cpu_model); | ||
| 94 | - cpu_register_physical_memory(0, mainstone_rom, | ||
| 95 | - qemu_ram_alloc(mainstone_rom) | IO_MEM_ROM); | 94 | + cpu = pxa270_init(mainstone_binfo.ram_size, ds, cpu_model); |
| 95 | + cpu_register_physical_memory(0, MAINSTONE_ROM, | ||
| 96 | + qemu_ram_alloc(MAINSTONE_ROM) | IO_MEM_ROM); | ||
| 96 | 97 | ||
| 97 | /* Setup initial (reset) machine state */ | 98 | /* Setup initial (reset) machine state */ |
| 98 | cpu->env->regs[15] = mainstone_binfo.loader_start; | 99 | cpu->env->regs[15] = mainstone_binfo.loader_start; |
| @@ -107,9 +108,9 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, | @@ -107,9 +108,9 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, | ||
| 107 | } | 108 | } |
| 108 | 109 | ||
| 109 | if (!pflash_cfi01_register(mainstone_flash_base[i], | 110 | if (!pflash_cfi01_register(mainstone_flash_base[i], |
| 110 | - qemu_ram_alloc(mainstone_flash), | 111 | + qemu_ram_alloc(MAINSTONE_FLASH), |
| 111 | drives_table[index].bdrv, sector_len, | 112 | drives_table[index].bdrv, sector_len, |
| 112 | - mainstone_flash / sector_len, 4, 0, 0, 0, 0)) { | 113 | + MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0)) { |
| 113 | fprintf(stderr, "qemu: Error registering flash memory.\n"); | 114 | fprintf(stderr, "qemu: Error registering flash memory.\n"); |
| 114 | exit(1); | 115 | exit(1); |
| 115 | } | 116 | } |
| @@ -146,4 +147,6 @@ QEMUMachine mainstone2_machine = { | @@ -146,4 +147,6 @@ QEMUMachine mainstone2_machine = { | ||
| 146 | "mainstone", | 147 | "mainstone", |
| 147 | "Mainstone II (PXA27x)", | 148 | "Mainstone II (PXA27x)", |
| 148 | mainstone_init, | 149 | mainstone_init, |
| 150 | + (MAINSTONE_RAM + MAINSTONE_ROM + 2 * MAINSTONE_FLASH + | ||
| 151 | + PXA2XX_INTERNAL_SIZE) | RAMSIZE_FIXED, | ||
| 149 | }; | 152 | }; |
hw/mcf5208.c
hw/mips_jazz.c
| @@ -277,10 +277,12 @@ QEMUMachine mips_magnum_machine = { | @@ -277,10 +277,12 @@ QEMUMachine mips_magnum_machine = { | ||
| 277 | "magnum", | 277 | "magnum", |
| 278 | "MIPS Magnum", | 278 | "MIPS Magnum", |
| 279 | mips_magnum_init, | 279 | mips_magnum_init, |
| 280 | + MAGNUM_BIOS_SIZE + VGA_RAM_SIZE, | ||
| 280 | }; | 281 | }; |
| 281 | 282 | ||
| 282 | QEMUMachine mips_pica61_machine = { | 283 | QEMUMachine mips_pica61_machine = { |
| 283 | "pica61", | 284 | "pica61", |
| 284 | "Acer Pica 61", | 285 | "Acer Pica 61", |
| 285 | mips_pica61_init, | 286 | mips_pica61_init, |
| 287 | + MAGNUM_BIOS_SIZE + VGA_RAM_SIZE, | ||
| 286 | }; | 288 | }; |
hw/mips_malta.c
hw/mips_mipssim.c
| @@ -195,4 +195,5 @@ QEMUMachine mips_mipssim_machine = { | @@ -195,4 +195,5 @@ QEMUMachine mips_mipssim_machine = { | ||
| 195 | "mipssim", | 195 | "mipssim", |
| 196 | "MIPS MIPSsim platform", | 196 | "MIPS MIPSsim platform", |
| 197 | mips_mipssim_init, | 197 | mips_mipssim_init, |
| 198 | + BIOS_SIZE + VGA_RAM_SIZE /* unused */, | ||
| 198 | }; | 199 | }; |
hw/mips_r4k.c
hw/nseries.c
| @@ -941,4 +941,5 @@ QEMUMachine n800_machine = { | @@ -941,4 +941,5 @@ QEMUMachine n800_machine = { | ||
| 941 | "n800", | 941 | "n800", |
| 942 | "Nokia N800 aka. RX-34 tablet (OMAP2420)", | 942 | "Nokia N800 aka. RX-34 tablet (OMAP2420)", |
| 943 | n800_init, | 943 | n800_init, |
| 944 | + (0x08000000 + 0x00010000 + OMAP242X_SRAM_SIZE) | RAMSIZE_FIXED, | ||
| 944 | }; | 945 | }; |
hw/palm.c
| @@ -274,4 +274,5 @@ QEMUMachine palmte_machine = { | @@ -274,4 +274,5 @@ QEMUMachine palmte_machine = { | ||
| 274 | "cheetah", | 274 | "cheetah", |
| 275 | "Palm Tungsten|E aka. Cheetah PDA (OMAP310)", | 275 | "Palm Tungsten|E aka. Cheetah PDA (OMAP310)", |
| 276 | palmte_init, | 276 | palmte_init, |
| 277 | + (0x02000000 + 0x00800000 + OMAP15XX_SRAM_SIZE) | RAMSIZE_FIXED, | ||
| 277 | }; | 278 | }; |
hw/pc.c
| @@ -39,6 +39,8 @@ | @@ -39,6 +39,8 @@ | ||
| 39 | #define VGABIOS_FILENAME "vgabios.bin" | 39 | #define VGABIOS_FILENAME "vgabios.bin" |
| 40 | #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" | 40 | #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
| 41 | 41 | ||
| 42 | +#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024) | ||
| 43 | + | ||
| 42 | /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */ | 44 | /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */ |
| 43 | #define ACPI_DATA_SIZE 0x10000 | 45 | #define ACPI_DATA_SIZE 0x10000 |
| 44 | 46 | ||
| @@ -1018,10 +1020,12 @@ QEMUMachine pc_machine = { | @@ -1018,10 +1020,12 @@ QEMUMachine pc_machine = { | ||
| 1018 | "pc", | 1020 | "pc", |
| 1019 | "Standard PC", | 1021 | "Standard PC", |
| 1020 | pc_init_pci, | 1022 | pc_init_pci, |
| 1023 | + VGA_RAM_SIZE + PC_MAX_BIOS_SIZE, | ||
| 1021 | }; | 1024 | }; |
| 1022 | 1025 | ||
| 1023 | QEMUMachine isapc_machine = { | 1026 | QEMUMachine isapc_machine = { |
| 1024 | "isapc", | 1027 | "isapc", |
| 1025 | "ISA-only PC", | 1028 | "ISA-only PC", |
| 1026 | pc_init_isa, | 1029 | pc_init_isa, |
| 1030 | + VGA_RAM_SIZE + PC_MAX_BIOS_SIZE, | ||
| 1027 | }; | 1031 | }; |
hw/ppc405_boards.c
| @@ -360,6 +360,7 @@ QEMUMachine ref405ep_machine = { | @@ -360,6 +360,7 @@ QEMUMachine ref405ep_machine = { | ||
| 360 | "ref405ep", | 360 | "ref405ep", |
| 361 | "ref405ep", | 361 | "ref405ep", |
| 362 | ref405ep_init, | 362 | ref405ep_init, |
| 363 | + (128 * 1024 * 1024 + 4096 + 512 * 1024 + BIOS_SIZE) | RAMSIZE_FIXED, | ||
| 363 | }; | 364 | }; |
| 364 | 365 | ||
| 365 | /*****************************************************************************/ | 366 | /*****************************************************************************/ |
| @@ -642,4 +643,5 @@ QEMUMachine taihu_machine = { | @@ -642,4 +643,5 @@ QEMUMachine taihu_machine = { | ||
| 642 | "taihu", | 643 | "taihu", |
| 643 | "taihu", | 644 | "taihu", |
| 644 | taihu_405ep_init, | 645 | taihu_405ep_init, |
| 646 | + (128 * 1024 * 1024 + 4096 + BIOS_SIZE + 32 * 1024 * 1024) | RAMSIZE_FIXED, | ||
| 645 | }; | 647 | }; |
hw/ppc_chrp.c
hw/ppc_oldworld.c
hw/ppc_prep.c
hw/r2d.c
| @@ -69,5 +69,6 @@ static void r2d_init(int ram_size, int vga_ram_size, | @@ -69,5 +69,6 @@ static void r2d_init(int ram_size, int vga_ram_size, | ||
| 69 | QEMUMachine r2d_machine = { | 69 | QEMUMachine r2d_machine = { |
| 70 | "r2d", | 70 | "r2d", |
| 71 | "r2d-plus board", | 71 | "r2d-plus board", |
| 72 | - r2d_init | 72 | + r2d_init, |
| 73 | + SDRAM_SIZE | RAMSIZE_FIXED | ||
| 73 | }; | 74 | }; |
hw/realview.c
| @@ -199,5 +199,6 @@ static void realview_init(int ram_size, int vga_ram_size, | @@ -199,5 +199,6 @@ static void realview_init(int ram_size, int vga_ram_size, | ||
| 199 | QEMUMachine realview_machine = { | 199 | QEMUMachine realview_machine = { |
| 200 | "realview", | 200 | "realview", |
| 201 | "ARM RealView Emulation Baseboard (ARM926EJ-S)", | 201 | "ARM RealView Emulation Baseboard (ARM926EJ-S)", |
| 202 | - realview_init | 202 | + realview_init, |
| 203 | + 0x1000 | ||
| 203 | }; | 204 | }; |
hw/shix.c
| @@ -110,5 +110,6 @@ static void shix_init(int ram_size, int vga_ram_size, | @@ -110,5 +110,6 @@ static void shix_init(int ram_size, int vga_ram_size, | ||
| 110 | QEMUMachine shix_machine = { | 110 | QEMUMachine shix_machine = { |
| 111 | "shix", | 111 | "shix", |
| 112 | "shix card", | 112 | "shix card", |
| 113 | - shix_init | 113 | + shix_init, |
| 114 | + (0x00004000 + 0x01000000 + 0x01000000) | RAMSIZE_FIXED | ||
| 114 | }; | 115 | }; |
hw/spitz.c
| @@ -1180,6 +1180,9 @@ static void sl_bootparam_write(uint32_t ptr) | @@ -1180,6 +1180,9 @@ static void sl_bootparam_write(uint32_t ptr) | ||
| 1180 | /* Board init. */ | 1180 | /* Board init. */ |
| 1181 | enum spitz_model_e { spitz, akita, borzoi, terrier }; | 1181 | enum spitz_model_e { spitz, akita, borzoi, terrier }; |
| 1182 | 1182 | ||
| 1183 | +#define SPITZ_RAM 0x04000000 | ||
| 1184 | +#define SPITZ_ROM 0x00800000 | ||
| 1185 | + | ||
| 1183 | static struct arm_boot_info spitz_binfo = { | 1186 | static struct arm_boot_info spitz_binfo = { |
| 1184 | .loader_start = PXA2XX_SDRAM_BASE, | 1187 | .loader_start = PXA2XX_SDRAM_BASE, |
| 1185 | .ram_size = 0x04000000, | 1188 | .ram_size = 0x04000000, |
| @@ -1190,8 +1193,6 @@ static void spitz_common_init(int ram_size, int vga_ram_size, | @@ -1190,8 +1193,6 @@ static void spitz_common_init(int ram_size, int vga_ram_size, | ||
| 1190 | const char *kernel_cmdline, const char *initrd_filename, | 1193 | const char *kernel_cmdline, const char *initrd_filename, |
| 1191 | const char *cpu_model, enum spitz_model_e model, int arm_id) | 1194 | const char *cpu_model, enum spitz_model_e model, int arm_id) |
| 1192 | { | 1195 | { |
| 1193 | - uint32_t spitz_ram = spitz_binfo.ram_size; | ||
| 1194 | - uint32_t spitz_rom = 0x00800000; | ||
| 1195 | struct pxa2xx_state_s *cpu; | 1196 | struct pxa2xx_state_s *cpu; |
| 1196 | struct scoop_info_s *scp; | 1197 | struct scoop_info_s *scp; |
| 1197 | 1198 | ||
| @@ -1199,17 +1200,17 @@ static void spitz_common_init(int ram_size, int vga_ram_size, | @@ -1199,17 +1200,17 @@ static void spitz_common_init(int ram_size, int vga_ram_size, | ||
| 1199 | cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0"; | 1200 | cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0"; |
| 1200 | 1201 | ||
| 1201 | /* Setup CPU & memory */ | 1202 | /* Setup CPU & memory */ |
| 1202 | - if (ram_size < spitz_ram + spitz_rom + PXA2XX_INTERNAL_SIZE) { | 1203 | + if (ram_size < SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE) { |
| 1203 | fprintf(stderr, "This platform requires %i bytes of memory\n", | 1204 | fprintf(stderr, "This platform requires %i bytes of memory\n", |
| 1204 | - spitz_ram + spitz_rom + PXA2XX_INTERNAL_SIZE); | 1205 | + SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE); |
| 1205 | exit(1); | 1206 | exit(1); |
| 1206 | } | 1207 | } |
| 1207 | - cpu = pxa270_init(spitz_ram, ds, cpu_model); | 1208 | + cpu = pxa270_init(spitz_binfo.ram_size, ds, cpu_model); |
| 1208 | 1209 | ||
| 1209 | sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M); | 1210 | sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M); |
| 1210 | 1211 | ||
| 1211 | - cpu_register_physical_memory(0, spitz_rom, | ||
| 1212 | - qemu_ram_alloc(spitz_rom) | IO_MEM_ROM); | 1212 | + cpu_register_physical_memory(0, SPITZ_ROM, |
| 1213 | + qemu_ram_alloc(SPITZ_ROM) | IO_MEM_ROM); | ||
| 1213 | 1214 | ||
| 1214 | /* Setup peripherals */ | 1215 | /* Setup peripherals */ |
| 1215 | spitz_keyboard_register(cpu); | 1216 | spitz_keyboard_register(cpu); |
| @@ -1285,22 +1286,26 @@ QEMUMachine akitapda_machine = { | @@ -1285,22 +1286,26 @@ QEMUMachine akitapda_machine = { | ||
| 1285 | "akita", | 1286 | "akita", |
| 1286 | "Akita PDA (PXA270)", | 1287 | "Akita PDA (PXA270)", |
| 1287 | akita_init, | 1288 | akita_init, |
| 1289 | + SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED, | ||
| 1288 | }; | 1290 | }; |
| 1289 | 1291 | ||
| 1290 | QEMUMachine spitzpda_machine = { | 1292 | QEMUMachine spitzpda_machine = { |
| 1291 | "spitz", | 1293 | "spitz", |
| 1292 | "Spitz PDA (PXA270)", | 1294 | "Spitz PDA (PXA270)", |
| 1293 | spitz_init, | 1295 | spitz_init, |
| 1296 | + SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED, | ||
| 1294 | }; | 1297 | }; |
| 1295 | 1298 | ||
| 1296 | QEMUMachine borzoipda_machine = { | 1299 | QEMUMachine borzoipda_machine = { |
| 1297 | "borzoi", | 1300 | "borzoi", |
| 1298 | "Borzoi PDA (PXA270)", | 1301 | "Borzoi PDA (PXA270)", |
| 1299 | borzoi_init, | 1302 | borzoi_init, |
| 1303 | + SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED, | ||
| 1300 | }; | 1304 | }; |
| 1301 | 1305 | ||
| 1302 | QEMUMachine terrierpda_machine = { | 1306 | QEMUMachine terrierpda_machine = { |
| 1303 | "terrier", | 1307 | "terrier", |
| 1304 | "Terrier PDA (PXA270)", | 1308 | "Terrier PDA (PXA270)", |
| 1305 | terrier_init, | 1309 | terrier_init, |
| 1310 | + SPITZ_RAM + SPITZ_ROM + PXA2XX_INTERNAL_SIZE + RAMSIZE_FIXED, | ||
| 1306 | }; | 1311 | }; |
hw/stellaris.c
| @@ -1189,10 +1189,12 @@ QEMUMachine lm3s811evb_machine = { | @@ -1189,10 +1189,12 @@ QEMUMachine lm3s811evb_machine = { | ||
| 1189 | "lm3s811evb", | 1189 | "lm3s811evb", |
| 1190 | "Stellaris LM3S811EVB", | 1190 | "Stellaris LM3S811EVB", |
| 1191 | lm3s811evb_init, | 1191 | lm3s811evb_init, |
| 1192 | + (64 * 1024 * 1024 + 8 * 1024 * 1024) | RAMSIZE_FIXED, | ||
| 1192 | }; | 1193 | }; |
| 1193 | 1194 | ||
| 1194 | QEMUMachine lm3s6965evb_machine = { | 1195 | QEMUMachine lm3s6965evb_machine = { |
| 1195 | "lm3s6965evb", | 1196 | "lm3s6965evb", |
| 1196 | "Stellaris LM3S6965EVB", | 1197 | "Stellaris LM3S6965EVB", |
| 1197 | lm3s6965evb_init, | 1198 | lm3s6965evb_init, |
| 1199 | + (256 * 1024 * 1024 + 64 * 1024 * 1024) | RAMSIZE_FIXED, | ||
| 1198 | }; | 1200 | }; |
hw/sun4m.c
| @@ -1213,60 +1213,70 @@ QEMUMachine ss5_machine = { | @@ -1213,60 +1213,70 @@ QEMUMachine ss5_machine = { | ||
| 1213 | "SS-5", | 1213 | "SS-5", |
| 1214 | "Sun4m platform, SPARCstation 5", | 1214 | "Sun4m platform, SPARCstation 5", |
| 1215 | ss5_init, | 1215 | ss5_init, |
| 1216 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1216 | }; | 1217 | }; |
| 1217 | 1218 | ||
| 1218 | QEMUMachine ss10_machine = { | 1219 | QEMUMachine ss10_machine = { |
| 1219 | "SS-10", | 1220 | "SS-10", |
| 1220 | "Sun4m platform, SPARCstation 10", | 1221 | "Sun4m platform, SPARCstation 10", |
| 1221 | ss10_init, | 1222 | ss10_init, |
| 1223 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1222 | }; | 1224 | }; |
| 1223 | 1225 | ||
| 1224 | QEMUMachine ss600mp_machine = { | 1226 | QEMUMachine ss600mp_machine = { |
| 1225 | "SS-600MP", | 1227 | "SS-600MP", |
| 1226 | "Sun4m platform, SPARCserver 600MP", | 1228 | "Sun4m platform, SPARCserver 600MP", |
| 1227 | ss600mp_init, | 1229 | ss600mp_init, |
| 1230 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1228 | }; | 1231 | }; |
| 1229 | 1232 | ||
| 1230 | QEMUMachine ss20_machine = { | 1233 | QEMUMachine ss20_machine = { |
| 1231 | "SS-20", | 1234 | "SS-20", |
| 1232 | "Sun4m platform, SPARCstation 20", | 1235 | "Sun4m platform, SPARCstation 20", |
| 1233 | ss20_init, | 1236 | ss20_init, |
| 1237 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1234 | }; | 1238 | }; |
| 1235 | 1239 | ||
| 1236 | QEMUMachine ss2_machine = { | 1240 | QEMUMachine ss2_machine = { |
| 1237 | "SS-2", | 1241 | "SS-2", |
| 1238 | "Sun4c platform, SPARCstation 2", | 1242 | "Sun4c platform, SPARCstation 2", |
| 1239 | ss2_init, | 1243 | ss2_init, |
| 1244 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1240 | }; | 1245 | }; |
| 1241 | 1246 | ||
| 1242 | QEMUMachine voyager_machine = { | 1247 | QEMUMachine voyager_machine = { |
| 1243 | "Voyager", | 1248 | "Voyager", |
| 1244 | "Sun4m platform, SPARCstation Voyager", | 1249 | "Sun4m platform, SPARCstation Voyager", |
| 1245 | vger_init, | 1250 | vger_init, |
| 1251 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1246 | }; | 1252 | }; |
| 1247 | 1253 | ||
| 1248 | QEMUMachine ss_lx_machine = { | 1254 | QEMUMachine ss_lx_machine = { |
| 1249 | "LX", | 1255 | "LX", |
| 1250 | "Sun4m platform, SPARCstation LX", | 1256 | "Sun4m platform, SPARCstation LX", |
| 1251 | ss_lx_init, | 1257 | ss_lx_init, |
| 1258 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1252 | }; | 1259 | }; |
| 1253 | 1260 | ||
| 1254 | QEMUMachine ss4_machine = { | 1261 | QEMUMachine ss4_machine = { |
| 1255 | "SS-4", | 1262 | "SS-4", |
| 1256 | "Sun4m platform, SPARCstation 4", | 1263 | "Sun4m platform, SPARCstation 4", |
| 1257 | ss4_init, | 1264 | ss4_init, |
| 1265 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1258 | }; | 1266 | }; |
| 1259 | 1267 | ||
| 1260 | QEMUMachine scls_machine = { | 1268 | QEMUMachine scls_machine = { |
| 1261 | "SPARCClassic", | 1269 | "SPARCClassic", |
| 1262 | "Sun4m platform, SPARCClassic", | 1270 | "Sun4m platform, SPARCClassic", |
| 1263 | scls_init, | 1271 | scls_init, |
| 1272 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1264 | }; | 1273 | }; |
| 1265 | 1274 | ||
| 1266 | QEMUMachine sbook_machine = { | 1275 | QEMUMachine sbook_machine = { |
| 1267 | "SPARCbook", | 1276 | "SPARCbook", |
| 1268 | "Sun4m platform, SPARCbook", | 1277 | "Sun4m platform, SPARCbook", |
| 1269 | sbook_init, | 1278 | sbook_init, |
| 1279 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1270 | }; | 1280 | }; |
| 1271 | 1281 | ||
| 1272 | static const struct sun4d_hwdef sun4d_hwdefs[] = { | 1282 | static const struct sun4d_hwdef sun4d_hwdefs[] = { |
| @@ -1503,10 +1513,12 @@ QEMUMachine ss1000_machine = { | @@ -1503,10 +1513,12 @@ QEMUMachine ss1000_machine = { | ||
| 1503 | "SS-1000", | 1513 | "SS-1000", |
| 1504 | "Sun4d platform, SPARCserver 1000", | 1514 | "Sun4d platform, SPARCserver 1000", |
| 1505 | ss1000_init, | 1515 | ss1000_init, |
| 1516 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1506 | }; | 1517 | }; |
| 1507 | 1518 | ||
| 1508 | QEMUMachine ss2000_machine = { | 1519 | QEMUMachine ss2000_machine = { |
| 1509 | "SS-2000", | 1520 | "SS-2000", |
| 1510 | "Sun4d platform, SPARCcenter 2000", | 1521 | "Sun4d platform, SPARCcenter 2000", |
| 1511 | ss2000_init, | 1522 | ss2000_init, |
| 1523 | + PROM_SIZE_MAX + 0x00100000, | ||
| 1512 | }; | 1524 | }; |
hw/sun4u.c
sysemu.h
| @@ -108,8 +108,6 @@ extern const char *prom_envs[MAX_PROM_ENVS]; | @@ -108,8 +108,6 @@ extern const char *prom_envs[MAX_PROM_ENVS]; | ||
| 108 | extern unsigned int nb_prom_envs; | 108 | extern unsigned int nb_prom_envs; |
| 109 | #endif | 109 | #endif |
| 110 | 110 | ||
| 111 | -/* XXX: make it dynamic */ | ||
| 112 | -#define MAX_BIOS_SIZE (4 * 1024 * 1024) | ||
| 113 | #if defined (TARGET_PPC) | 111 | #if defined (TARGET_PPC) |
| 114 | #define BIOS_SIZE (1024 * 1024) | 112 | #define BIOS_SIZE (1024 * 1024) |
| 115 | #elif defined (TARGET_SPARC64) | 113 | #elif defined (TARGET_SPARC64) |
vl.c
| @@ -8277,7 +8277,7 @@ int main(int argc, char **argv) | @@ -8277,7 +8277,7 @@ int main(int argc, char **argv) | ||
| 8277 | machine = first_machine; | 8277 | machine = first_machine; |
| 8278 | cpu_model = NULL; | 8278 | cpu_model = NULL; |
| 8279 | initrd_filename = NULL; | 8279 | initrd_filename = NULL; |
| 8280 | - ram_size = DEFAULT_RAM_SIZE * 1024 * 1024; | 8280 | + ram_size = -1; |
| 8281 | vga_ram_size = VGA_RAM_SIZE; | 8281 | vga_ram_size = VGA_RAM_SIZE; |
| 8282 | #ifdef CONFIG_GDBSTUB | 8282 | #ifdef CONFIG_GDBSTUB |
| 8283 | use_gdbstub = 0; | 8283 | use_gdbstub = 0; |
| @@ -8963,7 +8963,25 @@ int main(int argc, char **argv) | @@ -8963,7 +8963,25 @@ int main(int argc, char **argv) | ||
| 8963 | #endif | 8963 | #endif |
| 8964 | 8964 | ||
| 8965 | /* init the memory */ | 8965 | /* init the memory */ |
| 8966 | - phys_ram_size = ram_size + vga_ram_size + MAX_BIOS_SIZE; | 8966 | + phys_ram_size = machine->ram_require & ~RAMSIZE_FIXED; |
| 8967 | + | ||
| 8968 | + if (machine->ram_require & RAMSIZE_FIXED) { | ||
| 8969 | + if (ram_size > 0) { | ||
| 8970 | + if (ram_size < phys_ram_size) { | ||
| 8971 | + fprintf(stderr, "Machine `%s' requires %i bytes of memory\n", | ||
| 8972 | + machine->name, phys_ram_size); | ||
| 8973 | + exit(-1); | ||
| 8974 | + } | ||
| 8975 | + | ||
| 8976 | + phys_ram_size = ram_size; | ||
| 8977 | + } else | ||
| 8978 | + ram_size = phys_ram_size; | ||
| 8979 | + } else { | ||
| 8980 | + if (ram_size < 0) | ||
| 8981 | + ram_size = DEFAULT_RAM_SIZE * 1024 * 1024; | ||
| 8982 | + | ||
| 8983 | + phys_ram_size += ram_size; | ||
| 8984 | + } | ||
| 8967 | 8985 | ||
| 8968 | phys_ram_base = qemu_vmalloc(phys_ram_size); | 8986 | phys_ram_base = qemu_vmalloc(phys_ram_size); |
| 8969 | if (!phys_ram_base) { | 8987 | if (!phys_ram_base) { |