Commit 7e8c2b6ca8bed50375fb5bb3363d46588c526ef9
1 parent
dcf24905
Convert float helpers to TCG, fix fabsq in the process
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
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5 changed files
with
232 additions
and
281 deletions
target-sparc/exec.h
| ... | ... | @@ -52,53 +52,21 @@ register uint32_t T2 asm(AREG3); |
| 52 | 52 | void cpu_lock(void); |
| 53 | 53 | void cpu_unlock(void); |
| 54 | 54 | void cpu_loop_exit(void); |
| 55 | -void helper_ldfsr(void); | |
| 56 | 55 | void set_cwp(int new_cwp); |
| 57 | 56 | void do_fitos(void); |
| 58 | 57 | void do_fitod(void); |
| 59 | -void do_fabss(void); | |
| 60 | -void do_fsqrts(void); | |
| 61 | -void do_fsqrtd(void); | |
| 62 | -void do_fcmps(void); | |
| 63 | -void do_fcmpd(void); | |
| 64 | -void do_fcmpes(void); | |
| 65 | -void do_fcmped(void); | |
| 66 | 58 | #if defined(CONFIG_USER_ONLY) |
| 67 | 59 | void do_fitoq(void); |
| 68 | -void do_fsqrtq(void); | |
| 69 | -void do_fcmpq(void); | |
| 70 | -void do_fcmpeq(void); | |
| 71 | 60 | #endif |
| 72 | 61 | #ifdef TARGET_SPARC64 |
| 73 | -void do_fabsd(void); | |
| 74 | 62 | void do_fxtos(void); |
| 75 | 63 | void do_fxtod(void); |
| 76 | -void do_fcmps_fcc1(void); | |
| 77 | -void do_fcmpd_fcc1(void); | |
| 78 | -void do_fcmps_fcc2(void); | |
| 79 | -void do_fcmpd_fcc2(void); | |
| 80 | -void do_fcmps_fcc3(void); | |
| 81 | -void do_fcmpd_fcc3(void); | |
| 82 | -void do_fcmpes_fcc1(void); | |
| 83 | -void do_fcmped_fcc1(void); | |
| 84 | -void do_fcmpes_fcc2(void); | |
| 85 | -void do_fcmped_fcc2(void); | |
| 86 | -void do_fcmpes_fcc3(void); | |
| 87 | -void do_fcmped_fcc3(void); | |
| 88 | 64 | #if defined(CONFIG_USER_ONLY) |
| 89 | -void do_fabsq(void); | |
| 90 | 65 | void do_fxtoq(void); |
| 91 | -void do_fcmpq_fcc1(void); | |
| 92 | -void do_fcmpq_fcc2(void); | |
| 93 | -void do_fcmpq_fcc3(void); | |
| 94 | -void do_fcmpeq_fcc1(void); | |
| 95 | -void do_fcmpeq_fcc2(void); | |
| 96 | -void do_fcmpeq_fcc3(void); | |
| 97 | 66 | #endif |
| 98 | 67 | #endif |
| 99 | 68 | void do_interrupt(int intno); |
| 100 | 69 | void raise_exception(int tt); |
| 101 | -void check_ieee_exceptions(); | |
| 102 | 70 | void memcpy32(target_ulong *dst, const target_ulong *src); |
| 103 | 71 | target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev); |
| 104 | 72 | void dump_mmu(CPUState *env); | ... | ... |
target-sparc/helper.h
| ... | ... | @@ -33,3 +33,42 @@ uint64_t TCG_HELPER_PROTO helper_ld_asi(target_ulong addr, int asi, |
| 33 | 33 | int size, int sign); |
| 34 | 34 | void TCG_HELPER_PROTO helper_st_asi(target_ulong addr, uint64_t val, int asi, |
| 35 | 35 | int size); |
| 36 | +void TCG_HELPER_PROTO helper_ldfsr(void); | |
| 37 | +void TCG_HELPER_PROTO helper_check_ieee_exceptions(void); | |
| 38 | +void TCG_HELPER_PROTO helper_clear_float_exceptions(void); | |
| 39 | +void TCG_HELPER_PROTO helper_fabss(void); | |
| 40 | +void TCG_HELPER_PROTO helper_fsqrts(void); | |
| 41 | +void TCG_HELPER_PROTO helper_fsqrtd(void); | |
| 42 | +void TCG_HELPER_PROTO helper_fcmps(void); | |
| 43 | +void TCG_HELPER_PROTO helper_fcmpd(void); | |
| 44 | +void TCG_HELPER_PROTO helper_fcmpes(void); | |
| 45 | +void TCG_HELPER_PROTO helper_fcmped(void); | |
| 46 | +#if defined(CONFIG_USER_ONLY) | |
| 47 | +void TCG_HELPER_PROTO helper_fsqrtq(void); | |
| 48 | +void TCG_HELPER_PROTO helper_fcmpq(void); | |
| 49 | +void TCG_HELPER_PROTO helper_fcmpeq(void); | |
| 50 | +#endif | |
| 51 | +#ifdef TARGET_SPARC64 | |
| 52 | +void TCG_HELPER_PROTO helper_fabsd(void); | |
| 53 | +void TCG_HELPER_PROTO helper_fcmps_fcc1(void); | |
| 54 | +void TCG_HELPER_PROTO helper_fcmpd_fcc1(void); | |
| 55 | +void TCG_HELPER_PROTO helper_fcmps_fcc2(void); | |
| 56 | +void TCG_HELPER_PROTO helper_fcmpd_fcc2(void); | |
| 57 | +void TCG_HELPER_PROTO helper_fcmps_fcc3(void); | |
| 58 | +void TCG_HELPER_PROTO helper_fcmpd_fcc3(void); | |
| 59 | +void TCG_HELPER_PROTO helper_fcmpes_fcc1(void); | |
| 60 | +void TCG_HELPER_PROTO helper_fcmped_fcc1(void); | |
| 61 | +void TCG_HELPER_PROTO helper_fcmpes_fcc2(void); | |
| 62 | +void TCG_HELPER_PROTO helper_fcmped_fcc2(void); | |
| 63 | +void TCG_HELPER_PROTO helper_fcmpes_fcc3(void); | |
| 64 | +void TCG_HELPER_PROTO helper_fcmped_fcc3(void); | |
| 65 | +#if defined(CONFIG_USER_ONLY) | |
| 66 | +void TCG_HELPER_PROTO helper_fabsq(void); | |
| 67 | +void TCG_HELPER_PROTO helper_fcmpq_fcc1(void); | |
| 68 | +void TCG_HELPER_PROTO helper_fcmpq_fcc2(void); | |
| 69 | +void TCG_HELPER_PROTO helper_fcmpq_fcc3(void); | |
| 70 | +void TCG_HELPER_PROTO helper_fcmpeq_fcc1(void); | |
| 71 | +void TCG_HELPER_PROTO helper_fcmpeq_fcc2(void); | |
| 72 | +void TCG_HELPER_PROTO helper_fcmpeq_fcc3(void); | |
| 73 | +#endif | |
| 74 | +#endif | ... | ... |
target-sparc/op.c
| ... | ... | @@ -763,7 +763,6 @@ void OPPROTO op_logic_T0_cc(void) |
| 763 | 763 | void OPPROTO op_ldfsr(void) |
| 764 | 764 | { |
| 765 | 765 | PUT_FSR32(env, *((uint32_t *) &FT0)); |
| 766 | - helper_ldfsr(); | |
| 767 | 766 | } |
| 768 | 767 | |
| 769 | 768 | void OPPROTO op_stfsr(void) |
| ... | ... | @@ -1157,46 +1156,31 @@ void OPPROTO op_jz_T2_label(void) |
| 1157 | 1156 | FORCE_RET(); |
| 1158 | 1157 | } |
| 1159 | 1158 | |
| 1160 | -void OPPROTO op_clear_ieee_excp_and_FTT(void) | |
| 1161 | -{ | |
| 1162 | - env->fsr &= ~(FSR_FTT_MASK | FSR_CEXC_MASK);; | |
| 1163 | -} | |
| 1164 | - | |
| 1165 | 1159 | #define F_OP(name, p) void OPPROTO op_f##name##p(void) |
| 1166 | 1160 | |
| 1167 | 1161 | #if defined(CONFIG_USER_ONLY) |
| 1168 | 1162 | #define F_BINOP(name) \ |
| 1169 | 1163 | F_OP(name, s) \ |
| 1170 | 1164 | { \ |
| 1171 | - set_float_exception_flags(0, &env->fp_status); \ | |
| 1172 | 1165 | FT0 = float32_ ## name (FT0, FT1, &env->fp_status); \ |
| 1173 | - check_ieee_exceptions(); \ | |
| 1174 | 1166 | } \ |
| 1175 | 1167 | F_OP(name, d) \ |
| 1176 | 1168 | { \ |
| 1177 | - set_float_exception_flags(0, &env->fp_status); \ | |
| 1178 | 1169 | DT0 = float64_ ## name (DT0, DT1, &env->fp_status); \ |
| 1179 | - check_ieee_exceptions(); \ | |
| 1180 | 1170 | } \ |
| 1181 | 1171 | F_OP(name, q) \ |
| 1182 | 1172 | { \ |
| 1183 | - set_float_exception_flags(0, &env->fp_status); \ | |
| 1184 | 1173 | QT0 = float128_ ## name (QT0, QT1, &env->fp_status); \ |
| 1185 | - check_ieee_exceptions(); \ | |
| 1186 | 1174 | } |
| 1187 | 1175 | #else |
| 1188 | 1176 | #define F_BINOP(name) \ |
| 1189 | 1177 | F_OP(name, s) \ |
| 1190 | 1178 | { \ |
| 1191 | - set_float_exception_flags(0, &env->fp_status); \ | |
| 1192 | 1179 | FT0 = float32_ ## name (FT0, FT1, &env->fp_status); \ |
| 1193 | - check_ieee_exceptions(); \ | |
| 1194 | 1180 | } \ |
| 1195 | 1181 | F_OP(name, d) \ |
| 1196 | 1182 | { \ |
| 1197 | - set_float_exception_flags(0, &env->fp_status); \ | |
| 1198 | 1183 | DT0 = float64_ ## name (DT0, DT1, &env->fp_status); \ |
| 1199 | - check_ieee_exceptions(); \ | |
| 1200 | 1184 | } |
| 1201 | 1185 | #endif |
| 1202 | 1186 | |
| ... | ... | @@ -1208,21 +1192,17 @@ F_BINOP(div); |
| 1208 | 1192 | |
| 1209 | 1193 | void OPPROTO op_fsmuld(void) |
| 1210 | 1194 | { |
| 1211 | - set_float_exception_flags(0, &env->fp_status); | |
| 1212 | 1195 | DT0 = float64_mul(float32_to_float64(FT0, &env->fp_status), |
| 1213 | 1196 | float32_to_float64(FT1, &env->fp_status), |
| 1214 | 1197 | &env->fp_status); |
| 1215 | - check_ieee_exceptions(); | |
| 1216 | 1198 | } |
| 1217 | 1199 | |
| 1218 | 1200 | #if defined(CONFIG_USER_ONLY) |
| 1219 | 1201 | void OPPROTO op_fdmulq(void) |
| 1220 | 1202 | { |
| 1221 | - set_float_exception_flags(0, &env->fp_status); | |
| 1222 | 1203 | QT0 = float128_mul(float64_to_float128(DT0, &env->fp_status), |
| 1223 | 1204 | float64_to_float128(DT1, &env->fp_status), |
| 1224 | 1205 | &env->fp_status); |
| 1225 | - check_ieee_exceptions(); | |
| 1226 | 1206 | } |
| 1227 | 1207 | #endif |
| 1228 | 1208 | |
| ... | ... | @@ -1252,134 +1232,23 @@ void OPPROTO op_fdmulq(void) |
| 1252 | 1232 | } |
| 1253 | 1233 | #endif |
| 1254 | 1234 | |
| 1255 | -F_HELPER(sqrt); | |
| 1256 | - | |
| 1257 | 1235 | F_OP(neg, s) |
| 1258 | 1236 | { |
| 1259 | 1237 | FT0 = float32_chs(FT1); |
| 1260 | 1238 | } |
| 1261 | 1239 | |
| 1262 | -F_OP(abs, s) | |
| 1263 | -{ | |
| 1264 | - do_fabss(); | |
| 1265 | -} | |
| 1266 | - | |
| 1267 | -F_HELPER(cmp); | |
| 1268 | -F_HELPER(cmpe); | |
| 1269 | - | |
| 1270 | 1240 | #ifdef TARGET_SPARC64 |
| 1271 | 1241 | F_OP(neg, d) |
| 1272 | 1242 | { |
| 1273 | 1243 | DT0 = float64_chs(DT1); |
| 1274 | 1244 | } |
| 1275 | 1245 | |
| 1276 | -F_OP(abs, d) | |
| 1277 | -{ | |
| 1278 | - do_fabsd(); | |
| 1279 | -} | |
| 1280 | - | |
| 1281 | 1246 | #if defined(CONFIG_USER_ONLY) |
| 1282 | 1247 | F_OP(neg, q) |
| 1283 | 1248 | { |
| 1284 | 1249 | QT0 = float128_chs(QT1); |
| 1285 | 1250 | } |
| 1286 | 1251 | |
| 1287 | -F_OP(abs, q) | |
| 1288 | -{ | |
| 1289 | - do_fabsd(); | |
| 1290 | -} | |
| 1291 | -#endif | |
| 1292 | - | |
| 1293 | -void OPPROTO op_fcmps_fcc1(void) | |
| 1294 | -{ | |
| 1295 | - do_fcmps_fcc1(); | |
| 1296 | -} | |
| 1297 | - | |
| 1298 | -void OPPROTO op_fcmpd_fcc1(void) | |
| 1299 | -{ | |
| 1300 | - do_fcmpd_fcc1(); | |
| 1301 | -} | |
| 1302 | - | |
| 1303 | -void OPPROTO op_fcmps_fcc2(void) | |
| 1304 | -{ | |
| 1305 | - do_fcmps_fcc2(); | |
| 1306 | -} | |
| 1307 | - | |
| 1308 | -void OPPROTO op_fcmpd_fcc2(void) | |
| 1309 | -{ | |
| 1310 | - do_fcmpd_fcc2(); | |
| 1311 | -} | |
| 1312 | - | |
| 1313 | -void OPPROTO op_fcmps_fcc3(void) | |
| 1314 | -{ | |
| 1315 | - do_fcmps_fcc3(); | |
| 1316 | -} | |
| 1317 | - | |
| 1318 | -void OPPROTO op_fcmpd_fcc3(void) | |
| 1319 | -{ | |
| 1320 | - do_fcmpd_fcc3(); | |
| 1321 | -} | |
| 1322 | - | |
| 1323 | -void OPPROTO op_fcmpes_fcc1(void) | |
| 1324 | -{ | |
| 1325 | - do_fcmpes_fcc1(); | |
| 1326 | -} | |
| 1327 | - | |
| 1328 | -void OPPROTO op_fcmped_fcc1(void) | |
| 1329 | -{ | |
| 1330 | - do_fcmped_fcc1(); | |
| 1331 | -} | |
| 1332 | - | |
| 1333 | -void OPPROTO op_fcmpes_fcc2(void) | |
| 1334 | -{ | |
| 1335 | - do_fcmpes_fcc2(); | |
| 1336 | -} | |
| 1337 | - | |
| 1338 | -void OPPROTO op_fcmped_fcc2(void) | |
| 1339 | -{ | |
| 1340 | - do_fcmped_fcc2(); | |
| 1341 | -} | |
| 1342 | - | |
| 1343 | -void OPPROTO op_fcmpes_fcc3(void) | |
| 1344 | -{ | |
| 1345 | - do_fcmpes_fcc3(); | |
| 1346 | -} | |
| 1347 | - | |
| 1348 | -void OPPROTO op_fcmped_fcc3(void) | |
| 1349 | -{ | |
| 1350 | - do_fcmped_fcc3(); | |
| 1351 | -} | |
| 1352 | - | |
| 1353 | -#if defined(CONFIG_USER_ONLY) | |
| 1354 | -void OPPROTO op_fcmpq_fcc1(void) | |
| 1355 | -{ | |
| 1356 | - do_fcmpq_fcc1(); | |
| 1357 | -} | |
| 1358 | - | |
| 1359 | -void OPPROTO op_fcmpq_fcc2(void) | |
| 1360 | -{ | |
| 1361 | - do_fcmpq_fcc2(); | |
| 1362 | -} | |
| 1363 | - | |
| 1364 | -void OPPROTO op_fcmpq_fcc3(void) | |
| 1365 | -{ | |
| 1366 | - do_fcmpq_fcc3(); | |
| 1367 | -} | |
| 1368 | - | |
| 1369 | -void OPPROTO op_fcmpeq_fcc1(void) | |
| 1370 | -{ | |
| 1371 | - do_fcmpeq_fcc1(); | |
| 1372 | -} | |
| 1373 | - | |
| 1374 | -void OPPROTO op_fcmpeq_fcc2(void) | |
| 1375 | -{ | |
| 1376 | - do_fcmpeq_fcc2(); | |
| 1377 | -} | |
| 1378 | - | |
| 1379 | -void OPPROTO op_fcmpeq_fcc3(void) | |
| 1380 | -{ | |
| 1381 | - do_fcmpeq_fcc3(); | |
| 1382 | -} | |
| 1383 | 1252 | #endif |
| 1384 | 1253 | |
| 1385 | 1254 | #endif |
| ... | ... | @@ -1393,47 +1262,35 @@ F_HELPER(xto); |
| 1393 | 1262 | #else |
| 1394 | 1263 | F_OP(ito, s) |
| 1395 | 1264 | { |
| 1396 | - set_float_exception_flags(0, &env->fp_status); | |
| 1397 | 1265 | FT0 = int32_to_float32(*((int32_t *)&FT1), &env->fp_status); |
| 1398 | - check_ieee_exceptions(); | |
| 1399 | 1266 | } |
| 1400 | 1267 | |
| 1401 | 1268 | F_OP(ito, d) |
| 1402 | 1269 | { |
| 1403 | - set_float_exception_flags(0, &env->fp_status); | |
| 1404 | 1270 | DT0 = int32_to_float64(*((int32_t *)&FT1), &env->fp_status); |
| 1405 | - check_ieee_exceptions(); | |
| 1406 | 1271 | } |
| 1407 | 1272 | |
| 1408 | 1273 | #if defined(CONFIG_USER_ONLY) |
| 1409 | 1274 | F_OP(ito, q) |
| 1410 | 1275 | { |
| 1411 | - set_float_exception_flags(0, &env->fp_status); | |
| 1412 | 1276 | QT0 = int32_to_float128(*((int32_t *)&FT1), &env->fp_status); |
| 1413 | - check_ieee_exceptions(); | |
| 1414 | 1277 | } |
| 1415 | 1278 | #endif |
| 1416 | 1279 | |
| 1417 | 1280 | #ifdef TARGET_SPARC64 |
| 1418 | 1281 | F_OP(xto, s) |
| 1419 | 1282 | { |
| 1420 | - set_float_exception_flags(0, &env->fp_status); | |
| 1421 | 1283 | FT0 = int64_to_float32(*((int64_t *)&DT1), &env->fp_status); |
| 1422 | - check_ieee_exceptions(); | |
| 1423 | 1284 | } |
| 1424 | 1285 | |
| 1425 | 1286 | F_OP(xto, d) |
| 1426 | 1287 | { |
| 1427 | - set_float_exception_flags(0, &env->fp_status); | |
| 1428 | 1288 | DT0 = int64_to_float64(*((int64_t *)&DT1), &env->fp_status); |
| 1429 | - check_ieee_exceptions(); | |
| 1430 | 1289 | } |
| 1431 | 1290 | #if defined(CONFIG_USER_ONLY) |
| 1432 | 1291 | F_OP(xto, q) |
| 1433 | 1292 | { |
| 1434 | - set_float_exception_flags(0, &env->fp_status); | |
| 1435 | 1293 | QT0 = int64_to_float128(*((int64_t *)&DT1), &env->fp_status); |
| 1436 | - check_ieee_exceptions(); | |
| 1437 | 1294 | } |
| 1438 | 1295 | #endif |
| 1439 | 1296 | #endif |
| ... | ... | @@ -1443,93 +1300,69 @@ F_OP(xto, q) |
| 1443 | 1300 | /* floating point conversion */ |
| 1444 | 1301 | void OPPROTO op_fdtos(void) |
| 1445 | 1302 | { |
| 1446 | - set_float_exception_flags(0, &env->fp_status); | |
| 1447 | 1303 | FT0 = float64_to_float32(DT1, &env->fp_status); |
| 1448 | - check_ieee_exceptions(); | |
| 1449 | 1304 | } |
| 1450 | 1305 | |
| 1451 | 1306 | void OPPROTO op_fstod(void) |
| 1452 | 1307 | { |
| 1453 | - set_float_exception_flags(0, &env->fp_status); | |
| 1454 | 1308 | DT0 = float32_to_float64(FT1, &env->fp_status); |
| 1455 | - check_ieee_exceptions(); | |
| 1456 | 1309 | } |
| 1457 | 1310 | |
| 1458 | 1311 | #if defined(CONFIG_USER_ONLY) |
| 1459 | 1312 | void OPPROTO op_fqtos(void) |
| 1460 | 1313 | { |
| 1461 | - set_float_exception_flags(0, &env->fp_status); | |
| 1462 | 1314 | FT0 = float128_to_float32(QT1, &env->fp_status); |
| 1463 | - check_ieee_exceptions(); | |
| 1464 | 1315 | } |
| 1465 | 1316 | |
| 1466 | 1317 | void OPPROTO op_fstoq(void) |
| 1467 | 1318 | { |
| 1468 | - set_float_exception_flags(0, &env->fp_status); | |
| 1469 | 1319 | QT0 = float32_to_float128(FT1, &env->fp_status); |
| 1470 | - check_ieee_exceptions(); | |
| 1471 | 1320 | } |
| 1472 | 1321 | |
| 1473 | 1322 | void OPPROTO op_fqtod(void) |
| 1474 | 1323 | { |
| 1475 | - set_float_exception_flags(0, &env->fp_status); | |
| 1476 | 1324 | DT0 = float128_to_float64(QT1, &env->fp_status); |
| 1477 | - check_ieee_exceptions(); | |
| 1478 | 1325 | } |
| 1479 | 1326 | |
| 1480 | 1327 | void OPPROTO op_fdtoq(void) |
| 1481 | 1328 | { |
| 1482 | - set_float_exception_flags(0, &env->fp_status); | |
| 1483 | 1329 | QT0 = float64_to_float128(DT1, &env->fp_status); |
| 1484 | - check_ieee_exceptions(); | |
| 1485 | 1330 | } |
| 1486 | 1331 | #endif |
| 1487 | 1332 | |
| 1488 | 1333 | /* Float to integer conversion. */ |
| 1489 | 1334 | void OPPROTO op_fstoi(void) |
| 1490 | 1335 | { |
| 1491 | - set_float_exception_flags(0, &env->fp_status); | |
| 1492 | 1336 | *((int32_t *)&FT0) = float32_to_int32_round_to_zero(FT1, &env->fp_status); |
| 1493 | - check_ieee_exceptions(); | |
| 1494 | 1337 | } |
| 1495 | 1338 | |
| 1496 | 1339 | void OPPROTO op_fdtoi(void) |
| 1497 | 1340 | { |
| 1498 | - set_float_exception_flags(0, &env->fp_status); | |
| 1499 | 1341 | *((int32_t *)&FT0) = float64_to_int32_round_to_zero(DT1, &env->fp_status); |
| 1500 | - check_ieee_exceptions(); | |
| 1501 | 1342 | } |
| 1502 | 1343 | |
| 1503 | 1344 | #if defined(CONFIG_USER_ONLY) |
| 1504 | 1345 | void OPPROTO op_fqtoi(void) |
| 1505 | 1346 | { |
| 1506 | - set_float_exception_flags(0, &env->fp_status); | |
| 1507 | 1347 | *((int32_t *)&FT0) = float128_to_int32_round_to_zero(QT1, &env->fp_status); |
| 1508 | - check_ieee_exceptions(); | |
| 1509 | 1348 | } |
| 1510 | 1349 | #endif |
| 1511 | 1350 | |
| 1512 | 1351 | #ifdef TARGET_SPARC64 |
| 1513 | 1352 | void OPPROTO op_fstox(void) |
| 1514 | 1353 | { |
| 1515 | - set_float_exception_flags(0, &env->fp_status); | |
| 1516 | 1354 | *((int64_t *)&DT0) = float32_to_int64_round_to_zero(FT1, &env->fp_status); |
| 1517 | - check_ieee_exceptions(); | |
| 1518 | 1355 | } |
| 1519 | 1356 | |
| 1520 | 1357 | void OPPROTO op_fdtox(void) |
| 1521 | 1358 | { |
| 1522 | - set_float_exception_flags(0, &env->fp_status); | |
| 1523 | 1359 | *((int64_t *)&DT0) = float64_to_int64_round_to_zero(DT1, &env->fp_status); |
| 1524 | - check_ieee_exceptions(); | |
| 1525 | 1360 | } |
| 1526 | 1361 | |
| 1527 | 1362 | #if defined(CONFIG_USER_ONLY) |
| 1528 | 1363 | void OPPROTO op_fqtox(void) |
| 1529 | 1364 | { |
| 1530 | - set_float_exception_flags(0, &env->fp_status); | |
| 1531 | 1365 | *((int64_t *)&DT0) = float128_to_int64_round_to_zero(QT1, &env->fp_status); |
| 1532 | - check_ieee_exceptions(); | |
| 1533 | 1366 | } |
| 1534 | 1367 | #endif |
| 1535 | 1368 | ... | ... |
target-sparc/op_helper.c
| ... | ... | @@ -50,7 +50,7 @@ void helper_trapcc(target_ulong nb_trap, target_ulong do_trap) |
| 50 | 50 | } |
| 51 | 51 | } |
| 52 | 52 | |
| 53 | -void check_ieee_exceptions(void) | |
| 53 | +void helper_check_ieee_exceptions(void) | |
| 54 | 54 | { |
| 55 | 55 | target_ulong status; |
| 56 | 56 | |
| ... | ... | @@ -79,12 +79,15 @@ void check_ieee_exceptions(void) |
| 79 | 79 | } |
| 80 | 80 | } |
| 81 | 81 | |
| 82 | +void helper_clear_float_exceptions(void) | |
| 83 | +{ | |
| 84 | + set_float_exception_flags(0, &env->fp_status); | |
| 85 | +} | |
| 86 | + | |
| 82 | 87 | #ifdef USE_INT_TO_FLOAT_HELPERS |
| 83 | 88 | void do_fitos(void) |
| 84 | 89 | { |
| 85 | - set_float_exception_flags(0, &env->fp_status); | |
| 86 | 90 | FT0 = int32_to_float32(*((int32_t *)&FT1), &env->fp_status); |
| 87 | - check_ieee_exceptions(); | |
| 88 | 91 | } |
| 89 | 92 | |
| 90 | 93 | void do_fitod(void) |
| ... | ... | @@ -102,73 +105,61 @@ void do_fitoq(void) |
| 102 | 105 | #ifdef TARGET_SPARC64 |
| 103 | 106 | void do_fxtos(void) |
| 104 | 107 | { |
| 105 | - set_float_exception_flags(0, &env->fp_status); | |
| 106 | 108 | FT0 = int64_to_float32(*((int64_t *)&DT1), &env->fp_status); |
| 107 | - check_ieee_exceptions(); | |
| 108 | 109 | } |
| 109 | 110 | |
| 110 | 111 | void do_fxtod(void) |
| 111 | 112 | { |
| 112 | - set_float_exception_flags(0, &env->fp_status); | |
| 113 | 113 | DT0 = int64_to_float64(*((int64_t *)&DT1), &env->fp_status); |
| 114 | - check_ieee_exceptions(); | |
| 115 | 114 | } |
| 116 | 115 | |
| 117 | 116 | #if defined(CONFIG_USER_ONLY) |
| 118 | 117 | void do_fxtoq(void) |
| 119 | 118 | { |
| 120 | - set_float_exception_flags(0, &env->fp_status); | |
| 121 | 119 | QT0 = int64_to_float128(*((int32_t *)&DT1), &env->fp_status); |
| 122 | - check_ieee_exceptions(); | |
| 123 | 120 | } |
| 124 | 121 | #endif |
| 125 | 122 | #endif |
| 126 | 123 | #endif |
| 127 | 124 | |
| 128 | -void do_fabss(void) | |
| 125 | +void helper_fabss(void) | |
| 129 | 126 | { |
| 130 | 127 | FT0 = float32_abs(FT1); |
| 131 | 128 | } |
| 132 | 129 | |
| 133 | 130 | #ifdef TARGET_SPARC64 |
| 134 | -void do_fabsd(void) | |
| 131 | +void helper_fabsd(void) | |
| 135 | 132 | { |
| 136 | 133 | DT0 = float64_abs(DT1); |
| 137 | 134 | } |
| 138 | 135 | |
| 139 | 136 | #if defined(CONFIG_USER_ONLY) |
| 140 | -void do_fabsq(void) | |
| 137 | +void helper_fabsq(void) | |
| 141 | 138 | { |
| 142 | 139 | QT0 = float128_abs(QT1); |
| 143 | 140 | } |
| 144 | 141 | #endif |
| 145 | 142 | #endif |
| 146 | 143 | |
| 147 | -void do_fsqrts(void) | |
| 144 | +void helper_fsqrts(void) | |
| 148 | 145 | { |
| 149 | - set_float_exception_flags(0, &env->fp_status); | |
| 150 | 146 | FT0 = float32_sqrt(FT1, &env->fp_status); |
| 151 | - check_ieee_exceptions(); | |
| 152 | 147 | } |
| 153 | 148 | |
| 154 | -void do_fsqrtd(void) | |
| 149 | +void helper_fsqrtd(void) | |
| 155 | 150 | { |
| 156 | - set_float_exception_flags(0, &env->fp_status); | |
| 157 | 151 | DT0 = float64_sqrt(DT1, &env->fp_status); |
| 158 | - check_ieee_exceptions(); | |
| 159 | 152 | } |
| 160 | 153 | |
| 161 | 154 | #if defined(CONFIG_USER_ONLY) |
| 162 | -void do_fsqrtq(void) | |
| 155 | +void helper_fsqrtq(void) | |
| 163 | 156 | { |
| 164 | - set_float_exception_flags(0, &env->fp_status); | |
| 165 | 157 | QT0 = float128_sqrt(QT1, &env->fp_status); |
| 166 | - check_ieee_exceptions(); | |
| 167 | 158 | } |
| 168 | 159 | #endif |
| 169 | 160 | |
| 170 | 161 | #define GEN_FCMP(name, size, reg1, reg2, FS, TRAP) \ |
| 171 | - void glue(do_, name) (void) \ | |
| 162 | + void glue(helper_, name) (void) \ | |
| 172 | 163 | { \ |
| 173 | 164 | target_ulong new_fsr; \ |
| 174 | 165 | \ | ... | ... |
target-sparc/translate.c
| ... | ... | @@ -690,50 +690,121 @@ static void do_branch_reg(DisasContext * dc, int32_t offset, uint32_t insn) |
| 690 | 690 | } |
| 691 | 691 | |
| 692 | 692 | static GenOpFunc * const gen_fcmps[4] = { |
| 693 | - gen_op_fcmps, | |
| 694 | - gen_op_fcmps_fcc1, | |
| 695 | - gen_op_fcmps_fcc2, | |
| 696 | - gen_op_fcmps_fcc3, | |
| 693 | + helper_fcmps, | |
| 694 | + helper_fcmps_fcc1, | |
| 695 | + helper_fcmps_fcc2, | |
| 696 | + helper_fcmps_fcc3, | |
| 697 | 697 | }; |
| 698 | 698 | |
| 699 | 699 | static GenOpFunc * const gen_fcmpd[4] = { |
| 700 | - gen_op_fcmpd, | |
| 701 | - gen_op_fcmpd_fcc1, | |
| 702 | - gen_op_fcmpd_fcc2, | |
| 703 | - gen_op_fcmpd_fcc3, | |
| 700 | + helper_fcmpd, | |
| 701 | + helper_fcmpd_fcc1, | |
| 702 | + helper_fcmpd_fcc2, | |
| 703 | + helper_fcmpd_fcc3, | |
| 704 | 704 | }; |
| 705 | 705 | |
| 706 | 706 | #if defined(CONFIG_USER_ONLY) |
| 707 | 707 | static GenOpFunc * const gen_fcmpq[4] = { |
| 708 | - gen_op_fcmpq, | |
| 709 | - gen_op_fcmpq_fcc1, | |
| 710 | - gen_op_fcmpq_fcc2, | |
| 711 | - gen_op_fcmpq_fcc3, | |
| 708 | + helper_fcmpq, | |
| 709 | + helper_fcmpq_fcc1, | |
| 710 | + helper_fcmpq_fcc2, | |
| 711 | + helper_fcmpq_fcc3, | |
| 712 | 712 | }; |
| 713 | 713 | #endif |
| 714 | 714 | |
| 715 | 715 | static GenOpFunc * const gen_fcmpes[4] = { |
| 716 | - gen_op_fcmpes, | |
| 717 | - gen_op_fcmpes_fcc1, | |
| 718 | - gen_op_fcmpes_fcc2, | |
| 719 | - gen_op_fcmpes_fcc3, | |
| 716 | + helper_fcmpes, | |
| 717 | + helper_fcmpes_fcc1, | |
| 718 | + helper_fcmpes_fcc2, | |
| 719 | + helper_fcmpes_fcc3, | |
| 720 | 720 | }; |
| 721 | 721 | |
| 722 | 722 | static GenOpFunc * const gen_fcmped[4] = { |
| 723 | - gen_op_fcmped, | |
| 724 | - gen_op_fcmped_fcc1, | |
| 725 | - gen_op_fcmped_fcc2, | |
| 726 | - gen_op_fcmped_fcc3, | |
| 723 | + helper_fcmped, | |
| 724 | + helper_fcmped_fcc1, | |
| 725 | + helper_fcmped_fcc2, | |
| 726 | + helper_fcmped_fcc3, | |
| 727 | 727 | }; |
| 728 | 728 | |
| 729 | 729 | #if defined(CONFIG_USER_ONLY) |
| 730 | 730 | static GenOpFunc * const gen_fcmpeq[4] = { |
| 731 | - gen_op_fcmpeq, | |
| 732 | - gen_op_fcmpeq_fcc1, | |
| 733 | - gen_op_fcmpeq_fcc2, | |
| 734 | - gen_op_fcmpeq_fcc3, | |
| 731 | + helper_fcmpeq, | |
| 732 | + helper_fcmpeq_fcc1, | |
| 733 | + helper_fcmpeq_fcc2, | |
| 734 | + helper_fcmpeq_fcc3, | |
| 735 | 735 | }; |
| 736 | 736 | #endif |
| 737 | + | |
| 738 | +static inline void gen_op_fcmps(int fccno) | |
| 739 | +{ | |
| 740 | + tcg_gen_helper_0_0(gen_fcmps[fccno]); | |
| 741 | +} | |
| 742 | + | |
| 743 | +static inline void gen_op_fcmpd(int fccno) | |
| 744 | +{ | |
| 745 | + tcg_gen_helper_0_0(gen_fcmpd[fccno]); | |
| 746 | +} | |
| 747 | + | |
| 748 | +#if defined(CONFIG_USER_ONLY) | |
| 749 | +static inline void gen_op_fcmpq(int fccno) | |
| 750 | +{ | |
| 751 | + tcg_gen_helper_0_0(gen_fcmpq[fccno]); | |
| 752 | +} | |
| 753 | +#endif | |
| 754 | + | |
| 755 | +static inline void gen_op_fcmpes(int fccno) | |
| 756 | +{ | |
| 757 | + tcg_gen_helper_0_0(gen_fcmpes[fccno]); | |
| 758 | +} | |
| 759 | + | |
| 760 | +static inline void gen_op_fcmped(int fccno) | |
| 761 | +{ | |
| 762 | + tcg_gen_helper_0_0(gen_fcmped[fccno]); | |
| 763 | +} | |
| 764 | + | |
| 765 | +#if defined(CONFIG_USER_ONLY) | |
| 766 | +static inline void gen_op_fcmpeq(int fccno) | |
| 767 | +{ | |
| 768 | + tcg_gen_helper_0_0(gen_fcmpeq[fccno]); | |
| 769 | +} | |
| 770 | +#endif | |
| 771 | + | |
| 772 | +#else | |
| 773 | + | |
| 774 | +static inline void gen_op_fcmps(int fccno) | |
| 775 | +{ | |
| 776 | + tcg_gen_helper_0_0(helper_fcmps); | |
| 777 | +} | |
| 778 | + | |
| 779 | +static inline void gen_op_fcmpd(int fccno) | |
| 780 | +{ | |
| 781 | + tcg_gen_helper_0_0(helper_fcmpd); | |
| 782 | +} | |
| 783 | + | |
| 784 | +#if defined(CONFIG_USER_ONLY) | |
| 785 | +static inline void gen_op_fcmpq(int fccno) | |
| 786 | +{ | |
| 787 | + tcg_gen_helper_0_0(helper_fcmpq); | |
| 788 | +} | |
| 789 | +#endif | |
| 790 | + | |
| 791 | +static inline void gen_op_fcmpes(int fccno) | |
| 792 | +{ | |
| 793 | + tcg_gen_helper_0_0(helper_fcmpes); | |
| 794 | +} | |
| 795 | + | |
| 796 | +static inline void gen_op_fcmped(int fccno) | |
| 797 | +{ | |
| 798 | + tcg_gen_helper_0_0(helper_fcmped); | |
| 799 | +} | |
| 800 | + | |
| 801 | +#if defined(CONFIG_USER_ONLY) | |
| 802 | +static inline void gen_op_fcmpeq(int fccno) | |
| 803 | +{ | |
| 804 | + tcg_gen_helper_0_0(helper_fcmpeq); | |
| 805 | +} | |
| 806 | +#endif | |
| 807 | + | |
| 737 | 808 | #endif |
| 738 | 809 | |
| 739 | 810 | static int gen_trap_ifnofpu(DisasContext * dc) |
| ... | ... | @@ -749,6 +820,18 @@ static int gen_trap_ifnofpu(DisasContext * dc) |
| 749 | 820 | return 0; |
| 750 | 821 | } |
| 751 | 822 | |
| 823 | +static inline void gen_op_clear_ieee_excp_and_FTT(void) | |
| 824 | +{ | |
| 825 | + tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, fsr)); | |
| 826 | + tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, ~(FSR_FTT_MASK | FSR_CEXC_MASK)); | |
| 827 | + tcg_gen_st_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, fsr)); | |
| 828 | +} | |
| 829 | + | |
| 830 | +static inline void gen_clear_float_exceptions(void) | |
| 831 | +{ | |
| 832 | + tcg_gen_helper_0_0(helper_clear_float_exceptions); | |
| 833 | +} | |
| 834 | + | |
| 752 | 835 | /* asi moves */ |
| 753 | 836 | #ifdef TARGET_SPARC64 |
| 754 | 837 | static inline void gen_ld_asi(int insn, int size, int sign) |
| ... | ... | @@ -1406,23 +1489,29 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1406 | 1489 | break; |
| 1407 | 1490 | case 0x9: /* fabss */ |
| 1408 | 1491 | gen_op_load_fpr_FT1(rs2); |
| 1409 | - gen_op_fabss(); | |
| 1492 | + tcg_gen_helper_0_0(helper_fabss); | |
| 1410 | 1493 | gen_op_store_FT0_fpr(rd); |
| 1411 | 1494 | break; |
| 1412 | 1495 | case 0x29: /* fsqrts */ |
| 1413 | 1496 | gen_op_load_fpr_FT1(rs2); |
| 1414 | - gen_op_fsqrts(); | |
| 1497 | + gen_clear_float_exceptions(); | |
| 1498 | + tcg_gen_helper_0_0(helper_fsqrts); | |
| 1499 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1415 | 1500 | gen_op_store_FT0_fpr(rd); |
| 1416 | 1501 | break; |
| 1417 | 1502 | case 0x2a: /* fsqrtd */ |
| 1418 | 1503 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1419 | - gen_op_fsqrtd(); | |
| 1504 | + gen_clear_float_exceptions(); | |
| 1505 | + tcg_gen_helper_0_0(helper_fsqrtd); | |
| 1506 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1420 | 1507 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1421 | 1508 | break; |
| 1422 | 1509 | case 0x2b: /* fsqrtq */ |
| 1423 | 1510 | #if defined(CONFIG_USER_ONLY) |
| 1424 | 1511 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 1425 | - gen_op_fsqrtq(); | |
| 1512 | + gen_clear_float_exceptions(); | |
| 1513 | + tcg_gen_helper_0_0(helper_fsqrtq); | |
| 1514 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1426 | 1515 | gen_op_store_QT0_fpr(QFPREG(rd)); |
| 1427 | 1516 | break; |
| 1428 | 1517 | #else |
| ... | ... | @@ -1431,20 +1520,26 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1431 | 1520 | case 0x41: |
| 1432 | 1521 | gen_op_load_fpr_FT0(rs1); |
| 1433 | 1522 | gen_op_load_fpr_FT1(rs2); |
| 1523 | + gen_clear_float_exceptions(); | |
| 1434 | 1524 | gen_op_fadds(); |
| 1525 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1435 | 1526 | gen_op_store_FT0_fpr(rd); |
| 1436 | 1527 | break; |
| 1437 | 1528 | case 0x42: |
| 1438 | 1529 | gen_op_load_fpr_DT0(DFPREG(rs1)); |
| 1439 | 1530 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1531 | + gen_clear_float_exceptions(); | |
| 1440 | 1532 | gen_op_faddd(); |
| 1533 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1441 | 1534 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1442 | 1535 | break; |
| 1443 | 1536 | case 0x43: /* faddq */ |
| 1444 | 1537 | #if defined(CONFIG_USER_ONLY) |
| 1445 | 1538 | gen_op_load_fpr_QT0(QFPREG(rs1)); |
| 1446 | 1539 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 1540 | + gen_clear_float_exceptions(); | |
| 1447 | 1541 | gen_op_faddq(); |
| 1542 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1448 | 1543 | gen_op_store_QT0_fpr(QFPREG(rd)); |
| 1449 | 1544 | break; |
| 1450 | 1545 | #else |
| ... | ... | @@ -1453,20 +1548,26 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1453 | 1548 | case 0x45: |
| 1454 | 1549 | gen_op_load_fpr_FT0(rs1); |
| 1455 | 1550 | gen_op_load_fpr_FT1(rs2); |
| 1551 | + gen_clear_float_exceptions(); | |
| 1456 | 1552 | gen_op_fsubs(); |
| 1553 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1457 | 1554 | gen_op_store_FT0_fpr(rd); |
| 1458 | 1555 | break; |
| 1459 | 1556 | case 0x46: |
| 1460 | 1557 | gen_op_load_fpr_DT0(DFPREG(rs1)); |
| 1461 | 1558 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1559 | + gen_clear_float_exceptions(); | |
| 1462 | 1560 | gen_op_fsubd(); |
| 1561 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1463 | 1562 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1464 | 1563 | break; |
| 1465 | 1564 | case 0x47: /* fsubq */ |
| 1466 | 1565 | #if defined(CONFIG_USER_ONLY) |
| 1467 | 1566 | gen_op_load_fpr_QT0(QFPREG(rs1)); |
| 1468 | 1567 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 1568 | + gen_clear_float_exceptions(); | |
| 1469 | 1569 | gen_op_fsubq(); |
| 1570 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1470 | 1571 | gen_op_store_QT0_fpr(QFPREG(rd)); |
| 1471 | 1572 | break; |
| 1472 | 1573 | #else |
| ... | ... | @@ -1475,20 +1576,26 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1475 | 1576 | case 0x49: |
| 1476 | 1577 | gen_op_load_fpr_FT0(rs1); |
| 1477 | 1578 | gen_op_load_fpr_FT1(rs2); |
| 1579 | + gen_clear_float_exceptions(); | |
| 1478 | 1580 | gen_op_fmuls(); |
| 1581 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1479 | 1582 | gen_op_store_FT0_fpr(rd); |
| 1480 | 1583 | break; |
| 1481 | 1584 | case 0x4a: |
| 1482 | 1585 | gen_op_load_fpr_DT0(DFPREG(rs1)); |
| 1483 | 1586 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1587 | + gen_clear_float_exceptions(); | |
| 1484 | 1588 | gen_op_fmuld(); |
| 1589 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1485 | 1590 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1486 | 1591 | break; |
| 1487 | 1592 | case 0x4b: /* fmulq */ |
| 1488 | 1593 | #if defined(CONFIG_USER_ONLY) |
| 1489 | 1594 | gen_op_load_fpr_QT0(QFPREG(rs1)); |
| 1490 | 1595 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 1596 | + gen_clear_float_exceptions(); | |
| 1491 | 1597 | gen_op_fmulq(); |
| 1598 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1492 | 1599 | gen_op_store_QT0_fpr(QFPREG(rd)); |
| 1493 | 1600 | break; |
| 1494 | 1601 | #else |
| ... | ... | @@ -1497,20 +1604,26 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1497 | 1604 | case 0x4d: |
| 1498 | 1605 | gen_op_load_fpr_FT0(rs1); |
| 1499 | 1606 | gen_op_load_fpr_FT1(rs2); |
| 1607 | + gen_clear_float_exceptions(); | |
| 1500 | 1608 | gen_op_fdivs(); |
| 1609 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1501 | 1610 | gen_op_store_FT0_fpr(rd); |
| 1502 | 1611 | break; |
| 1503 | 1612 | case 0x4e: |
| 1504 | 1613 | gen_op_load_fpr_DT0(DFPREG(rs1)); |
| 1505 | 1614 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1615 | + gen_clear_float_exceptions(); | |
| 1506 | 1616 | gen_op_fdivd(); |
| 1617 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1507 | 1618 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1508 | 1619 | break; |
| 1509 | 1620 | case 0x4f: /* fdivq */ |
| 1510 | 1621 | #if defined(CONFIG_USER_ONLY) |
| 1511 | 1622 | gen_op_load_fpr_QT0(QFPREG(rs1)); |
| 1512 | 1623 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 1624 | + gen_clear_float_exceptions(); | |
| 1513 | 1625 | gen_op_fdivq(); |
| 1626 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1514 | 1627 | gen_op_store_QT0_fpr(QFPREG(rd)); |
| 1515 | 1628 | break; |
| 1516 | 1629 | #else |
| ... | ... | @@ -1519,14 +1632,18 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1519 | 1632 | case 0x69: |
| 1520 | 1633 | gen_op_load_fpr_FT0(rs1); |
| 1521 | 1634 | gen_op_load_fpr_FT1(rs2); |
| 1635 | + gen_clear_float_exceptions(); | |
| 1522 | 1636 | gen_op_fsmuld(); |
| 1637 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1523 | 1638 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1524 | 1639 | break; |
| 1525 | 1640 | case 0x6e: /* fdmulq */ |
| 1526 | 1641 | #if defined(CONFIG_USER_ONLY) |
| 1527 | 1642 | gen_op_load_fpr_DT0(DFPREG(rs1)); |
| 1528 | 1643 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1644 | + gen_clear_float_exceptions(); | |
| 1529 | 1645 | gen_op_fdmulq(); |
| 1646 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1530 | 1647 | gen_op_store_QT0_fpr(QFPREG(rd)); |
| 1531 | 1648 | break; |
| 1532 | 1649 | #else |
| ... | ... | @@ -1534,18 +1651,24 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1534 | 1651 | #endif |
| 1535 | 1652 | case 0xc4: |
| 1536 | 1653 | gen_op_load_fpr_FT1(rs2); |
| 1654 | + gen_clear_float_exceptions(); | |
| 1537 | 1655 | gen_op_fitos(); |
| 1656 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1538 | 1657 | gen_op_store_FT0_fpr(rd); |
| 1539 | 1658 | break; |
| 1540 | 1659 | case 0xc6: |
| 1541 | 1660 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1661 | + gen_clear_float_exceptions(); | |
| 1542 | 1662 | gen_op_fdtos(); |
| 1663 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1543 | 1664 | gen_op_store_FT0_fpr(rd); |
| 1544 | 1665 | break; |
| 1545 | 1666 | case 0xc7: /* fqtos */ |
| 1546 | 1667 | #if defined(CONFIG_USER_ONLY) |
| 1547 | 1668 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 1669 | + gen_clear_float_exceptions(); | |
| 1548 | 1670 | gen_op_fqtos(); |
| 1671 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1549 | 1672 | gen_op_store_FT0_fpr(rd); |
| 1550 | 1673 | break; |
| 1551 | 1674 | #else |
| ... | ... | @@ -1564,7 +1687,9 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1564 | 1687 | case 0xcb: /* fqtod */ |
| 1565 | 1688 | #if defined(CONFIG_USER_ONLY) |
| 1566 | 1689 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 1690 | + gen_clear_float_exceptions(); | |
| 1567 | 1691 | gen_op_fqtod(); |
| 1692 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1568 | 1693 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1569 | 1694 | break; |
| 1570 | 1695 | #else |
| ... | ... | @@ -1599,18 +1724,24 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1599 | 1724 | #endif |
| 1600 | 1725 | case 0xd1: |
| 1601 | 1726 | gen_op_load_fpr_FT1(rs2); |
| 1727 | + gen_clear_float_exceptions(); | |
| 1602 | 1728 | gen_op_fstoi(); |
| 1729 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1603 | 1730 | gen_op_store_FT0_fpr(rd); |
| 1604 | 1731 | break; |
| 1605 | 1732 | case 0xd2: |
| 1606 | 1733 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1734 | + gen_clear_float_exceptions(); | |
| 1607 | 1735 | gen_op_fdtoi(); |
| 1736 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1608 | 1737 | gen_op_store_FT0_fpr(rd); |
| 1609 | 1738 | break; |
| 1610 | 1739 | case 0xd3: /* fqtoi */ |
| 1611 | 1740 | #if defined(CONFIG_USER_ONLY) |
| 1612 | 1741 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 1742 | + gen_clear_float_exceptions(); | |
| 1613 | 1743 | gen_op_fqtoi(); |
| 1744 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1614 | 1745 | gen_op_store_FT0_fpr(rd); |
| 1615 | 1746 | break; |
| 1616 | 1747 | #else |
| ... | ... | @@ -1645,13 +1776,13 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1645 | 1776 | #endif |
| 1646 | 1777 | case 0xa: /* V9 fabsd */ |
| 1647 | 1778 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1648 | - gen_op_fabsd(); | |
| 1779 | + tcg_gen_helper_0_0(helper_fabsd); | |
| 1649 | 1780 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1650 | 1781 | break; |
| 1651 | 1782 | case 0xb: /* V9 fabsq */ |
| 1652 | 1783 | #if defined(CONFIG_USER_ONLY) |
| 1653 | 1784 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 1654 | - gen_op_fabsq(); | |
| 1785 | + tcg_gen_helper_0_0(helper_fabsq); | |
| 1655 | 1786 | gen_op_store_QT0_fpr(QFPREG(rd)); |
| 1656 | 1787 | break; |
| 1657 | 1788 | #else |
| ... | ... | @@ -1659,18 +1790,24 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1659 | 1790 | #endif |
| 1660 | 1791 | case 0x81: /* V9 fstox */ |
| 1661 | 1792 | gen_op_load_fpr_FT1(rs2); |
| 1793 | + gen_clear_float_exceptions(); | |
| 1662 | 1794 | gen_op_fstox(); |
| 1795 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1663 | 1796 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1664 | 1797 | break; |
| 1665 | 1798 | case 0x82: /* V9 fdtox */ |
| 1666 | 1799 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1800 | + gen_clear_float_exceptions(); | |
| 1667 | 1801 | gen_op_fdtox(); |
| 1802 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1668 | 1803 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1669 | 1804 | break; |
| 1670 | 1805 | case 0x83: /* V9 fqtox */ |
| 1671 | 1806 | #if defined(CONFIG_USER_ONLY) |
| 1672 | 1807 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 1808 | + gen_clear_float_exceptions(); | |
| 1673 | 1809 | gen_op_fqtox(); |
| 1810 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1674 | 1811 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1675 | 1812 | break; |
| 1676 | 1813 | #else |
| ... | ... | @@ -1678,18 +1815,24 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1678 | 1815 | #endif |
| 1679 | 1816 | case 0x84: /* V9 fxtos */ |
| 1680 | 1817 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1818 | + gen_clear_float_exceptions(); | |
| 1681 | 1819 | gen_op_fxtos(); |
| 1820 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1682 | 1821 | gen_op_store_FT0_fpr(rd); |
| 1683 | 1822 | break; |
| 1684 | 1823 | case 0x88: /* V9 fxtod */ |
| 1685 | 1824 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1825 | + gen_clear_float_exceptions(); | |
| 1686 | 1826 | gen_op_fxtod(); |
| 1827 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1687 | 1828 | gen_op_store_DT0_fpr(DFPREG(rd)); |
| 1688 | 1829 | break; |
| 1689 | 1830 | case 0x8c: /* V9 fxtoq */ |
| 1690 | 1831 | #if defined(CONFIG_USER_ONLY) |
| 1691 | 1832 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1833 | + gen_clear_float_exceptions(); | |
| 1692 | 1834 | gen_op_fxtoq(); |
| 1835 | + tcg_gen_helper_0_0(helper_check_ieee_exceptions); | |
| 1693 | 1836 | gen_op_store_QT0_fpr(QFPREG(rd)); |
| 1694 | 1837 | break; |
| 1695 | 1838 | #else |
| ... | ... | @@ -1953,30 +2096,18 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1953 | 2096 | case 0x51: /* fcmps, V9 %fcc */ |
| 1954 | 2097 | gen_op_load_fpr_FT0(rs1); |
| 1955 | 2098 | gen_op_load_fpr_FT1(rs2); |
| 1956 | -#ifdef TARGET_SPARC64 | |
| 1957 | - gen_fcmps[rd & 3](); | |
| 1958 | -#else | |
| 1959 | - gen_op_fcmps(); | |
| 1960 | -#endif | |
| 2099 | + gen_op_fcmps(rd & 3); | |
| 1961 | 2100 | break; |
| 1962 | 2101 | case 0x52: /* fcmpd, V9 %fcc */ |
| 1963 | 2102 | gen_op_load_fpr_DT0(DFPREG(rs1)); |
| 1964 | 2103 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1965 | -#ifdef TARGET_SPARC64 | |
| 1966 | - gen_fcmpd[rd & 3](); | |
| 1967 | -#else | |
| 1968 | - gen_op_fcmpd(); | |
| 1969 | -#endif | |
| 2104 | + gen_op_fcmpd(rd & 3); | |
| 1970 | 2105 | break; |
| 1971 | 2106 | case 0x53: /* fcmpq, V9 %fcc */ |
| 1972 | 2107 | #if defined(CONFIG_USER_ONLY) |
| 1973 | 2108 | gen_op_load_fpr_QT0(QFPREG(rs1)); |
| 1974 | 2109 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 1975 | -#ifdef TARGET_SPARC64 | |
| 1976 | - gen_fcmpq[rd & 3](); | |
| 1977 | -#else | |
| 1978 | - gen_op_fcmpq(); | |
| 1979 | -#endif | |
| 2110 | + gen_op_fcmpq(rd & 3); | |
| 1980 | 2111 | break; |
| 1981 | 2112 | #else /* !defined(CONFIG_USER_ONLY) */ |
| 1982 | 2113 | goto nfpu_insn; |
| ... | ... | @@ -1984,30 +2115,18 @@ static void disas_sparc_insn(DisasContext * dc) |
| 1984 | 2115 | case 0x55: /* fcmpes, V9 %fcc */ |
| 1985 | 2116 | gen_op_load_fpr_FT0(rs1); |
| 1986 | 2117 | gen_op_load_fpr_FT1(rs2); |
| 1987 | -#ifdef TARGET_SPARC64 | |
| 1988 | - gen_fcmpes[rd & 3](); | |
| 1989 | -#else | |
| 1990 | - gen_op_fcmpes(); | |
| 1991 | -#endif | |
| 2118 | + gen_op_fcmpes(rd & 3); | |
| 1992 | 2119 | break; |
| 1993 | 2120 | case 0x56: /* fcmped, V9 %fcc */ |
| 1994 | 2121 | gen_op_load_fpr_DT0(DFPREG(rs1)); |
| 1995 | 2122 | gen_op_load_fpr_DT1(DFPREG(rs2)); |
| 1996 | -#ifdef TARGET_SPARC64 | |
| 1997 | - gen_fcmped[rd & 3](); | |
| 1998 | -#else | |
| 1999 | - gen_op_fcmped(); | |
| 2000 | -#endif | |
| 2123 | + gen_op_fcmped(rd & 3); | |
| 2001 | 2124 | break; |
| 2002 | 2125 | case 0x57: /* fcmpeq, V9 %fcc */ |
| 2003 | 2126 | #if defined(CONFIG_USER_ONLY) |
| 2004 | 2127 | gen_op_load_fpr_QT0(QFPREG(rs1)); |
| 2005 | 2128 | gen_op_load_fpr_QT1(QFPREG(rs2)); |
| 2006 | -#ifdef TARGET_SPARC64 | |
| 2007 | - gen_fcmpeq[rd & 3](); | |
| 2008 | -#else | |
| 2009 | - gen_op_fcmpeq(); | |
| 2010 | -#endif | |
| 2129 | + gen_op_fcmpeq(rd & 3); | |
| 2011 | 2130 | break; |
| 2012 | 2131 | #else/* !defined(CONFIG_USER_ONLY) */ |
| 2013 | 2132 | goto nfpu_insn; |
| ... | ... | @@ -3373,6 +3492,7 @@ static void disas_sparc_insn(DisasContext * dc) |
| 3373 | 3492 | gen_op_check_align_T0_3(); |
| 3374 | 3493 | gen_op_ldst(ldf); |
| 3375 | 3494 | gen_op_ldfsr(); |
| 3495 | + tcg_gen_helper_0_0(helper_ldfsr); | |
| 3376 | 3496 | break; |
| 3377 | 3497 | case 0x22: /* load quad fpreg */ |
| 3378 | 3498 | #if defined(CONFIG_USER_ONLY) | ... | ... |