Commit 7d977de7e19b04c4bb0c95d5afe6d4350d4068e5
1 parent
07d89866
io port API change
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@661 c046a42c-6fe2-441c-8c8c-71466251a162
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2 changed files
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22 additions
and
22 deletions
hw/dma.c
| @@ -78,7 +78,7 @@ enum { | @@ -78,7 +78,7 @@ enum { | ||
| 78 | 78 | ||
| 79 | }; | 79 | }; |
| 80 | 80 | ||
| 81 | -static void write_page (CPUState *env, uint32_t nport, uint32_t data) | 81 | +static void write_page (void *opaque, uint32_t nport, uint32_t data) |
| 82 | { | 82 | { |
| 83 | int ichan; | 83 | int ichan; |
| 84 | int ncont; | 84 | int ncont; |
| @@ -113,7 +113,7 @@ static inline int getff (int ncont) | @@ -113,7 +113,7 @@ static inline int getff (int ncont) | ||
| 113 | return ff; | 113 | return ff; |
| 114 | } | 114 | } |
| 115 | 115 | ||
| 116 | -static uint32_t read_chan (CPUState *env, uint32_t nport) | 116 | +static uint32_t read_chan (void *opaque, uint32_t nport) |
| 117 | { | 117 | { |
| 118 | int ff; | 118 | int ff; |
| 119 | int ncont, ichan, nreg; | 119 | int ncont, ichan, nreg; |
| @@ -135,7 +135,7 @@ static uint32_t read_chan (CPUState *env, uint32_t nport) | @@ -135,7 +135,7 @@ static uint32_t read_chan (CPUState *env, uint32_t nport) | ||
| 135 | return (val >> (ncont + (ff << 3))) & 0xff; | 135 | return (val >> (ncont + (ff << 3))) & 0xff; |
| 136 | } | 136 | } |
| 137 | 137 | ||
| 138 | -static void write_chan (CPUState *env, uint32_t nport, uint32_t data) | 138 | +static void write_chan (void *opaque, uint32_t nport, uint32_t data) |
| 139 | { | 139 | { |
| 140 | int ncont, ichan, nreg; | 140 | int ncont, ichan, nreg; |
| 141 | struct dma_regs *r; | 141 | struct dma_regs *r; |
| @@ -153,7 +153,7 @@ static void write_chan (CPUState *env, uint32_t nport, uint32_t data) | @@ -153,7 +153,7 @@ static void write_chan (CPUState *env, uint32_t nport, uint32_t data) | ||
| 153 | } | 153 | } |
| 154 | } | 154 | } |
| 155 | 155 | ||
| 156 | -static void write_cont (CPUState *env, uint32_t nport, uint32_t data) | 156 | +static void write_cont (void *opaque, uint32_t nport, uint32_t data) |
| 157 | { | 157 | { |
| 158 | int iport, ichan, ncont; | 158 | int iport, ichan, ncont; |
| 159 | struct dma_cont *d; | 159 | struct dma_cont *d; |
| @@ -345,22 +345,22 @@ void DMA_init (void) | @@ -345,22 +345,22 @@ void DMA_init (void) | ||
| 345 | int page_port_list[] = { 0x1, 0x2, 0x3, 0x7 }; | 345 | int page_port_list[] = { 0x1, 0x2, 0x3, 0x7 }; |
| 346 | 346 | ||
| 347 | for (i = 0; i < 8; i++) { | 347 | for (i = 0; i < 8; i++) { |
| 348 | - register_ioport_write (i, 1, write_chan, 1); | 348 | + register_ioport_write (i, 1, 1, write_chan, NULL); |
| 349 | 349 | ||
| 350 | - register_ioport_write (0xc0 + (i << 1), 1, write_chan, 1); | 350 | + register_ioport_write (0xc0 + (i << 1), 1, 1, write_chan, NULL); |
| 351 | 351 | ||
| 352 | - register_ioport_read (i, 1, read_chan, 1); | ||
| 353 | - register_ioport_read (0xc0 + (i << 1), 1, read_chan, 1); | 352 | + register_ioport_read (i, 1, 1, read_chan, NULL); |
| 353 | + register_ioport_read (0xc0 + (i << 1), 1, 1, read_chan, NULL); | ||
| 354 | } | 354 | } |
| 355 | 355 | ||
| 356 | for (i = 0; i < LENOFA (page_port_list); i++) { | 356 | for (i = 0; i < LENOFA (page_port_list); i++) { |
| 357 | - register_ioport_write (page_port_list[i] + 0x80, 1, write_page, 1); | ||
| 358 | - register_ioport_write (page_port_list[i] + 0x88, 1, write_page, 1); | 357 | + register_ioport_write (page_port_list[i] + 0x80, 1, 1, write_page, NULL); |
| 358 | + register_ioport_write (page_port_list[i] + 0x88, 1, 1, write_page, NULL); | ||
| 359 | } | 359 | } |
| 360 | 360 | ||
| 361 | for (i = 0; i < 8; i++) { | 361 | for (i = 0; i < 8; i++) { |
| 362 | - register_ioport_write (i + 8, 1, write_cont, 1); | ||
| 363 | - register_ioport_write (0xd0 + (i << 1), 1, write_cont, 1); | 362 | + register_ioport_write (i + 8, 1, 1, write_cont, NULL); |
| 363 | + register_ioport_write (0xd0 + (i << 1), 1, 1, write_cont, NULL); | ||
| 364 | } | 364 | } |
| 365 | 365 | ||
| 366 | write_cont (NULL, 0x0d, 0); | 366 | write_cont (NULL, 0x0d, 0); |
hw/sb16.c
| @@ -50,9 +50,9 @@ | @@ -50,9 +50,9 @@ | ||
| 50 | #endif | 50 | #endif |
| 51 | 51 | ||
| 52 | #define IO_READ_PROTO(name) \ | 52 | #define IO_READ_PROTO(name) \ |
| 53 | - uint32_t name (struct CPUState *env, uint32_t nport) | 53 | + uint32_t name (void *opaque, uint32_t nport) |
| 54 | #define IO_WRITE_PROTO(name) \ | 54 | #define IO_WRITE_PROTO(name) \ |
| 55 | - void name (struct CPUState *env, uint32_t nport, uint32_t val) | 55 | + void name (void *opaque, uint32_t nport, uint32_t val) |
| 56 | 56 | ||
| 57 | static struct { | 57 | static struct { |
| 58 | int ver_lo; | 58 | int ver_lo; |
| @@ -550,8 +550,8 @@ static IO_WRITE_PROTO(mixer_write_datab) | @@ -550,8 +550,8 @@ static IO_WRITE_PROTO(mixer_write_datab) | ||
| 550 | 550 | ||
| 551 | static IO_WRITE_PROTO(mixer_write_indexw) | 551 | static IO_WRITE_PROTO(mixer_write_indexw) |
| 552 | { | 552 | { |
| 553 | - mixer_write_indexb (env, nport, val & 0xff); | ||
| 554 | - mixer_write_datab (env, nport, (val >> 8) & 0xff); | 553 | + mixer_write_indexb (opaque, nport, val & 0xff); |
| 554 | + mixer_write_datab (opaque, nport, (val >> 8) & 0xff); | ||
| 555 | } | 555 | } |
| 556 | 556 | ||
| 557 | static IO_READ_PROTO(mixer_read) | 557 | static IO_READ_PROTO(mixer_read) |
| @@ -718,17 +718,17 @@ void SB16_init (void) | @@ -718,17 +718,17 @@ void SB16_init (void) | ||
| 718 | } | 718 | } |
| 719 | 719 | ||
| 720 | for (i = 0; i < LENOFA (dsp_write_ports); i++) { | 720 | for (i = 0; i < LENOFA (dsp_write_ports); i++) { |
| 721 | - register_ioport_write (sb.port + dsp_write_ports[i], 1, dsp_write, 1); | 721 | + register_ioport_write (sb.port + dsp_write_ports[i], 1, 1, dsp_write, NULL); |
| 722 | } | 722 | } |
| 723 | 723 | ||
| 724 | for (i = 0; i < LENOFA (dsp_read_ports); i++) { | 724 | for (i = 0; i < LENOFA (dsp_read_ports); i++) { |
| 725 | - register_ioport_read (sb.port + dsp_read_ports[i], 1, dsp_read, 1); | 725 | + register_ioport_read (sb.port + dsp_read_ports[i], 1, 1, dsp_read, NULL); |
| 726 | } | 726 | } |
| 727 | 727 | ||
| 728 | - register_ioport_write (sb.port + 0x4, 1, mixer_write_indexb, 1); | ||
| 729 | - register_ioport_write (sb.port + 0x4, 1, mixer_write_indexw, 2); | ||
| 730 | - register_ioport_read (sb.port + 0x5, 1, mixer_read, 1); | ||
| 731 | - register_ioport_write (sb.port + 0x5, 1, mixer_write_datab, 1); | 728 | + register_ioport_write (sb.port + 0x4, 1, 1, mixer_write_indexb, NULL); |
| 729 | + register_ioport_write (sb.port + 0x4, 1, 2, mixer_write_indexw, NULL); | ||
| 730 | + register_ioport_read (sb.port + 0x5, 1, 1, mixer_read, NULL); | ||
| 731 | + register_ioport_write (sb.port + 0x5, 1, 1, mixer_write_datab, NULL); | ||
| 732 | 732 | ||
| 733 | DMA_register_channel (sb.hdma, SB_read_DMA, NULL); | 733 | DMA_register_channel (sb.hdma, SB_read_DMA, NULL); |
| 734 | DMA_register_channel (sb.dma, SB_read_DMA, NULL); | 734 | DMA_register_channel (sb.dma, SB_read_DMA, NULL); |