Commit 7c560456707bfe53eb1728fcde759be7d9418b62

Authored by blueswir1
1 parent ff403da6

Register only valid register access widths


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3881 c046a42c-6fe2-441c-8c8c-71466251a162
hw/eccmemctl.c
@@ -93,30 +93,6 @@ typedef struct ECCState { @@ -93,30 +93,6 @@ typedef struct ECCState {
93 uint32_t regs[ECC_NREGS]; 93 uint32_t regs[ECC_NREGS];
94 } ECCState; 94 } ECCState;
95 95
96 -static void ecc_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)  
97 -{  
98 - printf("ECC: Unsupported write 0x" TARGET_FMT_plx " %02x\n",  
99 - addr, val & 0xff);  
100 -}  
101 -  
102 -static uint32_t ecc_mem_readb(void *opaque, target_phys_addr_t addr)  
103 -{  
104 - printf("ECC: Unsupported read 0x" TARGET_FMT_plx " 00\n", addr);  
105 - return 0;  
106 -}  
107 -  
108 -static void ecc_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val)  
109 -{  
110 - printf("ECC: Unsupported write 0x" TARGET_FMT_plx " %04x\n",  
111 - addr, val & 0xffff);  
112 -}  
113 -  
114 -static uint32_t ecc_mem_readw(void *opaque, target_phys_addr_t addr)  
115 -{  
116 - printf("ECC: Unsupported read 0x" TARGET_FMT_plx " 0000\n", addr);  
117 - return 0;  
118 -}  
119 -  
120 static void ecc_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) 96 static void ecc_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
121 { 97 {
122 ECCState *s = opaque; 98 ECCState *s = opaque;
@@ -201,14 +177,14 @@ static uint32_t ecc_mem_readl(void *opaque, target_phys_addr_t addr) @@ -201,14 +177,14 @@ static uint32_t ecc_mem_readl(void *opaque, target_phys_addr_t addr)
201 } 177 }
202 178
203 static CPUReadMemoryFunc *ecc_mem_read[3] = { 179 static CPUReadMemoryFunc *ecc_mem_read[3] = {
204 - ecc_mem_readb,  
205 - ecc_mem_readw, 180 + NULL,
  181 + NULL,
206 ecc_mem_readl, 182 ecc_mem_readl,
207 }; 183 };
208 184
209 static CPUWriteMemoryFunc *ecc_mem_write[3] = { 185 static CPUWriteMemoryFunc *ecc_mem_write[3] = {
210 - ecc_mem_writeb,  
211 - ecc_mem_writew, 186 + NULL,
  187 + NULL,
212 ecc_mem_writel, 188 ecc_mem_writel,
213 }; 189 };
214 190
hw/esp.c
@@ -543,14 +543,14 @@ static void esp_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -543,14 +543,14 @@ static void esp_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
543 543
544 static CPUReadMemoryFunc *esp_mem_read[3] = { 544 static CPUReadMemoryFunc *esp_mem_read[3] = {
545 esp_mem_readb, 545 esp_mem_readb,
546 - esp_mem_readb,  
547 - esp_mem_readb, 546 + NULL,
  547 + NULL,
548 }; 548 };
549 549
550 static CPUWriteMemoryFunc *esp_mem_write[3] = { 550 static CPUWriteMemoryFunc *esp_mem_write[3] = {
551 esp_mem_writeb, 551 esp_mem_writeb,
552 - esp_mem_writeb,  
553 - esp_mem_writeb, 552 + NULL,
  553 + NULL,
554 }; 554 };
555 555
556 static void esp_save(QEMUFile *f, void *opaque) 556 static void esp_save(QEMUFile *f, void *opaque)
hw/fdc.c
@@ -493,6 +493,18 @@ static CPUWriteMemoryFunc *fdctrl_mem_write[3] = { @@ -493,6 +493,18 @@ static CPUWriteMemoryFunc *fdctrl_mem_write[3] = {
493 fdctrl_write_mem, 493 fdctrl_write_mem,
494 }; 494 };
495 495
  496 +static CPUReadMemoryFunc *fdctrl_mem_read_strict[3] = {
  497 + fdctrl_read_mem,
  498 + NULL,
  499 + NULL,
  500 +};
  501 +
  502 +static CPUWriteMemoryFunc *fdctrl_mem_write_strict[3] = {
  503 + fdctrl_write_mem,
  504 + NULL,
  505 + NULL,
  506 +};
  507 +
496 static void fd_save (QEMUFile *f, fdrive_t *fd) 508 static void fd_save (QEMUFile *f, fdrive_t *fd)
497 { 509 {
498 uint8_t tmp; 510 uint8_t tmp;
@@ -586,12 +598,11 @@ static void fdctrl_external_reset(void *opaque) @@ -586,12 +598,11 @@ static void fdctrl_external_reset(void *opaque)
586 fdctrl_reset(s, 0); 598 fdctrl_reset(s, 0);
587 } 599 }
588 600
589 -fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,  
590 - target_phys_addr_t io_base,  
591 - BlockDriverState **fds) 601 +static fdctrl_t *fdctrl_init_common (qemu_irq irq, int dma_chann,
  602 + target_phys_addr_t io_base,
  603 + BlockDriverState **fds)
592 { 604 {
593 fdctrl_t *fdctrl; 605 fdctrl_t *fdctrl;
594 - int io_mem;  
595 int i; 606 int i;
596 607
597 FLOPPY_DPRINTF("init controller\n"); 608 FLOPPY_DPRINTF("init controller\n");
@@ -611,7 +622,6 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, @@ -611,7 +622,6 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
611 fdctrl->dma_chann = dma_chann; 622 fdctrl->dma_chann = dma_chann;
612 fdctrl->io_base = io_base; 623 fdctrl->io_base = io_base;
613 fdctrl->config = 0x60; /* Implicit seek, polling & FIFO enabled */ 624 fdctrl->config = 0x60; /* Implicit seek, polling & FIFO enabled */
614 - fdctrl->sun4m = 0;  
615 if (fdctrl->dma_chann != -1) { 625 if (fdctrl->dma_chann != -1) {
616 fdctrl->dma_en = 1; 626 fdctrl->dma_en = 1;
617 DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl); 627 DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl);
@@ -623,6 +633,25 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, @@ -623,6 +633,25 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
623 } 633 }
624 fdctrl_reset(fdctrl, 0); 634 fdctrl_reset(fdctrl, 0);
625 fdctrl->state = FD_CTRL_ACTIVE; 635 fdctrl->state = FD_CTRL_ACTIVE;
  636 + register_savevm("fdc", io_base, 1, fdc_save, fdc_load, fdctrl);
  637 + qemu_register_reset(fdctrl_external_reset, fdctrl);
  638 + for (i = 0; i < 2; i++) {
  639 + fd_revalidate(&fdctrl->drives[i]);
  640 + }
  641 +
  642 + return fdctrl;
  643 +}
  644 +
  645 +fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
  646 + target_phys_addr_t io_base,
  647 + BlockDriverState **fds)
  648 +{
  649 + fdctrl_t *fdctrl;
  650 + int io_mem;
  651 +
  652 + fdctrl = fdctrl_init_common(irq, dma_chann, io_base, fds);
  653 +
  654 + fdctrl->sun4m = 0;
626 if (mem_mapped) { 655 if (mem_mapped) {
627 io_mem = cpu_register_io_memory(0, fdctrl_mem_read, fdctrl_mem_write, 656 io_mem = cpu_register_io_memory(0, fdctrl_mem_read, fdctrl_mem_write,
628 fdctrl); 657 fdctrl);
@@ -637,11 +666,6 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, @@ -637,11 +666,6 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
637 register_ioport_write((uint32_t)io_base + 0x07, 1, 1, &fdctrl_write, 666 register_ioport_write((uint32_t)io_base + 0x07, 1, 1, &fdctrl_write,
638 fdctrl); 667 fdctrl);
639 } 668 }
640 - register_savevm("fdc", io_base, 1, fdc_save, fdc_load, fdctrl);  
641 - qemu_register_reset(fdctrl_external_reset, fdctrl);  
642 - for (i = 0; i < 2; i++) {  
643 - fd_revalidate(&fdctrl->drives[i]);  
644 - }  
645 669
646 return fdctrl; 670 return fdctrl;
647 } 671 }
@@ -650,9 +674,14 @@ fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base, @@ -650,9 +674,14 @@ fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,
650 BlockDriverState **fds) 674 BlockDriverState **fds)
651 { 675 {
652 fdctrl_t *fdctrl; 676 fdctrl_t *fdctrl;
  677 + int io_mem;
653 678
654 - fdctrl = fdctrl_init(irq, 0, 1, io_base, fds); 679 + fdctrl = fdctrl_init_common(irq, 0, io_base, fds);
655 fdctrl->sun4m = 1; 680 fdctrl->sun4m = 1;
  681 + io_mem = cpu_register_io_memory(0, fdctrl_mem_read_strict,
  682 + fdctrl_mem_write_strict,
  683 + fdctrl);
  684 + cpu_register_physical_memory(io_base, 0x08, io_mem);
656 685
657 return fdctrl; 686 return fdctrl;
658 } 687 }
hw/iommu.c
@@ -115,7 +115,7 @@ typedef struct IOMMUState { @@ -115,7 +115,7 @@ typedef struct IOMMUState {
115 qemu_irq irq; 115 qemu_irq irq;
116 } IOMMUState; 116 } IOMMUState;
117 117
118 -static uint32_t iommu_mem_readw(void *opaque, target_phys_addr_t addr) 118 +static uint32_t iommu_mem_readl(void *opaque, target_phys_addr_t addr)
119 { 119 {
120 IOMMUState *s = opaque; 120 IOMMUState *s = opaque;
121 target_phys_addr_t saddr; 121 target_phys_addr_t saddr;
@@ -136,7 +136,7 @@ static uint32_t iommu_mem_readw(void *opaque, target_phys_addr_t addr) @@ -136,7 +136,7 @@ static uint32_t iommu_mem_readw(void *opaque, target_phys_addr_t addr)
136 return ret; 136 return ret;
137 } 137 }
138 138
139 -static void iommu_mem_writew(void *opaque, target_phys_addr_t addr, 139 +static void iommu_mem_writel(void *opaque, target_phys_addr_t addr,
140 uint32_t val) 140 uint32_t val)
141 { 141 {
142 IOMMUState *s = opaque; 142 IOMMUState *s = opaque;
@@ -213,15 +213,15 @@ static void iommu_mem_writew(void *opaque, target_phys_addr_t addr, @@ -213,15 +213,15 @@ static void iommu_mem_writew(void *opaque, target_phys_addr_t addr,
213 } 213 }
214 214
215 static CPUReadMemoryFunc *iommu_mem_read[3] = { 215 static CPUReadMemoryFunc *iommu_mem_read[3] = {
216 - iommu_mem_readw,  
217 - iommu_mem_readw,  
218 - iommu_mem_readw, 216 + NULL,
  217 + NULL,
  218 + iommu_mem_readl,
219 }; 219 };
220 220
221 static CPUWriteMemoryFunc *iommu_mem_write[3] = { 221 static CPUWriteMemoryFunc *iommu_mem_write[3] = {
222 - iommu_mem_writew,  
223 - iommu_mem_writew,  
224 - iommu_mem_writew, 222 + NULL,
  223 + NULL,
  224 + iommu_mem_writel,
225 }; 225 };
226 226
227 static uint32_t iommu_page_get_flags(IOMMUState *s, target_phys_addr_t addr) 227 static uint32_t iommu_page_get_flags(IOMMUState *s, target_phys_addr_t addr)
hw/pcnet.c
@@ -2043,15 +2043,15 @@ static uint32_t lance_mem_readw(void *opaque, target_phys_addr_t addr) @@ -2043,15 +2043,15 @@ static uint32_t lance_mem_readw(void *opaque, target_phys_addr_t addr)
2043 } 2043 }
2044 2044
2045 static CPUReadMemoryFunc *lance_mem_read[3] = { 2045 static CPUReadMemoryFunc *lance_mem_read[3] = {
  2046 + NULL,
2046 lance_mem_readw, 2047 lance_mem_readw,
2047 - lance_mem_readw,  
2048 - lance_mem_readw, 2048 + NULL,
2049 }; 2049 };
2050 2050
2051 static CPUWriteMemoryFunc *lance_mem_write[3] = { 2051 static CPUWriteMemoryFunc *lance_mem_write[3] = {
  2052 + NULL,
2052 lance_mem_writew, 2053 lance_mem_writew,
2053 - lance_mem_writew,  
2054 - lance_mem_writew, 2054 + NULL,
2055 }; 2055 };
2056 2056
2057 void lance_init(NICInfo *nd, target_phys_addr_t leaddr, void *dma_opaque, 2057 void lance_init(NICInfo *nd, target_phys_addr_t leaddr, void *dma_opaque,
hw/sbi.c
@@ -91,14 +91,14 @@ static void sbi_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -91,14 +91,14 @@ static void sbi_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
91 } 91 }
92 92
93 static CPUReadMemoryFunc *sbi_mem_read[3] = { 93 static CPUReadMemoryFunc *sbi_mem_read[3] = {
94 - sbi_mem_readl,  
95 - sbi_mem_readl, 94 + NULL,
  95 + NULL,
96 sbi_mem_readl, 96 sbi_mem_readl,
97 }; 97 };
98 98
99 static CPUWriteMemoryFunc *sbi_mem_write[3] = { 99 static CPUWriteMemoryFunc *sbi_mem_write[3] = {
100 - sbi_mem_writel,  
101 - sbi_mem_writel, 100 + NULL,
  101 + NULL,
102 sbi_mem_writel, 102 sbi_mem_writel,
103 }; 103 };
104 104
hw/slavio_intctl.c
@@ -129,14 +129,14 @@ static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr, uint @@ -129,14 +129,14 @@ static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr, uint
129 } 129 }
130 130
131 static CPUReadMemoryFunc *slavio_intctl_mem_read[3] = { 131 static CPUReadMemoryFunc *slavio_intctl_mem_read[3] = {
132 - slavio_intctl_mem_readl,  
133 - slavio_intctl_mem_readl, 132 + NULL,
  133 + NULL,
134 slavio_intctl_mem_readl, 134 slavio_intctl_mem_readl,
135 }; 135 };
136 136
137 static CPUWriteMemoryFunc *slavio_intctl_mem_write[3] = { 137 static CPUWriteMemoryFunc *slavio_intctl_mem_write[3] = {
138 - slavio_intctl_mem_writel,  
139 - slavio_intctl_mem_writel, 138 + NULL,
  139 + NULL,
140 slavio_intctl_mem_writel, 140 slavio_intctl_mem_writel,
141 }; 141 };
142 142
@@ -200,14 +200,14 @@ static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr, uin @@ -200,14 +200,14 @@ static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr, uin
200 } 200 }
201 201
202 static CPUReadMemoryFunc *slavio_intctlm_mem_read[3] = { 202 static CPUReadMemoryFunc *slavio_intctlm_mem_read[3] = {
203 - slavio_intctlm_mem_readl,  
204 - slavio_intctlm_mem_readl, 203 + NULL,
  204 + NULL,
205 slavio_intctlm_mem_readl, 205 slavio_intctlm_mem_readl,
206 }; 206 };
207 207
208 static CPUWriteMemoryFunc *slavio_intctlm_mem_write[3] = { 208 static CPUWriteMemoryFunc *slavio_intctlm_mem_write[3] = {
209 - slavio_intctlm_mem_writel,  
210 - slavio_intctlm_mem_writel, 209 + NULL,
  210 + NULL,
211 slavio_intctlm_mem_writel, 211 slavio_intctlm_mem_writel,
212 }; 212 };
213 213
hw/slavio_misc.c
@@ -191,14 +191,14 @@ static uint32_t slavio_misc_mem_readb(void *opaque, target_phys_addr_t addr) @@ -191,14 +191,14 @@ static uint32_t slavio_misc_mem_readb(void *opaque, target_phys_addr_t addr)
191 191
192 static CPUReadMemoryFunc *slavio_misc_mem_read[3] = { 192 static CPUReadMemoryFunc *slavio_misc_mem_read[3] = {
193 slavio_misc_mem_readb, 193 slavio_misc_mem_readb,
194 - slavio_misc_mem_readb,  
195 - slavio_misc_mem_readb, 194 + NULL,
  195 + NULL,
196 }; 196 };
197 197
198 static CPUWriteMemoryFunc *slavio_misc_mem_write[3] = { 198 static CPUWriteMemoryFunc *slavio_misc_mem_write[3] = {
199 slavio_misc_mem_writeb, 199 slavio_misc_mem_writeb,
200 - slavio_misc_mem_writeb,  
201 - slavio_misc_mem_writeb, 200 + NULL,
  201 + NULL,
202 }; 202 };
203 203
204 static uint32_t slavio_sysctrl_mem_readl(void *opaque, target_phys_addr_t addr) 204 static uint32_t slavio_sysctrl_mem_readl(void *opaque, target_phys_addr_t addr)
@@ -241,18 +241,18 @@ static void slavio_sysctrl_mem_writel(void *opaque, target_phys_addr_t addr, @@ -241,18 +241,18 @@ static void slavio_sysctrl_mem_writel(void *opaque, target_phys_addr_t addr,
241 } 241 }
242 242
243 static CPUReadMemoryFunc *slavio_sysctrl_mem_read[3] = { 243 static CPUReadMemoryFunc *slavio_sysctrl_mem_read[3] = {
244 - slavio_sysctrl_mem_readl,  
245 - slavio_sysctrl_mem_readl, 244 + NULL,
  245 + NULL,
246 slavio_sysctrl_mem_readl, 246 slavio_sysctrl_mem_readl,
247 }; 247 };
248 248
249 static CPUWriteMemoryFunc *slavio_sysctrl_mem_write[3] = { 249 static CPUWriteMemoryFunc *slavio_sysctrl_mem_write[3] = {
250 - slavio_sysctrl_mem_writel,  
251 - slavio_sysctrl_mem_writel, 250 + NULL,
  251 + NULL,
252 slavio_sysctrl_mem_writel, 252 slavio_sysctrl_mem_writel,
253 }; 253 };
254 254
255 -static uint32_t slavio_led_mem_reads(void *opaque, target_phys_addr_t addr) 255 +static uint32_t slavio_led_mem_readw(void *opaque, target_phys_addr_t addr)
256 { 256 {
257 MiscState *s = opaque; 257 MiscState *s = opaque;
258 uint32_t ret = 0, saddr; 258 uint32_t ret = 0, saddr;
@@ -270,7 +270,7 @@ static uint32_t slavio_led_mem_reads(void *opaque, target_phys_addr_t addr) @@ -270,7 +270,7 @@ static uint32_t slavio_led_mem_reads(void *opaque, target_phys_addr_t addr)
270 return ret; 270 return ret;
271 } 271 }
272 272
273 -static void slavio_led_mem_writes(void *opaque, target_phys_addr_t addr, 273 +static void slavio_led_mem_writew(void *opaque, target_phys_addr_t addr,
274 uint32_t val) 274 uint32_t val)
275 { 275 {
276 MiscState *s = opaque; 276 MiscState *s = opaque;
@@ -289,15 +289,15 @@ static void slavio_led_mem_writes(void *opaque, target_phys_addr_t addr, @@ -289,15 +289,15 @@ static void slavio_led_mem_writes(void *opaque, target_phys_addr_t addr,
289 } 289 }
290 290
291 static CPUReadMemoryFunc *slavio_led_mem_read[3] = { 291 static CPUReadMemoryFunc *slavio_led_mem_read[3] = {
292 - slavio_led_mem_reads,  
293 - slavio_led_mem_reads,  
294 - slavio_led_mem_reads, 292 + NULL,
  293 + slavio_led_mem_readw,
  294 + NULL,
295 }; 295 };
296 296
297 static CPUWriteMemoryFunc *slavio_led_mem_write[3] = { 297 static CPUWriteMemoryFunc *slavio_led_mem_write[3] = {
298 - slavio_led_mem_writes,  
299 - slavio_led_mem_writes,  
300 - slavio_led_mem_writes, 298 + NULL,
  299 + slavio_led_mem_writew,
  300 + NULL,
301 }; 301 };
302 302
303 static void slavio_misc_save(QEMUFile *f, void *opaque) 303 static void slavio_misc_save(QEMUFile *f, void *opaque)
hw/slavio_serial.c
@@ -641,14 +641,14 @@ static void serial_event(void *opaque, int event) @@ -641,14 +641,14 @@ static void serial_event(void *opaque, int event)
641 641
642 static CPUReadMemoryFunc *slavio_serial_mem_read[3] = { 642 static CPUReadMemoryFunc *slavio_serial_mem_read[3] = {
643 slavio_serial_mem_readb, 643 slavio_serial_mem_readb,
644 - slavio_serial_mem_readb,  
645 - slavio_serial_mem_readb, 644 + NULL,
  645 + NULL,
646 }; 646 };
647 647
648 static CPUWriteMemoryFunc *slavio_serial_mem_write[3] = { 648 static CPUWriteMemoryFunc *slavio_serial_mem_write[3] = {
649 slavio_serial_mem_writeb, 649 slavio_serial_mem_writeb,
650 - slavio_serial_mem_writeb,  
651 - slavio_serial_mem_writeb, 650 + NULL,
  651 + NULL,
652 }; 652 };
653 653
654 static void slavio_serial_save_chn(QEMUFile *f, ChannelState *s) 654 static void slavio_serial_save_chn(QEMUFile *f, ChannelState *s)
hw/slavio_timer.c
@@ -276,14 +276,14 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr, @@ -276,14 +276,14 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr,
276 } 276 }
277 277
278 static CPUReadMemoryFunc *slavio_timer_mem_read[3] = { 278 static CPUReadMemoryFunc *slavio_timer_mem_read[3] = {
279 - slavio_timer_mem_readl,  
280 - slavio_timer_mem_readl, 279 + NULL,
  280 + NULL,
281 slavio_timer_mem_readl, 281 slavio_timer_mem_readl,
282 }; 282 };
283 283
284 static CPUWriteMemoryFunc *slavio_timer_mem_write[3] = { 284 static CPUWriteMemoryFunc *slavio_timer_mem_write[3] = {
285 - slavio_timer_mem_writel,  
286 - slavio_timer_mem_writel, 285 + NULL,
  286 + NULL,
287 slavio_timer_mem_writel, 287 slavio_timer_mem_writel,
288 }; 288 };
289 289
hw/sparc32_dma.c
@@ -198,14 +198,14 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -198,14 +198,14 @@ static void dma_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
198 } 198 }
199 199
200 static CPUReadMemoryFunc *dma_mem_read[3] = { 200 static CPUReadMemoryFunc *dma_mem_read[3] = {
201 - dma_mem_readl,  
202 - dma_mem_readl, 201 + NULL,
  202 + NULL,
203 dma_mem_readl, 203 dma_mem_readl,
204 }; 204 };
205 205
206 static CPUWriteMemoryFunc *dma_mem_write[3] = { 206 static CPUWriteMemoryFunc *dma_mem_write[3] = {
207 - dma_mem_writel,  
208 - dma_mem_writel, 207 + NULL,
  208 + NULL,
209 dma_mem_writel, 209 dma_mem_writel,
210 }; 210 };
211 211
hw/sun4c_intctl.c
@@ -80,14 +80,14 @@ static void sun4c_intctl_mem_writeb(void *opaque, target_phys_addr_t addr, uint3 @@ -80,14 +80,14 @@ static void sun4c_intctl_mem_writeb(void *opaque, target_phys_addr_t addr, uint3
80 80
81 static CPUReadMemoryFunc *sun4c_intctl_mem_read[3] = { 81 static CPUReadMemoryFunc *sun4c_intctl_mem_read[3] = {
82 sun4c_intctl_mem_readb, 82 sun4c_intctl_mem_readb,
83 - sun4c_intctl_mem_readb,  
84 - sun4c_intctl_mem_readb, 83 + NULL,
  84 + NULL,
85 }; 85 };
86 86
87 static CPUWriteMemoryFunc *sun4c_intctl_mem_write[3] = { 87 static CPUWriteMemoryFunc *sun4c_intctl_mem_write[3] = {
88 sun4c_intctl_mem_writeb, 88 sun4c_intctl_mem_writeb,
89 - sun4c_intctl_mem_writeb,  
90 - sun4c_intctl_mem_writeb, 89 + NULL,
  90 + NULL,
91 }; 91 };
92 92
93 void sun4c_pic_info(void *opaque) 93 void sun4c_pic_info(void *opaque)
hw/tcx.c
@@ -457,14 +457,14 @@ static void tcx_dac_writel(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -457,14 +457,14 @@ static void tcx_dac_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
457 } 457 }
458 458
459 static CPUReadMemoryFunc *tcx_dac_read[3] = { 459 static CPUReadMemoryFunc *tcx_dac_read[3] = {
460 - tcx_dac_readl,  
461 - tcx_dac_readl, 460 + NULL,
  461 + NULL,
462 tcx_dac_readl, 462 tcx_dac_readl,
463 }; 463 };
464 464
465 static CPUWriteMemoryFunc *tcx_dac_write[3] = { 465 static CPUWriteMemoryFunc *tcx_dac_write[3] = {
466 - tcx_dac_writel,  
467 - tcx_dac_writel, 466 + NULL,
  467 + NULL,
468 tcx_dac_writel, 468 tcx_dac_writel,
469 }; 469 };
470 470
@@ -479,14 +479,14 @@ static void tcx_dummy_writel(void *opaque, target_phys_addr_t addr, @@ -479,14 +479,14 @@ static void tcx_dummy_writel(void *opaque, target_phys_addr_t addr,
479 } 479 }
480 480
481 static CPUReadMemoryFunc *tcx_dummy_read[3] = { 481 static CPUReadMemoryFunc *tcx_dummy_read[3] = {
482 - tcx_dummy_readl,  
483 - tcx_dummy_readl, 482 + NULL,
  483 + NULL,
484 tcx_dummy_readl, 484 tcx_dummy_readl,
485 }; 485 };
486 486
487 static CPUWriteMemoryFunc *tcx_dummy_write[3] = { 487 static CPUWriteMemoryFunc *tcx_dummy_write[3] = {
488 - tcx_dummy_writel,  
489 - tcx_dummy_writel, 488 + NULL,
  489 + NULL,
490 tcx_dummy_writel, 490 tcx_dummy_writel,
491 }; 491 };
492 492