Commit 7a3161bafbda89f08701601a7b6d27329548ce62
1 parent
65a650c2
ETRAX: Simplify interrupt signaling.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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3 changed files
with
7 additions
and
20 deletions
hw/etraxfs_dma.c
@@ -392,10 +392,8 @@ static void channel_update_irq(struct fs_dma_ctrl *ctrl, int c) | @@ -392,10 +392,8 @@ static void channel_update_irq(struct fs_dma_ctrl *ctrl, int c) | ||
392 | c, | 392 | c, |
393 | ctrl->channels[c].regs[R_MASKED_INTR])); | 393 | ctrl->channels[c].regs[R_MASKED_INTR])); |
394 | 394 | ||
395 | - if (ctrl->channels[c].regs[R_MASKED_INTR]) | ||
396 | - qemu_irq_raise(ctrl->channels[c].irq[0]); | ||
397 | - else | ||
398 | - qemu_irq_lower(ctrl->channels[c].irq[0]); | 395 | + qemu_set_irq(ctrl->channels[c].irq[0], |
396 | + !!ctrl->channels[c].regs[R_MASKED_INTR]); | ||
399 | } | 397 | } |
400 | 398 | ||
401 | static int channel_out_run(struct fs_dma_ctrl *ctrl, int c) | 399 | static int channel_out_run(struct fs_dma_ctrl *ctrl, int c) |
hw/etraxfs_ser.c
@@ -67,24 +67,16 @@ struct etrax_serial_t | @@ -67,24 +67,16 @@ struct etrax_serial_t | ||
67 | 67 | ||
68 | static void ser_update_irq(struct etrax_serial_t *s) | 68 | static void ser_update_irq(struct etrax_serial_t *s) |
69 | { | 69 | { |
70 | - uint32_t o_irq = s->r_masked_intr; | ||
71 | - | ||
72 | s->r_intr &= ~(s->rw_ack_intr); | 70 | s->r_intr &= ~(s->rw_ack_intr); |
73 | s->r_masked_intr = s->r_intr & s->rw_intr_mask; | 71 | s->r_masked_intr = s->r_intr & s->rw_intr_mask; |
74 | 72 | ||
75 | - if (o_irq != s->r_masked_intr) { | ||
76 | - D(printf("irq_mask=%x r_intr=%x rmi=%x airq=%x \n", | ||
77 | - s->rw_intr_mask, s->r_intr, | ||
78 | - s->r_masked_intr, s->rw_ack_intr)); | ||
79 | - if (s->r_masked_intr) | ||
80 | - qemu_irq_raise(s->irq[0]); | ||
81 | - else | ||
82 | - qemu_irq_lower(s->irq[0]); | ||
83 | - } | 73 | + D(printf("irq_mask=%x r_intr=%x rmi=%x airq=%x \n", |
74 | + s->rw_intr_mask, s->r_intr, | ||
75 | + s->r_masked_intr, s->rw_ack_intr)); | ||
76 | + qemu_set_irq(s->irq[0], !!s->r_masked_intr); | ||
84 | s->rw_ack_intr = 0; | 77 | s->rw_ack_intr = 0; |
85 | } | 78 | } |
86 | 79 | ||
87 | - | ||
88 | static uint32_t ser_readb (void *opaque, target_phys_addr_t addr) | 80 | static uint32_t ser_readb (void *opaque, target_phys_addr_t addr) |
89 | { | 81 | { |
90 | D(CPUState *env = opaque); | 82 | D(CPUState *env = opaque); |
hw/etraxfs_timer.c
@@ -178,10 +178,7 @@ static void timer_update_irq(struct fs_timer_t *t) | @@ -178,10 +178,7 @@ static void timer_update_irq(struct fs_timer_t *t) | ||
178 | t->r_masked_intr = t->r_intr & t->rw_intr_mask; | 178 | t->r_masked_intr = t->r_intr & t->rw_intr_mask; |
179 | 179 | ||
180 | D(printf("%s: masked_intr=%x\n", __func__, t->r_masked_intr)); | 180 | D(printf("%s: masked_intr=%x\n", __func__, t->r_masked_intr)); |
181 | - if (t->r_masked_intr) | ||
182 | - qemu_irq_raise(t->irq[0]); | ||
183 | - else | ||
184 | - qemu_irq_lower(t->irq[0]); | 181 | + qemu_set_irq(t->irq[0], !!t->r_masked_intr); |
185 | } | 182 | } |
186 | 183 | ||
187 | static void timer0_hit(void *opaque) | 184 | static void timer0_hit(void *opaque) |