gwj / at91sam9263 · Commits

Commit 799a8c8d0a33ee8732407530f1a06a649be3b0bc

Authored by aurel32
1 parent ff4a62cd

target-ppc: convert dcbz instruction to TCG 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5826 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 7 changed files with 55 additions and 360 deletions
target-ppc/helper.h
  View file @799a8c8
... ... @@ -9,6 +9,8 @@ DEF_HELPER_3(td, void, tl, tl, i32)
9 9  
10 10 DEF_HELPER_2(lmw, void, tl, i32)
11 11 DEF_HELPER_2(stmw, void, tl, i32)
  12 +DEF_HELPER_1(dcbz, void, tl)
  13 +DEF_HELPER_1(dcbz_970, void, tl)
12 14  
13 15 DEF_HELPER_2(fcmpo, i32, i64, i64)
14 16 DEF_HELPER_2(fcmpu, i32, i64, i64)
... ...
target-ppc/op.c
  View file @799a8c8
... ... @@ -273,23 +273,6 @@ void OPPROTO op_srli_T1 (void)
273 273 #include "op_mem.h"
274 274 #endif
275 275  
276   -/* Special op to check and maybe clear reservation */
277   -void OPPROTO op_check_reservation (void)
278   -{
279   - if ((uint32_t)env->reserve == (uint32_t)(T0 & ~0x00000003))
280   - env->reserve = (target_ulong)-1ULL;
281   - RETURN();
282   -}
283   -
284   -#if defined(TARGET_PPC64)
285   -void OPPROTO op_check_reservation_64 (void)
286   -{
287   - if ((uint64_t)env->reserve == (uint64_t)(T0 & ~0x00000003))
288   - env->reserve = (target_ulong)-1ULL;
289   - RETURN();
290   -}
291   -#endif
292   -
293 276 /* Return from interrupt */
294 277 #if !defined(CONFIG_USER_ONLY)
295 278 void OPPROTO op_rfi (void)
... ...
target-ppc/op_helper.c
  View file @799a8c8
... ... @@ -56,7 +56,6 @@ void helper_raise_debug (void)
56 56 raise_exception(env, EXCP_DEBUG);
57 57 }
58 58  
59   -
60 59 /*****************************************************************************/
61 60 /* Registers load and stores */
62 61 target_ulong helper_load_cr (void)
... ... @@ -171,6 +170,46 @@ void helper_stmw (target_ulong addr, uint32_t reg)
171 170 }
172 171 }
173 172  
  173 +static void do_dcbz(target_ulong addr, int dcache_line_size)
  174 +{
  175 + target_long mask = get_addr(~(dcache_line_size - 1));
  176 + int i;
  177 +#ifdef CONFIG_USER_ONLY
  178 +#define stfun stl_raw
  179 +#else
  180 + void (*stfun)(target_ulong, int);
  181 +
  182 + switch (env->mmu_idx) {
  183 + default:
  184 + case 0: stfun = stl_user;
  185 + break;
  186 + case 1: stfun = stl_kernel;
  187 + break;
  188 + case 2: stfun = stl_hypv;
  189 + break;
  190 + }
  191 +#endif
  192 + addr &= mask;
  193 + for (i = 0 ; i < dcache_line_size ; i += 4) {
  194 + stfun(addr + i , 0);
  195 + }
  196 + if ((env->reserve & mask) == addr)
  197 + env->reserve = (target_ulong)-1ULL;
  198 +}
  199 +
  200 +void helper_dcbz(target_ulong addr)
  201 +{
  202 + do_dcbz(addr, env->dcache_line_size);
  203 +}
  204 +
  205 +void helper_dcbz_970(target_ulong addr)
  206 +{
  207 + if (((env->spr[SPR_970_HID5] >> 7) & 0x3) == 1)
  208 + do_dcbz(addr, 32);
  209 + else
  210 + do_dcbz(addr, env->dcache_line_size);
  211 +}
  212 +
174 213 /*****************************************************************************/
175 214 /* Fixed point operations helpers */
176 215 #if defined(TARGET_PPC64)
... ... @@ -1219,7 +1258,6 @@ uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3)
1219 1258 return farg1.ll;
1220 1259 }
1221 1260  
1222   -
1223 1261 /* frsp - frsp. */
1224 1262 uint64_t helper_frsp (uint64_t arg)
1225 1263 {
... ...
target-ppc/op_helper.h
  View file @799a8c8
... ... @@ -24,7 +24,6 @@
24 24 void glue(do_lsw, MEMSUFFIX) (int dst);
25 25 void glue(do_stsw, MEMSUFFIX) (int src);
26 26 void glue(do_icbi, MEMSUFFIX) (void);
27   -void glue(do_dcbz, MEMSUFFIX) (void);
28 27 void glue(do_POWER_lscbx, MEMSUFFIX) (int dest, int ra, int rb);
29 28 void glue(do_POWER2_lfq, MEMSUFFIX) (void);
30 29 void glue(do_POWER2_lfq_le, MEMSUFFIX) (void);
... ... @@ -35,7 +34,6 @@ void glue(do_POWER2_stfq_le, MEMSUFFIX) (void);
35 34 void glue(do_lsw_64, MEMSUFFIX) (int dst);
36 35 void glue(do_stsw_64, MEMSUFFIX) (int src);
37 36 void glue(do_icbi_64, MEMSUFFIX) (void);
38   -void glue(do_dcbz_64, MEMSUFFIX) (void);
39 37 #endif
40 38  
41 39 #else
... ...
target-ppc/op_helper_mem.h
  View file @799a8c8
... ... @@ -123,100 +123,6 @@ void glue(do_icbi_64, MEMSUFFIX) (void)
123 123 }
124 124 #endif
125 125  
126   -void glue(do_dcbz, MEMSUFFIX) (void)
127   -{
128   - int dcache_line_size = env->dcache_line_size;
129   -
130   - /* XXX: should be 970 specific (?) */
131   - if (((env->spr[SPR_970_HID5] >> 7) & 0x3) == 1)
132   - dcache_line_size = 32;
133   - T0 &= ~(uint32_t)(dcache_line_size - 1);
134   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0);
135   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0);
136   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0);
137   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0);
138   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0);
139   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0);
140   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0);
141   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0);
142   - if (dcache_line_size >= 64) {
143   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x20UL), 0);
144   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x24UL), 0);
145   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x28UL), 0);
146   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x2CUL), 0);
147   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x30UL), 0);
148   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x34UL), 0);
149   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x38UL), 0);
150   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x3CUL), 0);
151   - if (dcache_line_size >= 128) {
152   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x40UL), 0);
153   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x44UL), 0);
154   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x48UL), 0);
155   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x4CUL), 0);
156   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x50UL), 0);
157   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x54UL), 0);
158   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x58UL), 0);
159   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x5CUL), 0);
160   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x60UL), 0);
161   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x64UL), 0);
162   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x68UL), 0);
163   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x6CUL), 0);
164   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x70UL), 0);
165   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x74UL), 0);
166   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x78UL), 0);
167   - glue(stl, MEMSUFFIX)((uint32_t)(T0 + 0x7CUL), 0);
168   - }
169   - }
170   -}
171   -
172   -#if defined(TARGET_PPC64)
173   -void glue(do_dcbz_64, MEMSUFFIX) (void)
174   -{
175   - int dcache_line_size = env->dcache_line_size;
176   -
177   - /* XXX: should be 970 specific (?) */
178   - if (((env->spr[SPR_970_HID5] >> 6) & 0x3) == 0x2)
179   - dcache_line_size = 32;
180   - T0 &= ~(uint64_t)(dcache_line_size - 1);
181   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0);
182   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0);
183   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0);
184   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0);
185   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0);
186   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0);
187   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0);
188   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0);
189   - if (dcache_line_size >= 64) {
190   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x20UL), 0);
191   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x24UL), 0);
192   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x28UL), 0);
193   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x2CUL), 0);
194   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x30UL), 0);
195   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x34UL), 0);
196   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x38UL), 0);
197   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x3CUL), 0);
198   - if (dcache_line_size >= 128) {
199   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x40UL), 0);
200   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x44UL), 0);
201   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x48UL), 0);
202   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x4CUL), 0);
203   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x50UL), 0);
204   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x54UL), 0);
205   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x58UL), 0);
206   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x5CUL), 0);
207   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x60UL), 0);
208   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x64UL), 0);
209   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x68UL), 0);
210   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x6CUL), 0);
211   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x70UL), 0);
212   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x74UL), 0);
213   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x78UL), 0);
214   - glue(stl, MEMSUFFIX)((uint64_t)(T0 + 0x7CUL), 0);
215   - }
216   - }
217   -}
218   -#endif
219   -
220 126 /* PowerPC 601 specific instructions (POWER bridge) */
221 127 // XXX: to be tested
222 128 void glue(do_POWER_lscbx, MEMSUFFIX) (int dest, int ra, int rb)
... ...
target-ppc/op_mem.h
  View file @799a8c8
... ... @@ -314,168 +314,6 @@ void OPPROTO glue(op_stdcx_le_64, MEMSUFFIX) (void)
314 314 }
315 315 #endif
316 316  
317   -void OPPROTO glue(op_dcbz_l32, MEMSUFFIX) (void)
318   -{
319   - T0 &= ~((uint32_t)31);
320   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0);
321   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0);
322   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0);
323   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0);
324   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0);
325   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0);
326   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0);
327   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0);
328   - RETURN();
329   -}
330   -
331   -void OPPROTO glue(op_dcbz_l64, MEMSUFFIX) (void)
332   -{
333   - T0 &= ~((uint32_t)63);
334   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0);
335   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0);
336   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0);
337   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0);
338   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0);
339   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0);
340   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0);
341   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0);
342   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x20UL), 0);
343   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x24UL), 0);
344   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x28UL), 0);
345   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x2CUL), 0);
346   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x30UL), 0);
347   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x34UL), 0);
348   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x38UL), 0);
349   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x3CUL), 0);
350   - RETURN();
351   -}
352   -
353   -void OPPROTO glue(op_dcbz_l128, MEMSUFFIX) (void)
354   -{
355   - T0 &= ~((uint32_t)127);
356   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x00), 0);
357   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x04), 0);
358   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x08), 0);
359   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x0C), 0);
360   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x10), 0);
361   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x14), 0);
362   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x18), 0);
363   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x1C), 0);
364   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x20UL), 0);
365   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x24UL), 0);
366   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x28UL), 0);
367   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x2CUL), 0);
368   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x30UL), 0);
369   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x34UL), 0);
370   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x38UL), 0);
371   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x3CUL), 0);
372   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x40UL), 0);
373   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x44UL), 0);
374   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x48UL), 0);
375   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x4CUL), 0);
376   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x50UL), 0);
377   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x54UL), 0);
378   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x58UL), 0);
379   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x5CUL), 0);
380   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x60UL), 0);
381   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x64UL), 0);
382   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x68UL), 0);
383   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x6CUL), 0);
384   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x70UL), 0);
385   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x74UL), 0);
386   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x78UL), 0);
387   - glue(st32, MEMSUFFIX)((uint32_t)(T0 + 0x7CUL), 0);
388   - RETURN();
389   -}
390   -
391   -void OPPROTO glue(op_dcbz, MEMSUFFIX) (void)
392   -{
393   - glue(do_dcbz, MEMSUFFIX)();
394   - RETURN();
395   -}
396   -
397   -#if defined(TARGET_PPC64)
398   -void OPPROTO glue(op_dcbz_l32_64, MEMSUFFIX) (void)
399   -{
400   - T0 &= ~((uint64_t)31);
401   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0);
402   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0);
403   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0);
404   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0);
405   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0);
406   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0);
407   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0);
408   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0);
409   - RETURN();
410   -}
411   -
412   -void OPPROTO glue(op_dcbz_l64_64, MEMSUFFIX) (void)
413   -{
414   - T0 &= ~((uint64_t)63);
415   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0);
416   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0);
417   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0);
418   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0);
419   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0);
420   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0);
421   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0);
422   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0);
423   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x20UL), 0);
424   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x24UL), 0);
425   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x28UL), 0);
426   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x2CUL), 0);
427   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x30UL), 0);
428   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x34UL), 0);
429   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x38UL), 0);
430   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x3CUL), 0);
431   - RETURN();
432   -}
433   -
434   -void OPPROTO glue(op_dcbz_l128_64, MEMSUFFIX) (void)
435   -{
436   - T0 &= ~((uint64_t)127);
437   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x00), 0);
438   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x04), 0);
439   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x08), 0);
440   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x0C), 0);
441   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x10), 0);
442   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x14), 0);
443   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x18), 0);
444   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x1C), 0);
445   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x20UL), 0);
446   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x24UL), 0);
447   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x28UL), 0);
448   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x2CUL), 0);
449   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x30UL), 0);
450   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x34UL), 0);
451   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x38UL), 0);
452   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x3CUL), 0);
453   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x40UL), 0);
454   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x44UL), 0);
455   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x48UL), 0);
456   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x4CUL), 0);
457   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x50UL), 0);
458   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x54UL), 0);
459   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x58UL), 0);
460   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x5CUL), 0);
461   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x60UL), 0);
462   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x64UL), 0);
463   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x68UL), 0);
464   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x6CUL), 0);
465   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x70UL), 0);
466   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x74UL), 0);
467   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x78UL), 0);
468   - glue(st32, MEMSUFFIX)((uint64_t)(T0 + 0x7CUL), 0);
469   - RETURN();
470   -}
471   -
472   -void OPPROTO glue(op_dcbz_64, MEMSUFFIX) (void)
473   -{
474   - glue(do_dcbz_64, MEMSUFFIX)();
475   - RETURN();
476   -}
477   -#endif
478   -
479 317 /* Instruction cache block invalidate */
480 318 void OPPROTO glue(op_icbi, MEMSUFFIX) (void)
481 319 {
... ...
target-ppc/translate.c
  View file @799a8c8
... ... @@ -199,7 +199,6 @@ typedef struct DisasContext {
199 199 int spe_enabled;
200 200 ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */
201 201 int singlestep_enabled;
202   - int dcache_line_size;
203 202 } DisasContext;
204 203  
205 204 struct opc_handler_t {
... ... @@ -4142,95 +4141,27 @@ GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x02000001, PPC_CACHE)
4142 4141 }
4143 4142  
4144 4143 /* dcbz */
4145   -#define op_dcbz(n) (*gen_op_dcbz[n][ctx->mem_idx])()
4146   -static GenOpFunc *gen_op_dcbz[4][NB_MEM_FUNCS] = {
4147   - /* 32 bytes cache line size */
4148   - {
4149   -#define gen_op_dcbz_l32_le_raw gen_op_dcbz_l32_raw
4150   -#define gen_op_dcbz_l32_le_user gen_op_dcbz_l32_user
4151   -#define gen_op_dcbz_l32_le_kernel gen_op_dcbz_l32_kernel
4152   -#define gen_op_dcbz_l32_le_hypv gen_op_dcbz_l32_hypv
4153   -#define gen_op_dcbz_l32_le_64_raw gen_op_dcbz_l32_64_raw
4154   -#define gen_op_dcbz_l32_le_64_user gen_op_dcbz_l32_64_user
4155   -#define gen_op_dcbz_l32_le_64_kernel gen_op_dcbz_l32_64_kernel
4156   -#define gen_op_dcbz_l32_le_64_hypv gen_op_dcbz_l32_64_hypv
4157   - GEN_MEM_FUNCS(dcbz_l32),
4158   - },
4159   - /* 64 bytes cache line size */
4160   - {
4161   -#define gen_op_dcbz_l64_le_raw gen_op_dcbz_l64_raw
4162   -#define gen_op_dcbz_l64_le_user gen_op_dcbz_l64_user
4163   -#define gen_op_dcbz_l64_le_kernel gen_op_dcbz_l64_kernel
4164   -#define gen_op_dcbz_l64_le_hypv gen_op_dcbz_l64_hypv
4165   -#define gen_op_dcbz_l64_le_64_raw gen_op_dcbz_l64_64_raw
4166   -#define gen_op_dcbz_l64_le_64_user gen_op_dcbz_l64_64_user
4167   -#define gen_op_dcbz_l64_le_64_kernel gen_op_dcbz_l64_64_kernel
4168   -#define gen_op_dcbz_l64_le_64_hypv gen_op_dcbz_l64_64_hypv
4169   - GEN_MEM_FUNCS(dcbz_l64),
4170   - },
4171   - /* 128 bytes cache line size */
4172   - {
4173   -#define gen_op_dcbz_l128_le_raw gen_op_dcbz_l128_raw
4174   -#define gen_op_dcbz_l128_le_user gen_op_dcbz_l128_user
4175   -#define gen_op_dcbz_l128_le_kernel gen_op_dcbz_l128_kernel
4176   -#define gen_op_dcbz_l128_le_hypv gen_op_dcbz_l128_hypv
4177   -#define gen_op_dcbz_l128_le_64_raw gen_op_dcbz_l128_64_raw
4178   -#define gen_op_dcbz_l128_le_64_user gen_op_dcbz_l128_64_user
4179   -#define gen_op_dcbz_l128_le_64_kernel gen_op_dcbz_l128_64_kernel
4180   -#define gen_op_dcbz_l128_le_64_hypv gen_op_dcbz_l128_64_hypv
4181   - GEN_MEM_FUNCS(dcbz_l128),
4182   - },
4183   - /* tunable cache line size */
4184   - {
4185   -#define gen_op_dcbz_le_raw gen_op_dcbz_raw
4186   -#define gen_op_dcbz_le_user gen_op_dcbz_user
4187   -#define gen_op_dcbz_le_kernel gen_op_dcbz_kernel
4188   -#define gen_op_dcbz_le_hypv gen_op_dcbz_hypv
4189   -#define gen_op_dcbz_le_64_raw gen_op_dcbz_64_raw
4190   -#define gen_op_dcbz_le_64_user gen_op_dcbz_64_user
4191   -#define gen_op_dcbz_le_64_kernel gen_op_dcbz_64_kernel
4192   -#define gen_op_dcbz_le_64_hypv gen_op_dcbz_64_hypv
4193   - GEN_MEM_FUNCS(dcbz),
4194   - },
4195   -};
4196   -
4197   -static always_inline void handler_dcbz (DisasContext *ctx,
4198   - int dcache_line_size)
4199   -{
4200   - int n;
4201   -
4202   - switch (dcache_line_size) {
4203   - case 32:
4204   - n = 0;
4205   - break;
4206   - case 64:
4207   - n = 1;
4208   - break;
4209   - case 128:
4210   - n = 2;
4211   - break;
4212   - default:
4213   - n = 3;
4214   - break;
4215   - }
4216   - op_dcbz(n);
4217   -}
4218   -
4219 4144 GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03E00001, PPC_CACHE_DCBZ)
4220 4145 {
4221   - gen_addr_reg_index(cpu_T[0], ctx);
4222   - handler_dcbz(ctx, ctx->dcache_line_size);
4223   - gen_op_check_reservation();
  4146 + TCGv t0 = tcg_temp_new();
  4147 + gen_addr_reg_index(t0, ctx);
  4148 + /* NIP cannot be restored if the memory exception comes from an helper */
  4149 + gen_update_nip(ctx, ctx->nip - 4);
  4150 + gen_helper_dcbz(t0);
  4151 + tcg_temp_free(t0);
4224 4152 }
4225 4153  
4226 4154 GEN_HANDLER2(dcbz_970, "dcbz", 0x1F, 0x16, 0x1F, 0x03C00001, PPC_CACHE_DCBZT)
4227 4155 {
4228   - gen_addr_reg_index(cpu_T[0], ctx);
  4156 + TCGv t0 = tcg_temp_new();
  4157 + gen_addr_reg_index(t0, ctx);
  4158 + /* NIP cannot be restored if the memory exception comes from an helper */
  4159 + gen_update_nip(ctx, ctx->nip - 4);
4229 4160 if (ctx->opcode & 0x00200000)
4230   - handler_dcbz(ctx, ctx->dcache_line_size);
  4161 + gen_helper_dcbz(t0);
4231 4162 else
4232   - handler_dcbz(ctx, -1);
4233   - gen_op_check_reservation();
  4163 + gen_helper_dcbz_970(t0);
  4164 + tcg_temp_free(t0);
4234 4165 }
4235 4166  
4236 4167 /* icbi */
... ... @@ -7563,7 +7494,6 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
7563 7494 #else
7564 7495 ctx.mem_idx = (supervisor << 1) | little_endian;
7565 7496 #endif
7566   - ctx.dcache_line_size = env->dcache_line_size;
7567 7497 ctx.fpu_enabled = msr_fp;
7568 7498 if ((env->flags & POWERPC_FLAG_SPE) && msr_spe)
7569 7499 ctx.spe_enabled = msr_spe;
... ...