gwj / at91sam9263 · Commits

Commit 789c91ef396252e7fedbc5c5b02b91df6daa08c3

Authored by Blue Swirl
1 parent bdf9f35d

Convert addx 

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Inline Side-by-side
Showing 2 changed files with 50 additions and 31 deletions
target-sparc/op_helper.c
  View file @789c91e
@@ -860,6 +860,48 @@ static uint32_t compute_C_add_xcc(void) @@ -860,6 +860,48 @@ static uint32_t compute_C_add_xcc(void)
860 } 860 }
861 #endif 861 #endif
862 862
  863 +static uint32_t compute_all_addx(void)
  864 +{
  865 + uint32_t ret;
  866 +
  867 + ret = get_NZ_icc(CC_DST);
  868 + ret |= get_C_add_icc(CC_DST - CC_SRC2, CC_SRC);
  869 + ret |= get_C_add_icc(CC_DST, CC_SRC);
  870 + ret |= get_V_add_icc(CC_DST, CC_SRC, CC_SRC2);
  871 + return ret;
  872 +}
  873 +
  874 +static uint32_t compute_C_addx(void)
  875 +{
  876 + uint32_t ret;
  877 +
  878 + ret = get_C_add_icc(CC_DST - CC_SRC2, CC_SRC);
  879 + ret |= get_C_add_icc(CC_DST, CC_SRC);
  880 + return ret;
  881 +}
  882 +
  883 +#ifdef TARGET_SPARC64
  884 +static uint32_t compute_all_addx_xcc(void)
  885 +{
  886 + uint32_t ret;
  887 +
  888 + ret = get_NZ_xcc(CC_DST);
  889 + ret |= get_C_add_xcc(CC_DST - CC_SRC2, CC_SRC);
  890 + ret |= get_C_add_xcc(CC_DST, CC_SRC);
  891 + ret |= get_V_add_xcc(CC_DST, CC_SRC, CC_SRC2);
  892 + return ret;
  893 +}
  894 +
  895 +static uint32_t compute_C_addx_xcc(void)
  896 +{
  897 + uint32_t ret;
  898 +
  899 + ret = get_C_add_xcc(CC_DST - CC_SRC2, CC_SRC);
  900 + ret |= get_C_add_xcc(CC_DST, CC_SRC);
  901 + return ret;
  902 +}
  903 +#endif
  904 +
863 typedef struct CCTable { 905 typedef struct CCTable {
864 uint32_t (*compute_all)(void); /* return all the flags */ 906 uint32_t (*compute_all)(void); /* return all the flags */
865 uint32_t (*compute_c)(void); /* return the C flag */ 907 uint32_t (*compute_c)(void); /* return the C flag */
@@ -869,6 +911,7 @@ static const CCTable icc_table[CC_OP_NB] = { @@ -869,6 +911,7 @@ static const CCTable icc_table[CC_OP_NB] = {
869 /* CC_OP_DYNAMIC should never happen */ 911 /* CC_OP_DYNAMIC should never happen */
870 [CC_OP_FLAGS] = { compute_all_flags, compute_C_flags }, 912 [CC_OP_FLAGS] = { compute_all_flags, compute_C_flags },
871 [CC_OP_ADD] = { compute_all_add, compute_C_add }, 913 [CC_OP_ADD] = { compute_all_add, compute_C_add },
  914 + [CC_OP_ADDX] = { compute_all_addx, compute_C_addx },
872 }; 915 };
873 916
874 #ifdef TARGET_SPARC64 917 #ifdef TARGET_SPARC64
@@ -876,6 +919,7 @@ static const CCTable xcc_table[CC_OP_NB] = { @@ -876,6 +919,7 @@ static const CCTable xcc_table[CC_OP_NB] = {
876 /* CC_OP_DYNAMIC should never happen */ 919 /* CC_OP_DYNAMIC should never happen */
877 [CC_OP_FLAGS] = { compute_all_flags_xcc, compute_C_flags_xcc }, 920 [CC_OP_FLAGS] = { compute_all_flags_xcc, compute_C_flags_xcc },
878 [CC_OP_ADD] = { compute_all_add_xcc, compute_C_add_xcc }, 921 [CC_OP_ADD] = { compute_all_add_xcc, compute_C_add_xcc },
  922 + [CC_OP_ADDX] = { compute_all_addx_xcc, compute_C_addx_xcc },
879 }; 923 };
880 #endif 924 #endif
881 925
target-sparc/translate.c
  View file @789c91e
@@ -475,33 +475,14 @@ static inline void gen_op_add_cc(TCGv dst, TCGv src1, TCGv src2) @@ -475,33 +475,14 @@ static inline void gen_op_add_cc(TCGv dst, TCGv src1, TCGv src2)
475 tcg_gen_mov_tl(dst, cpu_cc_dst); 475 tcg_gen_mov_tl(dst, cpu_cc_dst);
476 } 476 }
477 477
478 -static inline void gen_op_addx_cc2(TCGv dst)  
479 -{  
480 - gen_cc_NZ_icc(cpu_cc_dst);  
481 - gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);  
482 - gen_cc_V_add_icc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);  
483 -#ifdef TARGET_SPARC64  
484 - gen_cc_NZ_xcc(cpu_cc_dst);  
485 - gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src);  
486 - gen_cc_V_add_xcc(cpu_cc_dst, cpu_cc_src, cpu_cc_src2);  
487 -#endif  
488 - tcg_gen_mov_tl(dst, cpu_cc_dst);  
489 -}  
490 -  
491 static inline void gen_op_addxi_cc(TCGv dst, TCGv src1, target_long src2) 478 static inline void gen_op_addxi_cc(TCGv dst, TCGv src1, target_long src2)
492 { 479 {
493 tcg_gen_mov_tl(cpu_cc_src, src1); 480 tcg_gen_mov_tl(cpu_cc_src, src1);
494 tcg_gen_movi_tl(cpu_cc_src2, src2); 481 tcg_gen_movi_tl(cpu_cc_src2, src2);
495 gen_mov_reg_C(cpu_tmp0, cpu_psr); 482 gen_mov_reg_C(cpu_tmp0, cpu_psr);
496 tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_tmp0); 483 tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_tmp0);
497 - gen_cc_clear_icc();  
498 - gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);  
499 -#ifdef TARGET_SPARC64  
500 - gen_cc_clear_xcc();  
501 - gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src);  
502 -#endif  
503 tcg_gen_addi_tl(cpu_cc_dst, cpu_cc_dst, src2); 484 tcg_gen_addi_tl(cpu_cc_dst, cpu_cc_dst, src2);
504 - gen_op_addx_cc2(dst); 485 + tcg_gen_mov_tl(dst, cpu_cc_dst);
505 } 486 }
506 487
507 static inline void gen_op_addx_cc(TCGv dst, TCGv src1, TCGv src2) 488 static inline void gen_op_addx_cc(TCGv dst, TCGv src1, TCGv src2)
@@ -510,14 +491,8 @@ static inline void gen_op_addx_cc(TCGv dst, TCGv src1, TCGv src2) @@ -510,14 +491,8 @@ static inline void gen_op_addx_cc(TCGv dst, TCGv src1, TCGv src2)
510 tcg_gen_mov_tl(cpu_cc_src2, src2); 491 tcg_gen_mov_tl(cpu_cc_src2, src2);
511 gen_mov_reg_C(cpu_tmp0, cpu_psr); 492 gen_mov_reg_C(cpu_tmp0, cpu_psr);
512 tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_tmp0); 493 tcg_gen_add_tl(cpu_cc_dst, cpu_cc_src, cpu_tmp0);
513 - gen_cc_clear_icc();  
514 - gen_cc_C_add_icc(cpu_cc_dst, cpu_cc_src);  
515 -#ifdef TARGET_SPARC64  
516 - gen_cc_clear_xcc();  
517 - gen_cc_C_add_xcc(cpu_cc_dst, cpu_cc_src);  
518 -#endif  
519 tcg_gen_add_tl(cpu_cc_dst, cpu_cc_dst, cpu_cc_src2); 494 tcg_gen_add_tl(cpu_cc_dst, cpu_cc_dst, cpu_cc_src2);
520 - gen_op_addx_cc2(dst); 495 + tcg_gen_mov_tl(dst, cpu_cc_dst);
521 } 496 }
522 497
523 static inline void gen_op_tadd_cc(TCGv dst, TCGv src1, TCGv src2) 498 static inline void gen_op_tadd_cc(TCGv dst, TCGv src1, TCGv src2)
@@ -3258,8 +3233,8 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3258,8 +3233,8 @@ static void disas_sparc_insn(DisasContext * dc)
3258 if (xop & 0x10) { 3233 if (xop & 0x10) {
3259 gen_helper_compute_psr(); 3234 gen_helper_compute_psr();
3260 gen_op_addxi_cc(cpu_dst, cpu_src1, simm); 3235 gen_op_addxi_cc(cpu_dst, cpu_src1, simm);
3261 - tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);  
3262 - dc->cc_op = CC_OP_FLAGS; 3236 + tcg_gen_movi_i32(cpu_cc_op, CC_OP_ADDX);
  3237 + dc->cc_op = CC_OP_ADDX;
3263 } else { 3238 } else {
3264 gen_helper_compute_psr(); 3239 gen_helper_compute_psr();
3265 gen_mov_reg_C(cpu_tmp0, cpu_psr); 3240 gen_mov_reg_C(cpu_tmp0, cpu_psr);
@@ -3270,8 +3245,8 @@ static void disas_sparc_insn(DisasContext * dc) @@ -3270,8 +3245,8 @@ static void disas_sparc_insn(DisasContext * dc)
3270 if (xop & 0x10) { 3245 if (xop & 0x10) {
3271 gen_helper_compute_psr(); 3246 gen_helper_compute_psr();
3272 gen_op_addx_cc(cpu_dst, cpu_src1, cpu_src2); 3247 gen_op_addx_cc(cpu_dst, cpu_src1, cpu_src2);
3273 - tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS);  
3274 - dc->cc_op = CC_OP_FLAGS; 3248 + tcg_gen_movi_i32(cpu_cc_op, CC_OP_ADDX);
  3249 + dc->cc_op = CC_OP_ADDX;
3275 } else { 3250 } else {
3276 gen_helper_compute_psr(); 3251 gen_helper_compute_psr();
3277 gen_mov_reg_C(cpu_tmp0, cpu_psr); 3252 gen_mov_reg_C(cpu_tmp0, cpu_psr);