Commit 783a20dcb51f7197c56f77c8012fa4abe8a23391
1 parent
bf14b1ce
Activate uninorth AGP bridge
Linux tries to poke the AGP bridge port and is pretty sad when it can't, so let's activate the old code again and throw out the bit modifications, as we don't really do anything with the values anyways. Signed-off-by: Alexander Graf <alex@csgraf.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6750 c046a42c-6fe2-441c-8c8c-71466251a162
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8 additions
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20 deletions
hw/unin_pci.c
| ... | ... | @@ -92,31 +92,20 @@ static CPUReadMemoryFunc *pci_unin_main_read[] = { |
| 92 | 92 | &pci_host_data_readl, |
| 93 | 93 | }; |
| 94 | 94 | |
| 95 | -#if 0 | |
| 96 | - | |
| 97 | 95 | static void pci_unin_config_writel (void *opaque, target_phys_addr_t addr, |
| 98 | 96 | uint32_t val) |
| 99 | 97 | { |
| 100 | 98 | UNINState *s = opaque; |
| 101 | 99 | |
| 102 | -#ifdef TARGET_WORDS_BIGENDIAN | |
| 103 | - val = bswap32(val); | |
| 104 | -#endif | |
| 105 | - s->config_reg = 0x80000000 | (val & ~0x00000001); | |
| 100 | + s->config_reg = val; | |
| 106 | 101 | } |
| 107 | 102 | |
| 108 | 103 | static uint32_t pci_unin_config_readl (void *opaque, |
| 109 | 104 | target_phys_addr_t addr) |
| 110 | 105 | { |
| 111 | 106 | UNINState *s = opaque; |
| 112 | - uint32_t val; | |
| 113 | - | |
| 114 | - val = (s->config_reg | 0x00000001) & ~0x80000000; | |
| 115 | -#ifdef TARGET_WORDS_BIGENDIAN | |
| 116 | - val = bswap32(val); | |
| 117 | -#endif | |
| 118 | 107 | |
| 119 | - return val; | |
| 108 | + return s->config_reg; | |
| 120 | 109 | } |
| 121 | 110 | |
| 122 | 111 | static CPUWriteMemoryFunc *pci_unin_config_write[] = { |
| ... | ... | @@ -131,6 +120,7 @@ static CPUReadMemoryFunc *pci_unin_config_read[] = { |
| 131 | 120 | &pci_unin_config_readl, |
| 132 | 121 | }; |
| 133 | 122 | |
| 123 | +#if 0 | |
| 134 | 124 | static CPUWriteMemoryFunc *pci_unin_write[] = { |
| 135 | 125 | &pci_host_pci_writeb, |
| 136 | 126 | &pci_host_pci_writew, |
| ... | ... | @@ -233,18 +223,17 @@ PCIBus *pci_pmac_init(qemu_irq *pic) |
| 233 | 223 | d->config[0x27] = 0x7F; |
| 234 | 224 | // d->config[0x34] = 0xdc // capabilities_pointer |
| 235 | 225 | #endif |
| 236 | -#if 0 // XXX: not needed for now | |
| 226 | + | |
| 237 | 227 | /* Uninorth AGP bus */ |
| 238 | - s = &pci_bridge[1]; | |
| 239 | 228 | pci_mem_config = cpu_register_io_memory(0, pci_unin_config_read, |
| 240 | 229 | pci_unin_config_write, s); |
| 241 | - pci_mem_data = cpu_register_io_memory(0, pci_unin_read, | |
| 242 | - pci_unin_write, s); | |
| 230 | + pci_mem_data = cpu_register_io_memory(0, pci_unin_main_read, | |
| 231 | + pci_unin_main_write, s); | |
| 243 | 232 | cpu_register_physical_memory(0xf0800000, 0x1000, pci_mem_config); |
| 244 | 233 | cpu_register_physical_memory(0xf0c00000, 0x1000, pci_mem_data); |
| 245 | 234 | |
| 246 | - d = pci_register_device("Uni-north AGP", sizeof(PCIDevice), 0, 11 << 3, | |
| 247 | - NULL, NULL); | |
| 235 | + d = pci_register_device(s->bus, "Uni-north AGP", sizeof(PCIDevice), | |
| 236 | + 11 << 3, NULL, NULL); | |
| 248 | 237 | pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); |
| 249 | 238 | pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_AGP); |
| 250 | 239 | d->config[0x08] = 0x00; // revision |
| ... | ... | @@ -253,7 +242,6 @@ PCIBus *pci_pmac_init(qemu_irq *pic) |
| 253 | 242 | d->config[0x0D] = 0x10; // latency_timer |
| 254 | 243 | d->config[0x0E] = 0x00; // header_type |
| 255 | 244 | // d->config[0x34] = 0x80; // capabilities_pointer |
| 256 | -#endif | |
| 257 | 245 | |
| 258 | 246 | #if 0 // XXX: not needed for now |
| 259 | 247 | /* Uninorth internal bus */ | ... | ... |