gwj / at91sam9263 · Commits

Commit 776f2227f6244003a5bcb20ea77c49427e6af023

Authored by bellard
1 parent d785e6be

x86_64 test program 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1321 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 5 changed files with 588 additions and 248 deletions
tests/Makefile
  View file @776f222
... ... @@ -6,6 +6,9 @@ LDFLAGS=
6 6 ifeq ($(ARCH),i386)
7 7 TESTS=linux-test testthread sha1-i386 test-i386 runcom
8 8 endif
  9 +ifeq ($(ARCH),x86_64)
  10 +TESTS=test-x86_64
  11 +endif
9 12 TESTS+=sha1# test_path
10 13 #TESTS+=test_path
11 14  
... ... @@ -24,11 +27,15 @@ test_path: test_path.c
24 27 $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $<
25 28 ./$@ || { rm $@; exit 1; }
26 29  
27   -# i386 emulation test (test various opcodes) */
  30 +# i386/x86_64 emulation test (test various opcodes) */
28 31 test-i386: test-i386.c test-i386-code16.S test-i386-vm86.S \
29 32 test-i386.h test-i386-shift.h test-i386-muldiv.h
30   - $(CC) $(CFLAGS) $(LDFLAGS) -static -o $@ test-i386.c \
31   - test-i386-code16.S test-i386-vm86.S -lm
  33 + $(CC) $(CFLAGS) $(LDFLAGS) -static -o $@ \
  34 + test-i386.c test-i386-code16.S test-i386-vm86.S -lm
  35 +
  36 +test-x86_64: test-i386.c \
  37 + test-i386.h test-i386-shift.h test-i386-muldiv.h
  38 + $(CC) $(CFLAGS) $(LDFLAGS) -static -o $@ test-i386.c -lm
32 39  
33 40 ifeq ($(ARCH),i386)
34 41 test: test-i386
... ...
tests/test-i386-muldiv.h
  View file @776f222
1 1  
2   -void glue(glue(test_, OP), b)(int op0, int op1)
  2 +void glue(glue(test_, OP), b)(long op0, long op1)
3 3 {
4   - int res, s1, s0, flags;
  4 + long res, s1, s0, flags;
5 5 s0 = op0;
6 6 s1 = op1;
7 7 res = s0;
... ... @@ -10,16 +10,16 @@ void glue(glue(test_, OP), b)(int op0, int op1)
10 10 "popf\n\t"
11 11 stringify(OP)"b %b2\n\t"
12 12 "pushf\n\t"
13   - "popl %1\n\t"
  13 + "pop %1\n\t"
14 14 : "=a" (res), "=g" (flags)
15 15 : "q" (s1), "0" (res), "1" (flags));
16   - printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
  16 + printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
17 17 stringify(OP) "b", s0, s1, res, flags & CC_MASK);
18 18 }
19 19  
20   -void glue(glue(test_, OP), w)(int op0h, int op0, int op1)
  20 +void glue(glue(test_, OP), w)(long op0h, long op0, long op1)
21 21 {
22   - int res, s1, flags, resh;
  22 + long res, s1, flags, resh;
23 23 s1 = op1;
24 24 resh = op0h;
25 25 res = op0;
... ... @@ -28,29 +28,49 @@ void glue(glue(test_, OP), w)(int op0h, int op0, int op1)
28 28 "popf\n\t"
29 29 stringify(OP) "w %w3\n\t"
30 30 "pushf\n\t"
31   - "popl %1\n\t"
  31 + "pop %1\n\t"
32 32 : "=a" (res), "=g" (flags), "=d" (resh)
33 33 : "q" (s1), "0" (res), "1" (flags), "2" (resh));
34   - printf("%-10s AH=%08x AL=%08x B=%08x RH=%08x RL=%08x CC=%04x\n",
  34 + printf("%-10s AH=" FMTLX " AL=" FMTLX " B=" FMTLX " RH=" FMTLX " RL=" FMTLX " CC=%04lx\n",
35 35 stringify(OP) "w", op0h, op0, s1, resh, res, flags & CC_MASK);
36 36 }
37 37  
38   -void glue(glue(test_, OP), l)(int op0h, int op0, int op1)
  38 +void glue(glue(test_, OP), l)(long op0h, long op0, long op1)
39 39 {
40   - int res, s1, flags, resh;
  40 + long res, s1, flags, resh;
41 41 s1 = op1;
42 42 resh = op0h;
43 43 res = op0;
44 44 flags = 0;
45 45 asm ("push %5\n\t"
46 46 "popf\n\t"
47   - stringify(OP) "l %3\n\t"
  47 + stringify(OP) "l %k3\n\t"
48 48 "pushf\n\t"
49   - "popl %1\n\t"
  49 + "pop %1\n\t"
50 50 : "=a" (res), "=g" (flags), "=d" (resh)
51 51 : "q" (s1), "0" (res), "1" (flags), "2" (resh));
52   - printf("%-10s AH=%08x AL=%08x B=%08x RH=%08x RL=%08x CC=%04x\n",
  52 + printf("%-10s AH=" FMTLX " AL=" FMTLX " B=" FMTLX " RH=" FMTLX " RL=" FMTLX " CC=%04lx\n",
53 53 stringify(OP) "l", op0h, op0, s1, resh, res, flags & CC_MASK);
54 54 }
55 55  
  56 +#if defined(__x86_64__)
  57 +void glue(glue(test_, OP), q)(long op0h, long op0, long op1)
  58 +{
  59 + long res, s1, flags, resh;
  60 + s1 = op1;
  61 + resh = op0h;
  62 + res = op0;
  63 + flags = 0;
  64 + asm ("push %5\n\t"
  65 + "popf\n\t"
  66 + stringify(OP) "q %3\n\t"
  67 + "pushf\n\t"
  68 + "pop %1\n\t"
  69 + : "=a" (res), "=g" (flags), "=d" (resh)
  70 + : "q" (s1), "0" (res), "1" (flags), "2" (resh));
  71 + printf("%-10s AH=" FMTLX " AL=" FMTLX " B=" FMTLX " RH=" FMTLX " RL=" FMTLX " CC=%04lx\n",
  72 + stringify(OP) "q", op0h, op0, s1, resh, res, flags & CC_MASK);
  73 +}
  74 +#endif
  75 +
56 76 #undef OP
... ...
tests/test-i386-shift.h
  View file @776f222
1 1  
2 2 #define exec_op glue(exec_, OP)
  3 +#define exec_opq glue(glue(exec_, OP), q)
3 4 #define exec_opl glue(glue(exec_, OP), l)
4 5 #define exec_opw glue(glue(exec_, OP), w)
5 6 #define exec_opb glue(glue(exec_, OP), b)
... ... @@ -7,106 +8,141 @@
7 8 #ifndef OP_SHIFTD
8 9  
9 10 #ifdef OP_NOBYTE
10   -#define EXECSHIFT(size, res, s1, s2, flags) \
  11 +#define EXECSHIFT(size, rsize, res, s1, s2, flags) \
11 12 asm ("push %4\n\t"\
12 13 "popf\n\t"\
13   - stringify(OP) size " %" size "2, %" size "0\n\t" \
  14 + stringify(OP) size " %" rsize "2, %" rsize "0\n\t" \
14 15 "pushf\n\t"\
15   - "popl %1\n\t"\
  16 + "pop %1\n\t"\
16 17 : "=g" (res), "=g" (flags)\
17 18 : "r" (s1), "0" (res), "1" (flags));
18 19 #else
19   -#define EXECSHIFT(size, res, s1, s2, flags) \
  20 +#define EXECSHIFT(size, rsize, res, s1, s2, flags) \
20 21 asm ("push %4\n\t"\
21 22 "popf\n\t"\
22   - stringify(OP) size " %%cl, %" size "0\n\t" \
  23 + stringify(OP) size " %%cl, %" rsize "0\n\t" \
23 24 "pushf\n\t"\
24   - "popl %1\n\t"\
  25 + "pop %1\n\t"\
25 26 : "=q" (res), "=g" (flags)\
26 27 : "c" (s1), "0" (res), "1" (flags));
27 28 #endif
28 29  
29   -void exec_opl(int s2, int s0, int s1, int iflags)
  30 +#if defined(__x86_64__)
  31 +void exec_opq(long s2, long s0, long s1, long iflags)
30 32 {
31   - int res, flags;
  33 + long res, flags;
32 34 res = s0;
33 35 flags = iflags;
34   - EXECSHIFT("", res, s1, s2, flags);
  36 + EXECSHIFT("q", "", res, s1, s2, flags);
35 37 /* overflow is undefined if count != 1 */
36 38 if (s1 != 1)
37 39 flags &= ~CC_O;
38   - printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
  40 + printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
  41 + stringify(OP) "q", s0, s1, res, iflags, flags & CC_MASK);
  42 +}
  43 +#endif
  44 +
  45 +void exec_opl(long s2, long s0, long s1, long iflags)
  46 +{
  47 + long res, flags;
  48 + res = s0;
  49 + flags = iflags;
  50 + EXECSHIFT("l", "k", res, s1, s2, flags);
  51 + /* overflow is undefined if count != 1 */
  52 + if (s1 != 1)
  53 + flags &= ~CC_O;
  54 + printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
39 55 stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
40 56 }
41 57  
42   -void exec_opw(int s2, int s0, int s1, int iflags)
  58 +void exec_opw(long s2, long s0, long s1, long iflags)
43 59 {
44   - int res, flags;
  60 + long res, flags;
45 61 res = s0;
46 62 flags = iflags;
47   - EXECSHIFT("w", res, s1, s2, flags);
  63 + EXECSHIFT("w", "w", res, s1, s2, flags);
48 64 /* overflow is undefined if count != 1 */
49 65 if (s1 != 1)
50 66 flags &= ~CC_O;
51   - printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
  67 + printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
52 68 stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
53 69 }
54 70  
55 71 #else
56   -#define EXECSHIFT(size, res, s1, s2, flags) \
  72 +#define EXECSHIFT(size, rsize, res, s1, s2, flags) \
57 73 asm ("push %4\n\t"\
58 74 "popf\n\t"\
59   - stringify(OP) size " %%cl, %" size "5, %" size "0\n\t" \
  75 + stringify(OP) size " %%cl, %" rsize "5, %" rsize "0\n\t" \
60 76 "pushf\n\t"\
61   - "popl %1\n\t"\
  77 + "pop %1\n\t"\
62 78 : "=g" (res), "=g" (flags)\
63 79 : "c" (s1), "0" (res), "1" (flags), "r" (s2));
64 80  
65   -void exec_opl(int s2, int s0, int s1, int iflags)
  81 +#if defined(__x86_64__)
  82 +void exec_opq(long s2, long s0, long s1, long iflags)
  83 +{
  84 + long res, flags;
  85 + res = s0;
  86 + flags = iflags;
  87 + EXECSHIFT("q", "", res, s1, s2, flags);
  88 + /* overflow is undefined if count != 1 */
  89 + if (s1 != 1)
  90 + flags &= ~CC_O;
  91 + printf("%-10s A=" FMTLX " B=" FMTLX " C=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
  92 + stringify(OP) "q", s0, s2, s1, res, iflags, flags & CC_MASK);
  93 +}
  94 +#endif
  95 +
  96 +void exec_opl(long s2, long s0, long s1, long iflags)
66 97 {
67   - int res, flags;
  98 + long res, flags;
68 99 res = s0;
69 100 flags = iflags;
70   - EXECSHIFT("", res, s1, s2, flags);
  101 + EXECSHIFT("l", "k", res, s1, s2, flags);
71 102 /* overflow is undefined if count != 1 */
72 103 if (s1 != 1)
73 104 flags &= ~CC_O;
74   - printf("%-10s A=%08x B=%08x C=%08x R=%08x CCIN=%04x CC=%04x\n",
  105 + printf("%-10s A=" FMTLX " B=" FMTLX " C=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
75 106 stringify(OP) "l", s0, s2, s1, res, iflags, flags & CC_MASK);
76 107 }
77 108  
78   -void exec_opw(int s2, int s0, int s1, int iflags)
  109 +void exec_opw(long s2, long s0, long s1, long iflags)
79 110 {
80   - int res, flags;
  111 + long res, flags;
81 112 res = s0;
82 113 flags = iflags;
83   - EXECSHIFT("w", res, s1, s2, flags);
  114 + EXECSHIFT("w", "w", res, s1, s2, flags);
84 115 /* overflow is undefined if count != 1 */
85 116 if (s1 != 1)
86 117 flags &= ~CC_O;
87   - printf("%-10s A=%08x B=%08x C=%08x R=%08x CCIN=%04x CC=%04x\n",
  118 + printf("%-10s A=" FMTLX " B=" FMTLX " C=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
88 119 stringify(OP) "w", s0, s2, s1, res, iflags, flags & CC_MASK);
89 120 }
90 121  
91 122 #endif
92 123  
93 124 #ifndef OP_NOBYTE
94   -void exec_opb(int s0, int s1, int iflags)
  125 +void exec_opb(long s0, long s1, long iflags)
95 126 {
96   - int res, flags;
  127 + long res, flags;
97 128 res = s0;
98 129 flags = iflags;
99   - EXECSHIFT("b", res, s1, 0, flags);
  130 + EXECSHIFT("b", "b", res, s1, 0, flags);
100 131 /* overflow is undefined if count != 1 */
101 132 if (s1 != 1)
102 133 flags &= ~CC_O;
103   - printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
  134 + printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n",
104 135 stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
105 136 }
106 137 #endif
107 138  
108   -void exec_op(int s2, int s0, int s1)
  139 +void exec_op(long s2, long s0, long s1)
109 140 {
  141 + s2 = i2l(s2);
  142 + s0 = i2l(s0);
  143 +#if defined(__x86_64__)
  144 + exec_opq(s2, s0, s1, 0);
  145 +#endif
110 146 exec_opl(s2, s0, s1, 0);
111 147 #ifdef OP_SHIFTD
112 148 if (s1 <= 15)
... ... @@ -118,6 +154,9 @@ void exec_op(int s2, int s0, int s1)
118 154 exec_opb(s0, s1, 0);
119 155 #endif
120 156 #ifdef OP_CC
  157 +#if defined(__x86_64__)
  158 + exec_opq(s2, s0, s1, CC_C);
  159 +#endif
121 160 exec_opl(s2, s0, s1, CC_C);
122 161 exec_opw(s2, s0, s1, CC_C);
123 162 exec_opb(s0, s1, CC_C);
... ... @@ -126,10 +165,15 @@ void exec_op(int s2, int s0, int s1)
126 165  
127 166 void glue(test_, OP)(void)
128 167 {
129   - int i;
130   - for(i = 0; i < 32; i++)
  168 + int i, n;
  169 +#if defined(__x86_64__)
  170 + n = 64;
  171 +#else
  172 + n = 32;
  173 +#endif
  174 + for(i = 0; i < n; i++)
131 175 exec_op(0x21ad3d34, 0x12345678, i);
132   - for(i = 0; i < 32; i++)
  176 + for(i = 0; i < n; i++)
133 177 exec_op(0x813f3421, 0x82345678, i);
134 178 }
135 179  
... ...
tests/test-i386.c
  View file @776f222
... ... @@ -28,14 +28,35 @@
28 28 #include <errno.h>
29 29 #include <sys/ucontext.h>
30 30 #include <sys/mman.h>
31   -#include <asm/vm86.h>
32 31  
33   -#define TEST_CMOV 0
34   -#define TEST_FCOMI 0
  32 +#if !defined(__x86_64__)
35 33 #define TEST_VM86
  34 +#define TEST_SEGS
  35 +#endif
36 36 //#define LINUX_VM86_IOPL_FIX
37 37 //#define TEST_P4_FLAGS
38   -//#define TEST_SSE
  38 +#if defined(__x86_64__)
  39 +#define TEST_SSE
  40 +#define TEST_CMOV 1
  41 +#define TEST_FCOMI 1
  42 +#else
  43 +#define TEST_CMOV 0
  44 +#define TEST_FCOMI 0
  45 +#endif
  46 +
  47 +#if defined(__x86_64__)
  48 +#define FMT64X "%016lx"
  49 +#define FMTLX "%016lx"
  50 +#define X86_64_ONLY(x) x
  51 +#else
  52 +#define FMT64X "%016llx"
  53 +#define FMTLX "%08lx"
  54 +#define X86_64_ONLY(x)
  55 +#endif
  56 +
  57 +#ifdef TEST_VM86
  58 +#include <asm/vm86.h>
  59 +#endif
39 60  
40 61 #define xglue(x, y) x ## y
41 62 #define glue(x, y) xglue(x, y)
... ... @@ -49,12 +70,22 @@
49 70 #define CC_S 0x0080
50 71 #define CC_O 0x0800
51 72  
52   -#define __init_call __attribute__ ((unused,__section__ (".initcall.init")))
53   -
54   -static void *call_start __init_call = NULL;
  73 +#define __init_call __attribute__ ((unused,__section__ ("initcall")))
55 74  
56 75 #define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
57 76  
  77 +#if defined(__x86_64__)
  78 +static inline long i2l(long v)
  79 +{
  80 + return v | ((v ^ 0xabcd) << 32);
  81 +}
  82 +#else
  83 +static inline long i2l(long v)
  84 +{
  85 + return v;
  86 +}
  87 +#endif
  88 +
58 89 #define OP add
59 90 #include "test-i386.h"
60 91  
... ... @@ -158,12 +189,20 @@ static void *call_start __init_call = NULL;
158 189 #include "test-i386-shift.h"
159 190  
160 191 /* lea test (modrm support) */
  192 +#define TEST_LEAQ(STR)\
  193 +{\
  194 + asm("lea " STR ", %0"\
  195 + : "=r" (res)\
  196 + : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
  197 + printf("lea %s = " FMTLX "\n", STR, res);\
  198 +}
  199 +
161 200 #define TEST_LEA(STR)\
162 201 {\
163   - asm("leal " STR ", %0"\
  202 + asm("lea " STR ", %0"\
164 203 : "=r" (res)\
165 204 : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
166   - printf("lea %s = %08x\n", STR, res);\
  205 + printf("lea %s = " FMTLX "\n", STR, res);\
167 206 }
168 207  
169 208 #define TEST_LEA16(STR)\
... ... @@ -171,19 +210,19 @@ static void *call_start __init_call = NULL;
171 210 asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
172 211 : "=wq" (res)\
173 212 : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
174   - printf("lea %s = %08x\n", STR, res);\
  213 + printf("lea %s = %08lx\n", STR, res);\
175 214 }
176 215  
177 216  
178 217 void test_lea(void)
179 218 {
180   - int eax, ebx, ecx, edx, esi, edi, res;
181   - eax = 0x0001;
182   - ebx = 0x0002;
183   - ecx = 0x0004;
184   - edx = 0x0008;
185   - esi = 0x0010;
186   - edi = 0x0020;
  219 + long eax, ebx, ecx, edx, esi, edi, res;
  220 + eax = i2l(0x0001);
  221 + ebx = i2l(0x0002);
  222 + ecx = i2l(0x0004);
  223 + edx = i2l(0x0008);
  224 + esi = i2l(0x0010);
  225 + edi = i2l(0x0020);
187 226  
188 227 TEST_LEA("0x4000");
189 228  
... ... @@ -239,6 +278,62 @@ void test_lea(void)
239 278 TEST_LEA("0x4000(%%edx, %%ecx, 4)");
240 279 TEST_LEA("0x4000(%%esi, %%ecx, 8)");
241 280  
  281 +#if defined(__x86_64__)
  282 + TEST_LEAQ("0x4000");
  283 + TEST_LEAQ("0x4000(%%rip)");
  284 +
  285 + TEST_LEAQ("(%%rax)");
  286 + TEST_LEAQ("(%%rbx)");
  287 + TEST_LEAQ("(%%rcx)");
  288 + TEST_LEAQ("(%%rdx)");
  289 + TEST_LEAQ("(%%rsi)");
  290 + TEST_LEAQ("(%%rdi)");
  291 +
  292 + TEST_LEAQ("0x40(%%rax)");
  293 + TEST_LEAQ("0x40(%%rbx)");
  294 + TEST_LEAQ("0x40(%%rcx)");
  295 + TEST_LEAQ("0x40(%%rdx)");
  296 + TEST_LEAQ("0x40(%%rsi)");
  297 + TEST_LEAQ("0x40(%%rdi)");
  298 +
  299 + TEST_LEAQ("0x4000(%%rax)");
  300 + TEST_LEAQ("0x4000(%%rbx)");
  301 + TEST_LEAQ("0x4000(%%rcx)");
  302 + TEST_LEAQ("0x4000(%%rdx)");
  303 + TEST_LEAQ("0x4000(%%rsi)");
  304 + TEST_LEAQ("0x4000(%%rdi)");
  305 +
  306 + TEST_LEAQ("(%%rax, %%rcx)");
  307 + TEST_LEAQ("(%%rbx, %%rdx)");
  308 + TEST_LEAQ("(%%rcx, %%rcx)");
  309 + TEST_LEAQ("(%%rdx, %%rcx)");
  310 + TEST_LEAQ("(%%rsi, %%rcx)");
  311 + TEST_LEAQ("(%%rdi, %%rcx)");
  312 +
  313 + TEST_LEAQ("0x40(%%rax, %%rcx)");
  314 + TEST_LEAQ("0x4000(%%rbx, %%rdx)");
  315 +
  316 + TEST_LEAQ("(%%rcx, %%rcx, 2)");
  317 + TEST_LEAQ("(%%rdx, %%rcx, 4)");
  318 + TEST_LEAQ("(%%rsi, %%rcx, 8)");
  319 +
  320 + TEST_LEAQ("(,%%rax, 2)");
  321 + TEST_LEAQ("(,%%rbx, 4)");
  322 + TEST_LEAQ("(,%%rcx, 8)");
  323 +
  324 + TEST_LEAQ("0x40(,%%rax, 2)");
  325 + TEST_LEAQ("0x40(,%%rbx, 4)");
  326 + TEST_LEAQ("0x40(,%%rcx, 8)");
  327 +
  328 +
  329 + TEST_LEAQ("-10(%%rcx, %%rcx, 2)");
  330 + TEST_LEAQ("-10(%%rdx, %%rcx, 4)");
  331 + TEST_LEAQ("-10(%%rsi, %%rcx, 8)");
  332 +
  333 + TEST_LEAQ("0x4000(%%rcx, %%rcx, 2)");
  334 + TEST_LEAQ("0x4000(%%rdx, %%rcx, 4)");
  335 + TEST_LEAQ("0x4000(%%rsi, %%rcx, 8)");
  336 +#else
242 337 /* limited 16 bit addressing test */
243 338 TEST_LEA16("0x4000");
244 339 TEST_LEA16("(%%bx)");
... ... @@ -255,6 +350,7 @@ void test_lea(void)
255 350 TEST_LEA16("0x40(%%bx,%%di)");
256 351 TEST_LEA16("0x4000(%%bx,%%si)");
257 352 TEST_LEA16("0x4000(%%bx,%%di)");
  353 +#endif
258 354 }
259 355  
260 356 #define TEST_JCC(JCC, v1, v2)\
... ... @@ -276,18 +372,24 @@ void test_lea(void)
276 372 : "r" (v1), "r" (v2));\
277 373 printf("%-10s %d\n", "set" JCC, res);\
278 374 if (TEST_CMOV) {\
279   - asm("movl $0x12345678, %0\n\t"\
280   - "cmpl %2, %1\n\t"\
281   - "cmov" JCC "l %3, %0\n\t"\
  375 + long val = i2l(1);\
  376 + long res = i2l(0x12345678);\
  377 +X86_64_ONLY(\
  378 + asm("cmpl %2, %1\n\t"\
  379 + "cmov" JCC "q %3, %0\n\t"\
282 380 : "=r" (res)\
283   - : "r" (v1), "r" (v2), "m" (1));\
284   - printf("%-10s R=0x%08x\n", "cmov" JCC "l", res);\
285   - asm("movl $0x12345678, %0\n\t"\
286   - "cmpl %2, %1\n\t"\
  381 + : "r" (v1), "r" (v2), "m" (val), "0" (res));\
  382 + printf("%-10s R=" FMTLX "\n", "cmov" JCC "l", res);)\
  383 + asm("cmpl %2, %1\n\t"\
  384 + "cmov" JCC "l %k3, %k0\n\t"\
  385 + : "=r" (res)\
  386 + : "r" (v1), "r" (v2), "m" (val), "0" (res));\
  387 + printf("%-10s R=" FMTLX "\n", "cmov" JCC "l", res);\
  388 + asm("cmpl %2, %1\n\t"\
287 389 "cmov" JCC "w %w3, %w0\n\t"\
288 390 : "=r" (res)\
289   - : "r" (v1), "r" (v2), "r" (1));\
290   - printf("%-10s R=0x%08x\n", "cmov" JCC "w", res);\
  391 + : "r" (v1), "r" (v2), "r" (1), "0" (res));\
  392 + printf("%-10s R=" FMTLX "\n", "cmov" JCC "w", res);\
291 393 } \
292 394 }
293 395  
... ... @@ -367,9 +469,9 @@ void test_jcc(void)
367 469 #define OP imul
368 470 #include "test-i386-muldiv.h"
369 471  
370   -void test_imulw2(int op0, int op1)
  472 +void test_imulw2(long op0, long op1)
371 473 {
372   - int res, s1, s0, flags;
  474 + long res, s1, s0, flags;
373 475 s0 = op0;
374 476 s1 = op1;
375 477 res = s0;
... ... @@ -378,45 +480,66 @@ void test_imulw2(int op0, int op1)
378 480 "popf\n\t"
379 481 "imulw %w2, %w0\n\t"
380 482 "pushf\n\t"
381   - "popl %1\n\t"
  483 + "pop %1\n\t"
382 484 : "=q" (res), "=g" (flags)
383 485 : "q" (s1), "0" (res), "1" (flags));
384   - printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
  486 + printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
385 487 "imulw", s0, s1, res, flags & CC_MASK);
386 488 }
387 489  
388   -void test_imull2(int op0, int op1)
  490 +void test_imull2(long op0, long op1)
389 491 {
390   - int res, s1, s0, flags;
  492 + long res, s1, s0, flags;
391 493 s0 = op0;
392 494 s1 = op1;
393 495 res = s0;
394 496 flags = 0;
395 497 asm volatile ("push %4\n\t"
396 498 "popf\n\t"
397   - "imull %2, %0\n\t"
  499 + "imull %k2, %k0\n\t"
398 500 "pushf\n\t"
399   - "popl %1\n\t"
  501 + "pop %1\n\t"
400 502 : "=q" (res), "=g" (flags)
401 503 : "q" (s1), "0" (res), "1" (flags));
402   - printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
  504 + printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
403 505 "imull", s0, s1, res, flags & CC_MASK);
404 506 }
405 507  
406   -#define TEST_IMUL_IM(size, size1, op0, op1)\
  508 +#if defined(__x86_64__)
  509 +void test_imulq2(long op0, long op1)
  510 +{
  511 + long res, s1, s0, flags;
  512 + s0 = op0;
  513 + s1 = op1;
  514 + res = s0;
  515 + flags = 0;
  516 + asm volatile ("push %4\n\t"
  517 + "popf\n\t"
  518 + "imulq %2, %0\n\t"
  519 + "pushf\n\t"
  520 + "pop %1\n\t"
  521 + : "=q" (res), "=g" (flags)
  522 + : "q" (s1), "0" (res), "1" (flags));
  523 + printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",
  524 + "imulq", s0, s1, res, flags & CC_MASK);
  525 +}
  526 +#endif
  527 +
  528 +#define TEST_IMUL_IM(size, rsize, op0, op1)\
407 529 {\
408   - int res, flags;\
  530 + long res, flags, s1;\
409 531 flags = 0;\
410 532 res = 0;\
  533 + s1 = op1;\
411 534 asm volatile ("push %3\n\t"\
412 535 "popf\n\t"\
413   - "imul" size " $" #op0 ", %" size1 "2, %" size1 "0\n\t" \
  536 + "imul" size " $" #op0 ", %" rsize "2, %" rsize "0\n\t" \
414 537 "pushf\n\t"\
415   - "popl %1\n\t"\
  538 + "pop %1\n\t"\
416 539 : "=r" (res), "=g" (flags)\
417   - : "r" (op1), "1" (flags), "0" (res));\
418   - printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",\
419   - "imul" size " im", op0, op1, res, flags & CC_MASK);\
  540 + : "r" (s1), "1" (flags), "0" (res));\
  541 + printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CC=%04lx\n",\
  542 + "imul" size " im", (long)op0, (long)op1, res, flags & CC_MASK);\
420 543 }
421 544  
422 545  
... ... @@ -476,10 +599,10 @@ void test_mul(void)
476 599 TEST_IMUL_IM("w", "w", 0x8000, 0x80000000);
477 600 TEST_IMUL_IM("w", "w", 0x7fff, 0x1000);
478 601  
479   - TEST_IMUL_IM("l", "", 45, 0x1234);
480   - TEST_IMUL_IM("l", "", -45, 23);
481   - TEST_IMUL_IM("l", "", 0x8000, 0x80000000);
482   - TEST_IMUL_IM("l", "", 0x7fff, 0x1000);
  602 + TEST_IMUL_IM("l", "k", 45, 0x1234);
  603 + TEST_IMUL_IM("l", "k", -45, 23);
  604 + TEST_IMUL_IM("l", "k", 0x8000, 0x80000000);
  605 + TEST_IMUL_IM("l", "k", 0x7fff, 0x1000);
483 606  
484 607 test_idivb(0x12341678, 0x127e);
485 608 test_idivb(0x43210123, -5);
... ... @@ -508,30 +631,68 @@ void test_mul(void)
508 631 test_divl(0, -233223, -45);
509 632 test_divl(0, 0x80000000, -1);
510 633 test_divl(0x12343, 0x12345678, 0x81234567);
  634 +
  635 +#if defined(__x86_64__)
  636 + test_imulq(0, 0x1234001d1234001d, 45);
  637 + test_imulq(0, 23, -45);
  638 + test_imulq(0, 0x8000000000000000, 0x8000000000000000);
  639 + test_imulq(0, 0x100000000, 0x100000000);
  640 +
  641 + test_mulq(0, 0x1234001d1234001d, 45);
  642 + test_mulq(0, 23, -45);
  643 + test_mulq(0, 0x8000000000000000, 0x8000000000000000);
  644 + test_mulq(0, 0x100000000, 0x100000000);
  645 +
  646 + test_imulq2(0x1234001d1234001d, 45);
  647 + test_imulq2(23, -45);
  648 + test_imulq2(0x8000000000000000, 0x8000000000000000);
  649 + test_imulq2(0x100000000, 0x100000000);
  650 +
  651 + TEST_IMUL_IM("q", "", 45, 0x12341234);
  652 + TEST_IMUL_IM("q", "", -45, 23);
  653 + TEST_IMUL_IM("q", "", 0x8000, 0x8000000000000000);
  654 + TEST_IMUL_IM("q", "", 0x7fff, 0x10000000);
  655 +
  656 + test_idivq(0, 0x12345678abcdef, 12347);
  657 + test_idivq(0, -233223, -45);
  658 + test_idivq(0, 0x8000000000000000, -1);
  659 + test_idivq(0x12343, 0x12345678, 0x81234567);
  660 +
  661 + test_divq(0, 0x12345678abcdef, 12347);
  662 + test_divq(0, -233223, -45);
  663 + test_divq(0, 0x8000000000000000, -1);
  664 + test_divq(0x12343, 0x12345678, 0x81234567);
  665 +#endif
511 666 }
512 667  
513 668 #define TEST_BSX(op, size, op0)\
514 669 {\
515   - int res, val, resz;\
  670 + long res, val, resz;\
516 671 val = op0;\
517   - asm("xorl %1, %1\n"\
518   - "movl $0x12345678, %0\n"\
  672 + asm("xor %1, %1\n"\
  673 + "mov $0x12345678, %0\n"\
519 674 #op " %" size "2, %" size "0 ; setz %b1" \
520 675 : "=r" (res), "=q" (resz)\
521 676 : "g" (val));\
522   - printf("%-10s A=%08x R=%08x %d\n", #op, val, res, resz);\
  677 + printf("%-10s A=" FMTLX " R=" FMTLX " %ld\n", #op, val, res, resz);\
523 678 }
524 679  
525 680 void test_bsx(void)
526 681 {
527 682 TEST_BSX(bsrw, "w", 0);
528 683 TEST_BSX(bsrw, "w", 0x12340128);
529   - TEST_BSX(bsrl, "", 0);
530   - TEST_BSX(bsrl, "", 0x00340128);
531 684 TEST_BSX(bsfw, "w", 0);
532 685 TEST_BSX(bsfw, "w", 0x12340128);
533   - TEST_BSX(bsfl, "", 0);
534   - TEST_BSX(bsfl, "", 0x00340128);
  686 + TEST_BSX(bsrl, "k", 0);
  687 + TEST_BSX(bsrl, "k", 0x00340128);
  688 + TEST_BSX(bsfl, "k", 0);
  689 + TEST_BSX(bsfl, "k", 0x00340128);
  690 +#if defined(__x86_64__)
  691 + TEST_BSX(bsrq, "", 0);
  692 + TEST_BSX(bsrq, "", 0x003401281234);
  693 + TEST_BSX(bsfq, "", 0);
  694 + TEST_BSX(bsfq, "", 0x003401281234);
  695 +#endif
535 696 }
536 697  
537 698 /**********************************************/
... ... @@ -570,14 +731,14 @@ void test_fcmp(double a, double b)
570 731 printf("(%f<=%f)=%d\n",
571 732 a, b, a >= b);
572 733 if (TEST_FCOMI) {
573   - unsigned int eflags;
  734 + long eflags;
574 735 /* test f(u)comi instruction */
575 736 asm("fcomi %2, %1\n"
576 737 "pushf\n"
577 738 "pop %0\n"
578 739 : "=r" (eflags)
579 740 : "t" (a), "u" (b));
580   - printf("fcomi(%f %f)=%08x\n", a, b, eflags & (CC_Z | CC_P | CC_C));
  741 + printf("fcomi(%f %f)=%08lx\n", a, b, eflags & (CC_Z | CC_P | CC_C));
581 742 }
582 743 }
583 744  
... ... @@ -596,8 +757,8 @@ void test_fcvt(double a)
596 757 la = a;
597 758 printf("(float)%f = %f\n", a, fa);
598 759 printf("(long double)%f = %Lf\n", a, la);
599   - printf("a=%016Lx\n", *(long long *)&a);
600   - printf("la=%016Lx %04x\n", *(long long *)&la,
  760 + printf("a=" FMT64X "\n", *(uint64_t *)&a);
  761 + printf("la=" FMT64X " %04x\n", *(uint64_t *)&la,
601 762 *(unsigned short *)((char *)(&la) + 8));
602 763  
603 764 /* test all roundings */
... ... @@ -611,7 +772,7 @@ void test_fcvt(double a)
611 772 asm volatile ("fldcw %0" : : "m" (fpuc));
612 773 printf("(short)a = %d\n", wa);
613 774 printf("(int)a = %d\n", ia);
614   - printf("(int64_t)a = %Ld\n", lla);
  775 + printf("(int64_t)a = " FMT64X "\n", lla);
615 776 printf("rint(a) = %f\n", ra);
616 777 }
617 778 }
... ... @@ -709,14 +870,14 @@ void test_fenv(void)
709 870 "fcmov" CC " %2, %0\n"\
710 871 : "=t" (res)\
711 872 : "0" (a), "u" (b), "g" (eflags));\
712   - printf("fcmov%s eflags=0x%04x-> %f\n", \
713   - CC, eflags, res);\
  873 + printf("fcmov%s eflags=0x%04lx-> %f\n", \
  874 + CC, (long)eflags, res);\
714 875 }
715 876  
716 877 void test_fcmov(void)
717 878 {
718 879 double a, b;
719   - int eflags, i;
  880 + long eflags, i;
720 881  
721 882 a = 1.0;
722 883 b = 2.0;
... ... @@ -762,6 +923,7 @@ void test_floats(void)
762 923 }
763 924  
764 925 /**********************************************/
  926 +#if !defined(__x86_64__)
765 927  
766 928 #define TEST_BCD(op, op0, cc_in, cc_mask)\
767 929 {\
... ... @@ -772,7 +934,7 @@ void test_floats(void)
772 934 "popf\n\t"\
773 935 #op "\n\t"\
774 936 "pushf\n\t"\
775   - "popl %1\n\t"\
  937 + "pop %1\n\t"\
776 938 : "=a" (res), "=g" (flags)\
777 939 : "0" (res), "1" (flags));\
778 940 printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
... ... @@ -830,42 +992,53 @@ void test_bcd(void)
830 992 TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
831 993 TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
832 994 }
  995 +#endif
833 996  
834 997 #define TEST_XCHG(op, size, opconst)\
835 998 {\
836   - int op0, op1;\
837   - op0 = 0x12345678;\
838   - op1 = 0xfbca7654;\
  999 + long op0, op1;\
  1000 + op0 = i2l(0x12345678);\
  1001 + op1 = i2l(0xfbca7654);\
839 1002 asm(#op " %" size "0, %" size "1" \
840 1003 : "=q" (op0), opconst (op1) \
841 1004 : "0" (op0), "1" (op1));\
842   - printf("%-10s A=%08x B=%08x\n",\
  1005 + printf("%-10s A=" FMTLX " B=" FMTLX "\n",\
843 1006 #op, op0, op1);\
844 1007 }
845 1008  
846 1009 #define TEST_CMPXCHG(op, size, opconst, eax)\
847 1010 {\
848   - int op0, op1;\
849   - op0 = 0x12345678;\
850   - op1 = 0xfbca7654;\
  1011 + long op0, op1, op2;\
  1012 + op0 = i2l(0x12345678);\
  1013 + op1 = i2l(0xfbca7654);\
  1014 + op2 = i2l(eax);\
851 1015 asm(#op " %" size "0, %" size "1" \
852 1016 : "=q" (op0), opconst (op1) \
853   - : "0" (op0), "1" (op1), "a" (eax));\
854   - printf("%-10s EAX=%08x A=%08x C=%08x\n",\
855   - #op, eax, op0, op1);\
  1017 + : "0" (op0), "1" (op1), "a" (op2));\
  1018 + printf("%-10s EAX=" FMTLX " A=" FMTLX " C=" FMTLX "\n",\
  1019 + #op, op2, op0, op1);\
856 1020 }
857 1021  
858 1022 void test_xchg(void)
859 1023 {
860   - TEST_XCHG(xchgl, "", "=q");
  1024 +#if defined(__x86_64__)
  1025 + TEST_XCHG(xchgq, "", "=q");
  1026 +#endif
  1027 + TEST_XCHG(xchgl, "k", "=q");
861 1028 TEST_XCHG(xchgw, "w", "=q");
862 1029 TEST_XCHG(xchgb, "b", "=q");
863 1030  
864   - TEST_XCHG(xchgl, "", "=m");
  1031 +#if defined(__x86_64__)
  1032 + TEST_XCHG(xchgq, "", "=m");
  1033 +#endif
  1034 + TEST_XCHG(xchgl, "k", "=m");
865 1035 TEST_XCHG(xchgw, "w", "=m");
866 1036 TEST_XCHG(xchgb, "b", "=m");
867 1037  
868   - TEST_XCHG(xaddl, "", "=q");
  1038 +#if defined(__x86_64__)
  1039 + TEST_XCHG(xaddq, "", "=q");
  1040 +#endif
  1041 + TEST_XCHG(xaddl, "k", "=q");
869 1042 TEST_XCHG(xaddw, "w", "=q");
870 1043 TEST_XCHG(xaddb, "b", "=q");
871 1044  
... ... @@ -876,29 +1049,44 @@ void test_xchg(void)
876 1049 printf("xaddl same res=%08x\n", res);
877 1050 }
878 1051  
879   - TEST_XCHG(xaddl, "", "=m");
  1052 +#if defined(__x86_64__)
  1053 + TEST_XCHG(xaddq, "", "=m");
  1054 +#endif
  1055 + TEST_XCHG(xaddl, "k", "=m");
880 1056 TEST_XCHG(xaddw, "w", "=m");
881 1057 TEST_XCHG(xaddb, "b", "=m");
882 1058  
883   - TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfbca7654);
  1059 +#if defined(__x86_64__)
  1060 + TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfbca7654);
  1061 +#endif
  1062 + TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfbca7654);
884 1063 TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654);
885 1064 TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654);
886 1065  
887   - TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfffefdfc);
  1066 +#if defined(__x86_64__)
  1067 + TEST_CMPXCHG(cmpxchgq, "", "=q", 0xfffefdfc);
  1068 +#endif
  1069 + TEST_CMPXCHG(cmpxchgl, "k", "=q", 0xfffefdfc);
888 1070 TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc);
889 1071 TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc);
890 1072  
891   - TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfbca7654);
  1073 +#if defined(__x86_64__)
  1074 + TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfbca7654);
  1075 +#endif
  1076 + TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfbca7654);
892 1077 TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654);
893 1078 TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654);
894 1079  
895   - TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfffefdfc);
  1080 +#if defined(__x86_64__)
  1081 + TEST_CMPXCHG(cmpxchgq, "", "=m", 0xfffefdfc);
  1082 +#endif
  1083 + TEST_CMPXCHG(cmpxchgl, "k", "=m", 0xfffefdfc);
896 1084 TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc);
897 1085 TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc);
898 1086  
899 1087 {
900 1088 uint64_t op0, op1, op2;
901   - int i, eflags;
  1089 + long i, eflags;
902 1090  
903 1091 for(i = 0; i < 2; i++) {
904 1092 op0 = 0x123456789abcd;
... ... @@ -909,15 +1097,16 @@ void test_xchg(void)
909 1097 op2 = 0x6532432432434;
910 1098 asm("cmpxchg8b %1\n"
911 1099 "pushf\n"
912   - "popl %2\n"
  1100 + "pop %2\n"
913 1101 : "=A" (op0), "=m" (op1), "=g" (eflags)
914 1102 : "0" (op0), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
915   - printf("cmpxchg8b: op0=%016llx op1=%016llx CC=%02x\n",
  1103 + printf("cmpxchg8b: op0=" FMT64X " op1=" FMT64X " CC=%02lx\n",
916 1104 op0, op1, eflags & CC_Z);
917 1105 }
918 1106 }
919 1107 }
920 1108  
  1109 +#ifdef TEST_SEGS
921 1110 /**********************************************/
922 1111 /* segmentation tests */
923 1112  
... ... @@ -931,11 +1120,11 @@ _syscall3(int, modify_ldt, int, func, void *, ptr, unsigned long, bytecount)
931 1120 #define modify_ldt_ldt_s user_desc
932 1121 #endif
933 1122  
  1123 +#define MK_SEL(n) (((n) << 3) | 7)
  1124 +
934 1125 uint8_t seg_data1[4096];
935 1126 uint8_t seg_data2[4096];
936 1127  
937   -#define MK_SEL(n) (((n) << 3) | 7)
938   -
939 1128 #define TEST_LR(op, size, seg, mask)\
940 1129 {\
941 1130 int res, res2;\
... ... @@ -1079,6 +1268,7 @@ void test_code16(void)
1079 1268 : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
1080 1269 printf("func3() = 0x%08x\n", res);
1081 1270 }
  1271 +#endif
1082 1272  
1083 1273 extern char func_lret32;
1084 1274 extern char func_iret32;
... ... @@ -1086,66 +1276,77 @@ extern char func_iret32;
1086 1276 void test_misc(void)
1087 1277 {
1088 1278 char table[256];
1089   - int res, i;
  1279 + long res, i;
1090 1280  
1091 1281 for(i=0;i<256;i++) table[i] = 256 - i;
1092 1282 res = 0x12345678;
1093 1283 asm ("xlat" : "=a" (res) : "b" (table), "0" (res));
1094   - printf("xlat: EAX=%08x\n", res);
  1284 + printf("xlat: EAX=" FMTLX "\n", res);
1095 1285  
1096   - asm volatile ("pushl %%cs ; call %1"
  1286 +#if !defined(__x86_64__)
  1287 + asm volatile ("push %%cs ; call %1"
1097 1288 : "=a" (res)
1098 1289 : "m" (func_lret32): "memory", "cc");
1099   - printf("func_lret32=%x\n", res);
  1290 + printf("func_lret32=" FMTLX "\n", res);
1100 1291  
1101   - asm volatile ("pushfl ; pushl %%cs ; call %1"
  1292 + asm volatile ("pushf ; push %%cs ; call %1"
1102 1293 : "=a" (res)
1103 1294 : "m" (func_iret32): "memory", "cc");
1104   - printf("func_iret32=%x\n", res);
  1295 + printf("func_iret32=" FMTLX "\n", res);
  1296 +#endif
1105 1297  
  1298 +#if defined(__x86_64__)
  1299 + /* specific popl test */
  1300 + asm volatile ("push $12345432 ; push $0x9abcdef ; pop (%%rsp) ; pop %0"
  1301 + : "=g" (res));
  1302 + printf("popl esp=" FMTLX "\n", res);
  1303 +#else
1106 1304 /* specific popl test */
1107 1305 asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0"
1108 1306 : "=g" (res));
1109   - printf("popl esp=%x\n", res);
  1307 + printf("popl esp=" FMTLX "\n", res);
1110 1308  
1111 1309 /* specific popw test */
1112 1310 asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0"
1113 1311 : "=g" (res));
1114   - printf("popw esp=%x\n", res);
  1312 + printf("popw esp=" FMTLX "\n", res);
  1313 +#endif
1115 1314 }
1116 1315  
1117 1316 uint8_t str_buffer[4096];
1118 1317  
1119 1318 #define TEST_STRING1(OP, size, DF, REP)\
1120 1319 {\
1121   - int esi, edi, eax, ecx, eflags;\
  1320 + long esi, edi, eax, ecx, eflags;\
1122 1321 \
1123 1322 esi = (long)(str_buffer + sizeof(str_buffer) / 2);\
1124 1323 edi = (long)(str_buffer + sizeof(str_buffer) / 2) + 16;\
1125   - eax = 0x12345678;\
  1324 + eax = i2l(0x12345678);\
1126 1325 ecx = 17;\
1127 1326 \
1128   - asm volatile ("pushl $0\n\t"\
  1327 + asm volatile ("push $0\n\t"\
1129 1328 "popf\n\t"\
1130 1329 DF "\n\t"\
1131 1330 REP #OP size "\n\t"\
1132 1331 "cld\n\t"\
1133 1332 "pushf\n\t"\
1134   - "popl %4\n\t"\
  1333 + "pop %4\n\t"\
1135 1334 : "=S" (esi), "=D" (edi), "=a" (eax), "=c" (ecx), "=g" (eflags)\
1136 1335 : "0" (esi), "1" (edi), "2" (eax), "3" (ecx));\
1137   - printf("%-10s ESI=%08x EDI=%08x EAX=%08x ECX=%08x EFL=%04x\n",\
  1336 + printf("%-10s ESI=" FMTLX " EDI=" FMTLX " EAX=" FMTLX " ECX=" FMTLX " EFL=%04x\n",\
1138 1337 REP #OP size, esi, edi, eax, ecx,\
1139   - eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
  1338 + (int)(eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)));\
1140 1339 }
1141 1340  
1142 1341 #define TEST_STRING(OP, REP)\
1143 1342 TEST_STRING1(OP, "b", "", REP);\
1144 1343 TEST_STRING1(OP, "w", "", REP);\
1145 1344 TEST_STRING1(OP, "l", "", REP);\
  1345 + X86_64_ONLY(TEST_STRING1(OP, "q", "", REP));\
1146 1346 TEST_STRING1(OP, "b", "std", REP);\
1147 1347 TEST_STRING1(OP, "w", "std", REP);\
1148   - TEST_STRING1(OP, "l", "std", REP)
  1348 + TEST_STRING1(OP, "l", "std", REP);\
  1349 + X86_64_ONLY(TEST_STRING1(OP, "q", "std", REP))
1149 1350  
1150 1351 void test_string(void)
1151 1352 {
... ... @@ -1169,6 +1370,7 @@ void test_string(void)
1169 1370 TEST_STRING(cmps, "repnz ");
1170 1371 }
1171 1372  
  1373 +#ifdef TEST_VM86
1172 1374 /* VM86 test */
1173 1375  
1174 1376 static inline void set_bit(uint8_t *a, unsigned int bit)
... ... @@ -1299,9 +1501,10 @@ void test_vm86(void)
1299 1501 printf("VM86 end\n");
1300 1502 munmap(vm86_mem, 0x110000);
1301 1503 }
  1504 +#endif
1302 1505  
1303 1506 /* exception tests */
1304   -#ifndef REG_EAX
  1507 +#if defined(__i386__) && !defined(REG_EAX)
1305 1508 #define REG_EAX EAX
1306 1509 #define REG_EBX EBX
1307 1510 #define REG_ECX ECX
... ... @@ -1316,6 +1519,10 @@ void test_vm86(void)
1316 1519 #define REG_ERR ERR
1317 1520 #endif
1318 1521  
  1522 +#if defined(__x86_64__)
  1523 +#define REG_EIP REG_RIP
  1524 +#endif
  1525 +
1319 1526 jmp_buf jmp_env;
1320 1527 int v1;
1321 1528 int tab[2];
... ... @@ -1330,23 +1537,22 @@ void sig_handler(int sig, siginfo_t *info, void *puc)
1330 1537 (unsigned long)info->si_addr);
1331 1538 printf("\n");
1332 1539  
1333   - printf("trapno=0x%02x err=0x%08x",
1334   - uc->uc_mcontext.gregs[REG_TRAPNO],
1335   - uc->uc_mcontext.gregs[REG_ERR]);
1336   - printf(" EIP=0x%08x", uc->uc_mcontext.gregs[REG_EIP]);
  1540 + printf("trapno=" FMTLX " err=" FMTLX,
  1541 + (long)uc->uc_mcontext.gregs[REG_TRAPNO],
  1542 + (long)uc->uc_mcontext.gregs[REG_ERR]);
  1543 + printf(" EIP=" FMTLX, (long)uc->uc_mcontext.gregs[REG_EIP]);
1337 1544 printf("\n");
1338 1545 longjmp(jmp_env, 1);
1339 1546 }
1340 1547  
1341 1548 void test_exceptions(void)
1342 1549 {
1343   - struct modify_ldt_ldt_s ldt;
1344 1550 struct sigaction act;
1345 1551 volatile int val;
1346 1552  
1347 1553 act.sa_sigaction = sig_handler;
1348 1554 sigemptyset(&act.sa_mask);
1349   - act.sa_flags = SA_SIGINFO;
  1555 + act.sa_flags = SA_SIGINFO | SA_NODEFER;
1350 1556 sigaction(SIGFPE, &act, NULL);
1351 1557 sigaction(SIGILL, &act, NULL);
1352 1558 sigaction(SIGSEGV, &act, NULL);
... ... @@ -1361,6 +1567,7 @@ void test_exceptions(void)
1361 1567 v1 = 2 / v1;
1362 1568 }
1363 1569  
  1570 +#if !defined(__x86_64__)
1364 1571 printf("BOUND exception:\n");
1365 1572 if (setjmp(jmp_env) == 0) {
1366 1573 /* bound exception */
... ... @@ -1368,7 +1575,9 @@ void test_exceptions(void)
1368 1575 tab[1] = 10;
1369 1576 asm volatile ("bound %0, %1" : : "r" (11), "m" (tab[0]));
1370 1577 }
  1578 +#endif
1371 1579  
  1580 +#ifdef TEST_SEGS
1372 1581 printf("segment exceptions:\n");
1373 1582 if (setjmp(jmp_env) == 0) {
1374 1583 /* load an invalid segment */
... ... @@ -1381,21 +1590,25 @@ void test_exceptions(void)
1381 1590 asm volatile ("movl %0, %%ss" : : "r" (3));
1382 1591 }
1383 1592  
1384   - ldt.entry_number = 1;
1385   - ldt.base_addr = (unsigned long)&seg_data1;
1386   - ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
1387   - ldt.seg_32bit = 1;
1388   - ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1389   - ldt.read_exec_only = 0;
1390   - ldt.limit_in_pages = 1;
1391   - ldt.seg_not_present = 1;
1392   - ldt.useable = 1;
1393   - modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1394   -
1395   - if (setjmp(jmp_env) == 0) {
1396   - /* segment not present */
1397   - asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
  1593 + {
  1594 + struct modify_ldt_ldt_s ldt;
  1595 + ldt.entry_number = 1;
  1596 + ldt.base_addr = (unsigned long)&seg_data1;
  1597 + ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
  1598 + ldt.seg_32bit = 1;
  1599 + ldt.contents = MODIFY_LDT_CONTENTS_DATA;
  1600 + ldt.read_exec_only = 0;
  1601 + ldt.limit_in_pages = 1;
  1602 + ldt.seg_not_present = 1;
  1603 + ldt.useable = 1;
  1604 + modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
  1605 +
  1606 + if (setjmp(jmp_env) == 0) {
  1607 + /* segment not present */
  1608 + asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
  1609 + }
1398 1610 }
  1611 +#endif
1399 1612  
1400 1613 /* test SEGV reporting */
1401 1614 printf("PF exception:\n");
... ... @@ -1459,11 +1672,13 @@ void test_exceptions(void)
1459 1672 asm volatile ("cli");
1460 1673 }
1461 1674  
  1675 +#if !defined(__x86_64__)
1462 1676 printf("INTO exception:\n");
1463 1677 if (setjmp(jmp_env) == 0) {
1464 1678 /* overflow exception */
1465 1679 asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff));
1466 1680 }
  1681 +#endif
1467 1682  
1468 1683 printf("OUTB exception:\n");
1469 1684 if (setjmp(jmp_env) == 0) {
... ... @@ -1502,11 +1717,12 @@ void test_exceptions(void)
1502 1717 printf("val=0x%x\n", val);
1503 1718 }
1504 1719  
  1720 +#if !defined(__x86_64__)
1505 1721 /* specific precise single step test */
1506 1722 void sig_trap_handler(int sig, siginfo_t *info, void *puc)
1507 1723 {
1508 1724 struct ucontext *uc = puc;
1509   - printf("EIP=0x%08x\n", uc->uc_mcontext.gregs[REG_EIP]);
  1725 + printf("EIP=" FMTLX "\n", (long)uc->uc_mcontext.gregs[REG_EIP]);
1510 1726 }
1511 1727  
1512 1728 const uint8_t sstep_buf1[4] = { 1, 2, 3, 4};
... ... @@ -1627,12 +1843,21 @@ void test_self_modifying_code(void)
1627 1843 printf("smc_code2(%d) = %d\n", i, smc_code2(i));
1628 1844 }
1629 1845 }
  1846 +#endif
1630 1847  
1631   -int enter_stack[4096];
  1848 +long enter_stack[4096];
  1849 +
  1850 +#if defined(__x86_64__)
  1851 +#define RSP "%%rsp"
  1852 +#define RBP "%%rbp"
  1853 +#else
  1854 +#define RSP "%%esp"
  1855 +#define RBP "%%ebp"
  1856 +#endif
1632 1857  
1633 1858 #define TEST_ENTER(size, stack_type, level)\
1634 1859 {\
1635   - int esp_save, esp_val, ebp_val, ebp_save, i;\
  1860 + long esp_save, esp_val, ebp_val, ebp_save, i;\
1636 1861 stack_type *ptr, *stack_end, *stack_ptr;\
1637 1862 memset(enter_stack, 0, sizeof(enter_stack));\
1638 1863 stack_end = stack_ptr = (stack_type *)(enter_stack + 4096);\
... ... @@ -1640,15 +1865,15 @@ int enter_stack[4096];
1640 1865 for(i=1;i<=32;i++)\
1641 1866 *--stack_ptr = i;\
1642 1867 esp_val = (long)stack_ptr;\
1643   - asm("movl %%esp, %[esp_save]\n"\
1644   - "movl %%ebp, %[ebp_save]\n"\
1645   - "movl %[esp_val], %%esp\n"\
1646   - "movl %[ebp_val], %%ebp\n"\
1647   - "enter" size " $12, $" #level "\n"\
1648   - "movl %%esp, %[esp_val]\n"\
1649   - "movl %%ebp, %[ebp_val]\n"\
1650   - "movl %[esp_save], %%esp\n"\
1651   - "movl %[ebp_save], %%ebp\n"\
  1868 + asm("mov " RSP ", %[esp_save]\n"\
  1869 + "mov " RBP ", %[ebp_save]\n"\
  1870 + "mov %[esp_val], " RSP "\n"\
  1871 + "mov %[ebp_val], " RBP "\n"\
  1872 + "enter" size " $8, $" #level "\n"\
  1873 + "mov " RSP ", %[esp_val]\n"\
  1874 + "mov " RBP ", %[ebp_val]\n"\
  1875 + "mov %[esp_save], " RSP "\n"\
  1876 + "mov %[ebp_save], " RBP "\n"\
1652 1877 : [esp_save] "=r" (esp_save),\
1653 1878 [ebp_save] "=r" (ebp_save),\
1654 1879 [esp_val] "=r" (esp_val),\
... ... @@ -1656,18 +1881,25 @@ int enter_stack[4096];
1656 1881 : "[esp_val]" (esp_val),\
1657 1882 "[ebp_val]" (ebp_val));\
1658 1883 printf("level=%d:\n", level);\
1659   - printf("esp_val=0x%08lx\n", esp_val - (long)stack_end);\
1660   - printf("ebp_val=0x%08lx\n", ebp_val - (long)stack_end);\
  1884 + printf("esp_val=" FMTLX "\n", esp_val - (long)stack_end);\
  1885 + printf("ebp_val=" FMTLX "\n", ebp_val - (long)stack_end);\
1661 1886 for(ptr = (stack_type *)esp_val; ptr < stack_end; ptr++)\
1662   - printf("%08x\n", ptr[0]);\
  1887 + printf(FMTLX "\n", (long)ptr[0]);\
1663 1888 }
1664 1889  
1665 1890 static void test_enter(void)
1666 1891 {
  1892 +#if defined(__x86_64__)
  1893 + TEST_ENTER("q", uint64_t, 0);
  1894 + TEST_ENTER("q", uint64_t, 1);
  1895 + TEST_ENTER("q", uint64_t, 2);
  1896 + TEST_ENTER("q", uint64_t, 31);
  1897 +#else
1667 1898 TEST_ENTER("l", uint32_t, 0);
1668 1899 TEST_ENTER("l", uint32_t, 1);
1669 1900 TEST_ENTER("l", uint32_t, 2);
1670 1901 TEST_ENTER("l", uint32_t, 31);
  1902 +#endif
1671 1903  
1672 1904 TEST_ENTER("w", uint16_t, 0);
1673 1905 TEST_ENTER("w", uint16_t, 1);
... ... @@ -1698,7 +1930,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
1698 1930 #define SSE_OP(op)\
1699 1931 {\
1700 1932 asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
1701   - printf("%-9s: a=%016llx%016llx b=%016llx%016llx r=%016llx%016llx\n",\
  1933 + printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
1702 1934 #op,\
1703 1935 a.q[1], a.q[0],\
1704 1936 b.q[1], b.q[0],\
... ... @@ -1724,7 +1956,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
1724 1956 a.q[0] = test_values[2*i][0];\
1725 1957 b.q[0] = test_values[2*i+1][0];\
1726 1958 asm volatile (#op " %2, %0" : "=y" (r.q[0]) : "0" (a.q[0]), "y" (b.q[0]));\
1727   - printf("%-9s: a=%016llx b=%016llx r=%016llx\n",\
  1959 + printf("%-9s: a=" FMT64X " b=" FMT64X " r=" FMT64X "\n",\
1728 1960 #op,\
1729 1961 a.q[0],\
1730 1962 b.q[0],\
... ... @@ -1740,7 +1972,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
1740 1972 b.q[0] = test_values[1][0];\
1741 1973 b.q[1] = test_values[1][1];\
1742 1974 asm volatile (#op " $" #ib ", %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
1743   - printf("%-9s: a=%016llx%016llx b=%016llx%016llx ib=%02x r=%016llx%016llx\n",\
  1975 + printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
1744 1976 #op,\
1745 1977 a.q[1], a.q[0],\
1746 1978 b.q[1], b.q[0],\
... ... @@ -1755,7 +1987,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
1755 1987 a.q[0] = test_values[2*i][0];\
1756 1988 a.q[1] = test_values[2*i][1];\
1757 1989 asm volatile (#op " $" #ib ", %1, %0" : "=x" (r.dq) : "x" (a.dq));\
1758   - printf("%-9s: a=%016llx%016llx ib=%02x r=%016llx%016llx\n",\
  1990 + printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
1759 1991 #op,\
1760 1992 a.q[1], a.q[0],\
1761 1993 ib,\
... ... @@ -1770,7 +2002,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
1770 2002 a.q[0] = test_values[2*i][0];\
1771 2003 a.q[1] = test_values[2*i][1];\
1772 2004 asm volatile (#op " $" #ib ", %0" : "=x" (r.dq) : "0" (a.dq));\
1773   - printf("%-9s: a=%016llx%016llx ib=%02x r=%016llx%016llx\n",\
  2005 + printf("%-9s: a=" FMT64X "" FMT64X " ib=%02x r=" FMT64X "" FMT64X "\n",\
1774 2006 #op,\
1775 2007 a.q[1], a.q[0],\
1776 2008 ib,\
... ... @@ -1788,7 +2020,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
1788 2020 b.q[0] = ib;\
1789 2021 b.q[1] = 0;\
1790 2022 asm volatile (#op " %2, %0" : "=x" (r.dq) : "0" (a.dq), "x" (b.dq));\
1791   - printf("%-9s: a=%016llx%016llx b=%016llx%016llx r=%016llx%016llx\n",\
  2023 + printf("%-9s: a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
1792 2024 #op,\
1793 2025 a.q[1], a.q[0],\
1794 2026 b.q[1], b.q[0],\
... ... @@ -1803,7 +2035,7 @@ static uint64_t __attribute__((aligned(16))) test_values[4][2] = {
1803 2035 a.q[0] = test_values[2*i][0];\
1804 2036 a.q[1] = test_values[2*i][1];\
1805 2037 asm volatile (#op " %1, %0" : "=r" (reg) : "x" (a.dq));\
1806   - printf("%-9s: a=%016llx%016llx r=%08x\n",\
  2038 + printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
1807 2039 #op,\
1808 2040 a.q[1], a.q[0],\
1809 2041 reg);\
... ... @@ -1845,7 +2077,7 @@ void test_sse_comi(double a1, double b1)
1845 2077 #define CVT_OP_XMM(op)\
1846 2078 {\
1847 2079 asm volatile (#op " %1, %0" : "=x" (r.dq) : "x" (a.dq));\
1848   - printf("%-9s: a=%016llx%016llx r=%016llx%016llx\n",\
  2080 + printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "" FMT64X "\n",\
1849 2081 #op,\
1850 2082 a.q[1], a.q[0],\
1851 2083 r.q[1], r.q[0]);\
... ... @@ -1854,7 +2086,7 @@ void test_sse_comi(double a1, double b1)
1854 2086 #define CVT_OP_XMM2MMX(op)\
1855 2087 {\
1856 2088 asm volatile (#op " %1, %0" : "=y" (r.q[0]) : "x" (a.dq));\
1857   - printf("%-9s: a=%016llx%016llx r=%016llx\n",\
  2089 + printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "\n",\
1858 2090 #op,\
1859 2091 a.q[1], a.q[0],\
1860 2092 r.q[0]);\
... ... @@ -1863,7 +2095,7 @@ void test_sse_comi(double a1, double b1)
1863 2095 #define CVT_OP_MMX2XMM(op)\
1864 2096 {\
1865 2097 asm volatile (#op " %1, %0" : "=x" (r.dq) : "y" (a.q[0]));\
1866   - printf("%-9s: a=%016llx r=%016llx%016llx\n",\
  2098 + printf("%-9s: a=" FMT64X " r=" FMT64X "" FMT64X "\n",\
1867 2099 #op,\
1868 2100 a.q[0],\
1869 2101 r.q[1], r.q[0]);\
... ... @@ -1872,7 +2104,7 @@ void test_sse_comi(double a1, double b1)
1872 2104 #define CVT_OP_REG2XMM(op)\
1873 2105 {\
1874 2106 asm volatile (#op " %1, %0" : "=x" (r.dq) : "r" (a.l[0]));\
1875   - printf("%-9s: a=%08x r=%016llx%016llx\n",\
  2107 + printf("%-9s: a=%08x r=" FMT64X "" FMT64X "\n",\
1876 2108 #op,\
1877 2109 a.l[0],\
1878 2110 r.q[1], r.q[0]);\
... ... @@ -1881,7 +2113,7 @@ void test_sse_comi(double a1, double b1)
1881 2113 #define CVT_OP_XMM2REG(op)\
1882 2114 {\
1883 2115 asm volatile (#op " %1, %0" : "=r" (r.l[0]) : "x" (a.dq));\
1884   - printf("%-9s: a=%016llx%016llx r=%08x\n",\
  2116 + printf("%-9s: a=" FMT64X "" FMT64X " r=%08x\n",\
1885 2117 #op,\
1886 2118 a.q[1], a.q[0],\
1887 2119 r.l[0]);\
... ... @@ -1912,7 +2144,7 @@ void test_fxsave(void)
1912 2144 {
1913 2145 struct fpxstate *fp = &fpx_state;
1914 2146 struct fpxstate *fp2 = &fpx_state2;
1915   - int i;
  2147 + int i, nb_xmm;
1916 2148 XMMReg a, b;
1917 2149 a.q[0] = test_values[0][0];
1918 2150 a.q[1] = test_values[0][1];
... ... @@ -1921,6 +2153,9 @@ void test_fxsave(void)
1921 2153  
1922 2154 asm("movdqa %2, %%xmm0\n"
1923 2155 "movdqa %3, %%xmm7\n"
  2156 +#if defined(__x86_64__)
  2157 + "movdqa %2, %%xmm15\n"
  2158 +#endif
1924 2159 " fld1\n"
1925 2160 " fldpi\n"
1926 2161 " fldln2\n"
... ... @@ -1934,14 +2169,19 @@ void test_fxsave(void)
1934 2169 printf("fpus=%04x\n", fp->fpus);
1935 2170 printf("fptag=%04x\n", fp->fptag);
1936 2171 for(i = 0; i < 3; i++) {
1937   - printf("ST%d: %016llx %04x\n",
  2172 + printf("ST%d: " FMT64X " %04x\n",
1938 2173 i,
1939 2174 *(uint64_t *)&fp->fpregs1[i * 16],
1940 2175 *(uint16_t *)&fp->fpregs1[i * 16 + 8]);
1941 2176 }
1942 2177 printf("mxcsr=%08x\n", fp->mxcsr & 0x1f80);
1943   - for(i = 0; i < 8; i++) {
1944   - printf("xmm%d: %016llx%016llx\n",
  2178 +#if defined(__x86_64__)
  2179 + nb_xmm = 16;
  2180 +#else
  2181 + nb_xmm = 8;
  2182 +#endif
  2183 + for(i = 0; i < nb_xmm; i++) {
  2184 + printf("xmm%d: " FMT64X "" FMT64X "\n",
1945 2185 i,
1946 2186 *(uint64_t *)&fp->xmm_regs[i * 16],
1947 2187 *(uint64_t *)&fp->xmm_regs[i * 16 + 8]);
... ... @@ -2005,10 +2245,10 @@ void test_sse(void)
2005 2245 MMX_OP2(pavgw);
2006 2246  
2007 2247 asm volatile ("pinsrw $1, %1, %0" : "=y" (r.q[0]) : "r" (0x12345678));
2008   - printf("%-9s: r=%016llx\n", "pinsrw", r.q[0]);
  2248 + printf("%-9s: r=" FMT64X "\n", "pinsrw", r.q[0]);
2009 2249  
2010 2250 asm volatile ("pinsrw $5, %1, %0" : "=x" (r.dq) : "r" (0x12345678));
2011   - printf("%-9s: r=%016llx%016llx\n", "pinsrw", r.q[1], r.q[0]);
  2251 + printf("%-9s: r=" FMT64X "" FMT64X "\n", "pinsrw", r.q[1], r.q[0]);
2012 2252  
2013 2253 a.q[0] = test_values[0][0];
2014 2254 a.q[1] = test_values[0][1];
... ... @@ -2035,7 +2275,7 @@ void test_sse(void)
2035 2275 asm volatile("maskmovq %1, %0" :
2036 2276 : "y" (a.q[0]), "y" (b.q[0]), "D" (&r)
2037 2277 : "memory");
2038   - printf("%-9s: r=%016llx a=%016llx b=%016llx\n",
  2278 + printf("%-9s: r=" FMT64X " a=" FMT64X " b=" FMT64X "\n",
2039 2279 "maskmov",
2040 2280 r.q[0],
2041 2281 a.q[0],
... ... @@ -2043,7 +2283,7 @@ void test_sse(void)
2043 2283 asm volatile("maskmovdqu %1, %0" :
2044 2284 : "x" (a.dq), "x" (b.dq), "D" (&r)
2045 2285 : "memory");
2046   - printf("%-9s: r=%016llx%016llx a=%016llx%016llx b=%016llx%016llx\n",
  2286 + printf("%-9s: r=" FMT64X "" FMT64X " a=" FMT64X "" FMT64X " b=" FMT64X "" FMT64X "\n",
2047 2287 "maskmov",
2048 2288 r.q[1], r.q[0],
2049 2289 a.q[1], a.q[0],
... ... @@ -2205,15 +2445,17 @@ void test_sse(void)
2205 2445  
2206 2446 #endif
2207 2447  
2208   -static void *call_end __init_call = NULL;
  2448 +extern void *__start_initcall;
  2449 +extern void *__stop_initcall;
  2450 +
2209 2451  
2210 2452 int main(int argc, char **argv)
2211 2453 {
2212 2454 void **ptr;
2213 2455 void (*func)(void);
2214 2456  
2215   - ptr = &call_start + 1;
2216   - while (*ptr != NULL) {
  2457 + ptr = &__start_initcall;
  2458 + while (ptr != &__stop_initcall) {
2217 2459 func = *ptr++;
2218 2460 func();
2219 2461 }
... ... @@ -2221,19 +2463,25 @@ int main(int argc, char **argv)
2221 2463 test_mul();
2222 2464 test_jcc();
2223 2465 test_floats();
  2466 +#if !defined(__x86_64__)
2224 2467 test_bcd();
  2468 +#endif
2225 2469 test_xchg();
2226 2470 test_string();
2227 2471 test_misc();
2228 2472 test_lea();
  2473 +#ifdef TEST_SEGS
2229 2474 test_segs();
2230 2475 test_code16();
  2476 +#endif
2231 2477 #ifdef TEST_VM86
2232 2478 test_vm86();
2233 2479 #endif
2234 2480 test_exceptions();
  2481 +#if !defined(__x86_64__)
2235 2482 test_self_modifying_code();
2236 2483 test_single_step();
  2484 +#endif
2237 2485 test_enter();
2238 2486 #ifdef TEST_SSE
2239 2487 test_sse();
... ...
tests/test-i386.h
  View file @776f222
1 1  
2 2 #define exec_op glue(exec_, OP)
  3 +#define exec_opq glue(glue(exec_, OP), q)
3 4 #define exec_opl glue(glue(exec_, OP), l)
4 5 #define exec_opw glue(glue(exec_, OP), w)
5 6 #define exec_opb glue(glue(exec_, OP), b)
6 7  
7   -#define EXECOP2(size, res, s1, flags) \
  8 +#define EXECOP2(size, rsize, res, s1, flags) \
8 9 asm ("push %4\n\t"\
9 10 "popf\n\t"\
10   - stringify(OP) size " %" size "2, %" size "0\n\t" \
  11 + stringify(OP) size " %" rsize "2, %" rsize "0\n\t" \
11 12 "pushf\n\t"\
12   - "popl %1\n\t"\
  13 + "pop %1\n\t"\
13 14 : "=q" (res), "=g" (flags)\
14   - : "q" (s1), "0" (res), "1" (flags));
  15 + : "q" (s1), "0" (res), "1" (flags)); \
  16 + printf("%-10s A=" FMTLX " B=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n", \
  17 + stringify(OP) size, s0, s1, res, iflags, flags & CC_MASK);
15 18  
16   -#define EXECOP1(size, res, flags) \
  19 +#define EXECOP1(size, rsize, res, flags) \
17 20 asm ("push %3\n\t"\
18 21 "popf\n\t"\
19   - stringify(OP) size " %" size "0\n\t" \
  22 + stringify(OP) size " %" rsize "0\n\t" \
20 23 "pushf\n\t"\
21   - "popl %1\n\t"\
  24 + "pop %1\n\t"\
22 25 : "=q" (res), "=g" (flags)\
23   - : "0" (res), "1" (flags));
  26 + : "0" (res), "1" (flags)); \
  27 + printf("%-10s A=" FMTLX " R=" FMTLX " CCIN=%04lx CC=%04lx\n", \
  28 + stringify(OP) size, s0, res, iflags, flags & CC_MASK);
24 29  
25 30 #ifdef OP1
26   -void exec_opl(int s0, int s1, int iflags)
  31 +#if defined(__x86_64__)
  32 +void exec_opq(long s0, long s1, long iflags)
27 33 {
28   - int res, flags;
  34 + long res, flags;
29 35 res = s0;
30 36 flags = iflags;
31   - EXECOP1("", res, flags);
32   - printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
33   - stringify(OP) "l", s0, res, iflags, flags & CC_MASK);
  37 + EXECOP1("q", "", res, flags);
34 38 }
  39 +#endif
35 40  
36   -void exec_opw(int s0, int s1, int iflags)
  41 +void exec_opl(long s0, long s1, long iflags)
37 42 {
38   - int res, flags;
  43 + long res, flags;
39 44 res = s0;
40 45 flags = iflags;
41   - EXECOP1("w", res, flags);
42   - printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
43   - stringify(OP) "w", s0, res, iflags, flags & CC_MASK);
  46 + EXECOP1("l", "k", res, flags);
44 47 }
45 48  
46   -void exec_opb(int s0, int s1, int iflags)
  49 +void exec_opw(long s0, long s1, long iflags)
47 50 {
48   - int res, flags;
  51 + long res, flags;
49 52 res = s0;
50 53 flags = iflags;
51   - EXECOP1("b", res, flags);
52   - printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",
53   - stringify(OP) "b", s0, res, iflags, flags & CC_MASK);
  54 + EXECOP1("w", "w", res, flags);
  55 +}
  56 +
  57 +void exec_opb(long s0, long s1, long iflags)
  58 +{
  59 + long res, flags;
  60 + res = s0;
  61 + flags = iflags;
  62 + EXECOP1("b", "b", res, flags);
54 63 }
55 64 #else
56   -void exec_opl(int s0, int s1, int iflags)
  65 +#if defined(__x86_64__)
  66 +void exec_opq(long s0, long s1, long iflags)
  67 +{
  68 + long res, flags;
  69 + res = s0;
  70 + flags = iflags;
  71 + EXECOP2("q", "", res, s1, flags);
  72 +}
  73 +#endif
  74 +
  75 +void exec_opl(long s0, long s1, long iflags)
57 76 {
58   - int res, flags;
  77 + long res, flags;
59 78 res = s0;
60 79 flags = iflags;
61   - EXECOP2("", res, s1, flags);
62   - printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
63   - stringify(OP) "l", s0, s1, res, iflags, flags & CC_MASK);
  80 + EXECOP2("l", "k", res, s1, flags);
64 81 }
65 82  
66   -void exec_opw(int s0, int s1, int iflags)
  83 +void exec_opw(long s0, long s1, long iflags)
67 84 {
68   - int res, flags;
  85 + long res, flags;
69 86 res = s0;
70 87 flags = iflags;
71   - EXECOP2("w", res, s1, flags);
72   - printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
73   - stringify(OP) "w", s0, s1, res, iflags, flags & CC_MASK);
  88 + EXECOP2("w", "w", res, s1, flags);
74 89 }
75 90  
76   -void exec_opb(int s0, int s1, int iflags)
  91 +void exec_opb(long s0, long s1, long iflags)
77 92 {
78   - int res, flags;
  93 + long res, flags;
79 94 res = s0;
80 95 flags = iflags;
81   - EXECOP2("b", res, s1, flags);
82   - printf("%-10s A=%08x B=%08x R=%08x CCIN=%04x CC=%04x\n",
83   - stringify(OP) "b", s0, s1, res, iflags, flags & CC_MASK);
  96 + EXECOP2("b", "b", res, s1, flags);
84 97 }
85 98 #endif
86 99  
87   -void exec_op(int s0, int s1)
  100 +void exec_op(long s0, long s1)
88 101 {
  102 + s0 = i2l(s0);
  103 + s1 = i2l(s1);
  104 +#if defined(__x86_64__)
  105 + exec_opq(s0, s1, 0);
  106 +#endif
89 107 exec_opl(s0, s1, 0);
90 108 exec_opw(s0, s1, 0);
91 109 exec_opb(s0, s1, 0);
92 110 #ifdef OP_CC
  111 +#if defined(__x86_64__)
  112 + exec_opq(s0, s1, CC_C);
  113 +#endif
93 114 exec_opl(s0, s1, CC_C);
94 115 exec_opw(s0, s1, CC_C);
95 116 exec_opb(s0, s1, CC_C);
... ...