Commit 7668a27f1d3bced1b6f4b9727cc80dc769a19d8e

Authored by bellard
1 parent e5d13e2f

openpic SMP support (Jocelyn Mayer)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1655 c046a42c-6fe2-441c-8c8c-71466251a162
hw/openpic.c
@@ -159,7 +159,7 @@ typedef struct IRQ_dst_t { @@ -159,7 +159,7 @@ typedef struct IRQ_dst_t {
159 uint32_t pcsr; /* CPU sensitivity register */ 159 uint32_t pcsr; /* CPU sensitivity register */
160 IRQ_queue_t raised; 160 IRQ_queue_t raised;
161 IRQ_queue_t servicing; 161 IRQ_queue_t servicing;
162 - CPUState *env; /* Needed if we did SMP */ 162 + CPUState *env;
163 } IRQ_dst_t; 163 } IRQ_dst_t;
164 164
165 struct openpic_t { 165 struct openpic_t {
@@ -265,8 +265,7 @@ static void IRQ_local_pipe (openpic_t *opp, int n_CPU, int n_IRQ) @@ -265,8 +265,7 @@ static void IRQ_local_pipe (openpic_t *opp, int n_CPU, int n_IRQ)
265 if (priority > dst->raised.priority) { 265 if (priority > dst->raised.priority) {
266 IRQ_get_next(opp, &dst->raised); 266 IRQ_get_next(opp, &dst->raised);
267 DPRINTF("Raise CPU IRQ\n"); 267 DPRINTF("Raise CPU IRQ\n");
268 - /* XXX: choose the correct cpu */  
269 - cpu_interrupt(first_cpu, CPU_INTERRUPT_HARD); 268 + cpu_interrupt(dst->env, CPU_INTERRUPT_HARD);
270 } 269 }
271 } 270 }
272 271
@@ -782,8 +781,7 @@ static void openpic_cpu_write (void *opaque, uint32_t addr, uint32_t val) @@ -782,8 +781,7 @@ static void openpic_cpu_write (void *opaque, uint32_t addr, uint32_t val)
782 src = &opp->src[n_IRQ]; 781 src = &opp->src[n_IRQ];
783 if (IPVP_PRIORITY(src->ipvp) > dst->servicing.priority) { 782 if (IPVP_PRIORITY(src->ipvp) > dst->servicing.priority) {
784 DPRINTF("Raise CPU IRQ\n"); 783 DPRINTF("Raise CPU IRQ\n");
785 - /* XXX: choose cpu */  
786 - cpu_interrupt(first_cpu, CPU_INTERRUPT_HARD); 784 + cpu_interrupt(dst->env, CPU_INTERRUPT_HARD);
787 } 785 }
788 } 786 }
789 break; 787 break;
@@ -965,7 +963,8 @@ static void openpic_map(PCIDevice *pci_dev, int region_num, @@ -965,7 +963,8 @@ static void openpic_map(PCIDevice *pci_dev, int region_num,
965 #endif 963 #endif
966 } 964 }
967 965
968 -openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus) 966 +openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
  967 + CPUPPCState **envp)
969 { 968 {
970 openpic_t *opp; 969 openpic_t *opp;
971 uint8_t *pci_conf; 970 uint8_t *pci_conf;
@@ -1019,6 +1018,8 @@ openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus) @@ -1019,6 +1018,8 @@ openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus)
1019 for (; i < MAX_IRQ; i++) { 1018 for (; i < MAX_IRQ; i++) {
1020 opp->src[i].type = IRQ_INTERNAL; 1019 opp->src[i].type = IRQ_INTERNAL;
1021 } 1020 }
  1021 + for (i = 0; i < nb_cpus; i++)
  1022 + opp->dst[i].env = envp[i];
1022 openpic_reset(opp); 1023 openpic_reset(opp);
1023 if (pmem_index) 1024 if (pmem_index)
1024 *pmem_index = opp->mem_index; 1025 *pmem_index = opp->mem_index;
hw/ppc_chrp.c
@@ -474,7 +474,7 @@ static void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, @@ -474,7 +474,7 @@ static void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
474 vga_initialize(pci_bus, ds, phys_ram_base + ram_size, 474 vga_initialize(pci_bus, ds, phys_ram_base + ram_size,
475 ram_size, vga_ram_size, 475 ram_size, vga_ram_size,
476 vga_bios_offset, vga_bios_size); 476 vga_bios_offset, vga_bios_size);
477 - pic = openpic_init(NULL, &openpic_mem_index, 1); 477 + pic = openpic_init(NULL, &openpic_mem_index, 1, &env);
478 set_irq = openpic_set_irq; 478 set_irq = openpic_set_irq;
479 pci_set_pic(pci_bus, set_irq, pic); 479 pci_set_pic(pci_bus, set_irq, pic);
480 480
@@ -613,7 +613,8 @@ PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base); @@ -613,7 +613,8 @@ PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base);
613 /* openpic.c */ 613 /* openpic.c */
614 typedef struct openpic_t openpic_t; 614 typedef struct openpic_t openpic_t;
615 void openpic_set_irq(void *opaque, int n_IRQ, int level); 615 void openpic_set_irq(void *opaque, int n_IRQ, int level);
616 -openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus); 616 +openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
  617 + CPUState **envp);
617 618
618 /* heathrow_pic.c */ 619 /* heathrow_pic.c */
619 typedef struct HeathrowPICS HeathrowPICS; 620 typedef struct HeathrowPICS HeathrowPICS;