gwj / at91sam9263 · Commits

Commit 75554a3ca10a7ad295d2a3d2e14ee6ba90f94c8b

Authored by balrog
1 parent b031ebc5

Allow attaching devices to OMAP UARTs. 

Also avoid two signedness warnings in hw/omap2.c.
The API to attach new devices to serials is fine, bu the implementation
is a hack.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5263 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 3 changed files with 17 additions and 4 deletions
hw/omap.h
  View file @75554a3
... ... @@ -660,6 +660,7 @@ struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,
660 660 qemu_irq irq, omap_clk fclk, omap_clk iclk,
661 661 qemu_irq txdma, qemu_irq rxdma, CharDriverState *chr);
662 662 void omap_uart_reset(struct omap_uart_s *s);
  663 +void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr);
663 664  
664 665 struct omap_mpuio_s;
665 666 struct omap_mpuio_s *omap_mpuio_init(target_phys_addr_t base,
... ...
hw/omap1.c
  View file @75554a3
... ... @@ -1983,6 +1983,8 @@ struct omap_uart_s {
1983 1983 SerialState *serial; /* TODO */
1984 1984 struct omap_target_agent_s *ta;
1985 1985 target_phys_addr_t base;
  1986 + omap_clk fclk;
  1987 + qemu_irq irq;
1986 1988  
1987 1989 uint8_t eblr;
1988 1990 uint8_t syscontrol;
... ... @@ -2007,6 +2009,9 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
2007 2009 struct omap_uart_s *s = (struct omap_uart_s *)
2008 2010 qemu_mallocz(sizeof(struct omap_uart_s));
2009 2011  
  2012 + s->base = base;
  2013 + s->fclk = fclk;
  2014 + s->irq = irq;
2010 2015 s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
2011 2016 chr ?: qemu_chr_open("null"), 1);
2012 2017  
... ... @@ -2108,13 +2113,20 @@ struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta,
2108 2113 omap_uart_writefn, s);
2109 2114  
2110 2115 s->ta = ta;
2111   - s->base = base;
2112 2116  
2113 2117 cpu_register_physical_memory(s->base + 0x20, 0x100, iomemtype);
2114 2118  
2115 2119 return s;
2116 2120 }
2117 2121  
  2122 +void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
  2123 +{
  2124 + /* TODO: Should reuse or destroy current s->serial */
  2125 + s->serial = serial_mm_init(s->base, 2, s->irq,
  2126 + omap_clk_getrate(s->fclk) / 16,
  2127 + chr ?: qemu_chr_open("null"), 1);
  2128 +}
  2129 +
2118 2130 /* MPU Clock/Reset/Power Mode Control */
2119 2131 static uint32_t omap_clkm_read(void *opaque, target_phys_addr_t addr)
2120 2132 {
... ...
hw/omap2.c
  View file @75554a3
... ... @@ -156,7 +156,7 @@ static inline void omap_gp_timer_trigger(struct omap_gp_timer_s *timer)
156 156 {
157 157 if (timer->pt)
158 158 /* TODO in overflow-and-match mode if the first event to
159   - * occurs is the match, don't toggle. */
  159 + * occur is the match, don't toggle. */
160 160 omap_gp_timer_out(timer, !timer->out_val);
161 161 else
162 162 /* TODO inverted pulse on timer->out_val == 1? */
... ... @@ -2151,12 +2151,12 @@ static void omap_sti_fifo_write(void *opaque, target_phys_addr_t addr,
2151 2151  
2152 2152 if (ch == STI_TRACE_CONTROL_CHANNEL) {
2153 2153 /* Flush channel <i>value</i>. */
2154   - qemu_chr_write(s->chr, "\r", 1);
  2154 + qemu_chr_write(s->chr, (const uint8_t *) "\r", 1);
2155 2155 } else if (ch == STI_TRACE_CONSOLE_CHANNEL || 1) {
2156 2156 if (value == 0xc0 || value == 0xc3) {
2157 2157 /* Open channel <i>ch</i>. */
2158 2158 } else if (value == 0x00)
2159   - qemu_chr_write(s->chr, "\n", 1);
  2159 + qemu_chr_write(s->chr, (const uint8_t *) "\n", 1);
2160 2160 else
2161 2161 qemu_chr_write(s->chr, &byte, 1);
2162 2162 }
... ...