Commit 741402f933bbc41eb0a51b10c7053718fca46a14
1 parent
b854bc19
Remove target dependent code
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3528 c046a42c-6fe2-441c-8c8c-71466251a162
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3 changed files
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25 additions
and
8 deletions
hw/fdc.c
@@ -395,6 +395,8 @@ struct fdctrl_t { | @@ -395,6 +395,8 @@ struct fdctrl_t { | ||
395 | uint8_t lock; | 395 | uint8_t lock; |
396 | /* Power down config (also with status regB access mode */ | 396 | /* Power down config (also with status regB access mode */ |
397 | uint8_t pwrd; | 397 | uint8_t pwrd; |
398 | + /* Sun4m quirks? */ | ||
399 | + int sun; | ||
398 | /* Floppy drives */ | 400 | /* Floppy drives */ |
399 | fdrive_t drives[2]; | 401 | fdrive_t drives[2]; |
400 | }; | 402 | }; |
@@ -405,12 +407,14 @@ static uint32_t fdctrl_read (void *opaque, uint32_t reg) | @@ -405,12 +407,14 @@ static uint32_t fdctrl_read (void *opaque, uint32_t reg) | ||
405 | uint32_t retval; | 407 | uint32_t retval; |
406 | 408 | ||
407 | switch (reg & 0x07) { | 409 | switch (reg & 0x07) { |
408 | -#ifdef TARGET_SPARC | ||
409 | case 0x00: | 410 | case 0x00: |
410 | - // Identify to Linux as S82078B | ||
411 | - retval = fdctrl_read_statusB(fdctrl); | 411 | + if (fdctrl->sun) { |
412 | + // Identify to Linux as S82078B | ||
413 | + retval = fdctrl_read_statusB(fdctrl); | ||
414 | + } else { | ||
415 | + retval = (uint32_t)(-1); | ||
416 | + } | ||
412 | break; | 417 | break; |
413 | -#endif | ||
414 | case 0x01: | 418 | case 0x01: |
415 | retval = fdctrl_read_statusB(fdctrl); | 419 | retval = fdctrl_read_statusB(fdctrl); |
416 | break; | 420 | break; |
@@ -598,6 +602,7 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, | @@ -598,6 +602,7 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, | ||
598 | fdctrl->dma_chann = dma_chann; | 602 | fdctrl->dma_chann = dma_chann; |
599 | fdctrl->io_base = io_base; | 603 | fdctrl->io_base = io_base; |
600 | fdctrl->config = 0x60; /* Implicit seek, polling & FIFO enabled */ | 604 | fdctrl->config = 0x60; /* Implicit seek, polling & FIFO enabled */ |
605 | + fdctrl->sun = 0; | ||
601 | if (fdctrl->dma_chann != -1) { | 606 | if (fdctrl->dma_chann != -1) { |
602 | fdctrl->dma_en = 1; | 607 | fdctrl->dma_en = 1; |
603 | DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl); | 608 | DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl); |
@@ -631,6 +636,17 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, | @@ -631,6 +636,17 @@ fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, | ||
631 | return fdctrl; | 636 | return fdctrl; |
632 | } | 637 | } |
633 | 638 | ||
639 | +fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base, | ||
640 | + BlockDriverState **fds) | ||
641 | +{ | ||
642 | + fdctrl_t *fdctrl; | ||
643 | + | ||
644 | + fdctrl = fdctrl_init(irq, 0, 1, io_base, fds); | ||
645 | + fdctrl->sun = 1; | ||
646 | + | ||
647 | + return fdctrl; | ||
648 | +} | ||
649 | + | ||
634 | /* XXX: may change if moved to bdrv */ | 650 | /* XXX: may change if moved to bdrv */ |
635 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num) | 651 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num) |
636 | { | 652 | { |
@@ -647,14 +663,12 @@ static void fdctrl_reset_irq (fdctrl_t *fdctrl) | @@ -647,14 +663,12 @@ static void fdctrl_reset_irq (fdctrl_t *fdctrl) | ||
647 | 663 | ||
648 | static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status) | 664 | static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status) |
649 | { | 665 | { |
650 | -#ifdef TARGET_SPARC | ||
651 | // Sparc mutation | 666 | // Sparc mutation |
652 | - if (!fdctrl->dma_en) { | 667 | + if (fdctrl->sun && !fdctrl->dma_en) { |
653 | fdctrl->state &= ~FD_CTRL_BUSY; | 668 | fdctrl->state &= ~FD_CTRL_BUSY; |
654 | fdctrl->int_status = status; | 669 | fdctrl->int_status = status; |
655 | return; | 670 | return; |
656 | } | 671 | } |
657 | -#endif | ||
658 | if (~(fdctrl->state & FD_CTRL_INTR)) { | 672 | if (~(fdctrl->state & FD_CTRL_INTR)) { |
659 | qemu_set_irq(fdctrl->irq, 1); | 673 | qemu_set_irq(fdctrl->irq, 1); |
660 | fdctrl->state |= FD_CTRL_INTR; | 674 | fdctrl->state |= FD_CTRL_INTR; |
hw/sun4m.c
@@ -389,7 +389,8 @@ static void *sun4m_hw_init(const struct hwdef *hwdef, int RAM_size, | @@ -389,7 +389,8 @@ static void *sun4m_hw_init(const struct hwdef *hwdef, int RAM_size, | ||
389 | // Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device | 389 | // Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device |
390 | slavio_serial_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], | 390 | slavio_serial_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], |
391 | serial_hds[1], serial_hds[0]); | 391 | serial_hds[1], serial_hds[0]); |
392 | - fdctrl_init(slavio_irq[hwdef->fd_irq], 0, 1, hwdef->fd_base, fd_table); | 392 | + |
393 | + sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd_table); | ||
393 | 394 | ||
394 | main_esp = esp_init(bs_table, hwdef->esp_base, espdma, *espdma_irq, | 395 | main_esp = esp_init(bs_table, hwdef->esp_base, espdma, *espdma_irq, |
395 | esp_reset); | 396 | esp_reset); |
vl.h
@@ -1041,6 +1041,8 @@ typedef struct fdctrl_t fdctrl_t; | @@ -1041,6 +1041,8 @@ typedef struct fdctrl_t fdctrl_t; | ||
1041 | fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, | 1041 | fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped, |
1042 | target_phys_addr_t io_base, | 1042 | target_phys_addr_t io_base, |
1043 | BlockDriverState **fds); | 1043 | BlockDriverState **fds); |
1044 | +fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base, | ||
1045 | + BlockDriverState **fds); | ||
1044 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); | 1046 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); |
1045 | 1047 | ||
1046 | /* eepro100.c */ | 1048 | /* eepro100.c */ |