Commit 71c8b8fd7bdf6165e32cc9c9ed6d701d0ad6b3e0
1 parent
5eb7995e
TARGET_FMT_lu may also be useful.
Fix compilation warnings. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3190 c046a42c-6fe2-441c-8c8c-71466251a162
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6 additions
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2 deletions
cpu-defs.h
| ... | ... | @@ -45,11 +45,13 @@ typedef int32_t target_long; |
| 45 | 45 | typedef uint32_t target_ulong; |
| 46 | 46 | #define TARGET_FMT_lx "%08x" |
| 47 | 47 | #define TARGET_FMT_ld "%d" |
| 48 | +#define TARGET_FMT_lu "%u" | |
| 48 | 49 | #elif TARGET_LONG_SIZE == 8 |
| 49 | 50 | typedef int64_t target_long; |
| 50 | 51 | typedef uint64_t target_ulong; |
| 51 | 52 | #define TARGET_FMT_lx "%016" PRIx64 |
| 52 | 53 | #define TARGET_FMT_ld "%" PRId64 |
| 54 | +#define TARGET_FMT_lu "%" PRIu64 | |
| 53 | 55 | #else |
| 54 | 56 | #error TARGET_LONG_SIZE undefined |
| 55 | 57 | #endif | ... | ... |
target-ppc/cpu.h
| ... | ... | @@ -55,12 +55,13 @@ typedef uint64_t ppc_gpr_t; |
| 55 | 55 | */ |
| 56 | 56 | typedef uint64_t ppc_gpr_t; |
| 57 | 57 | #define TARGET_GPR_BITS 64 |
| 58 | +#define REGX "%08" PRIx64 | |
| 58 | 59 | #else |
| 59 | 60 | typedef uint32_t ppc_gpr_t; |
| 60 | 61 | #define TARGET_GPR_BITS 32 |
| 62 | +#define REGX "%08" PRIx32 | |
| 61 | 63 | #endif |
| 62 | 64 | #define TARGET_LONG_BITS 32 |
| 63 | -#define REGX "%08" PRIx32 | |
| 64 | 65 | #define TARGET_PAGE_BITS 12 |
| 65 | 66 | #endif |
| 66 | 67 | ... | ... |
target-ppc/op_helper.c
| ... | ... | @@ -2537,7 +2537,8 @@ void do_4xx_tlbwe_hi (void) |
| 2537 | 2537 | * of the ppc or ppc64 one |
| 2538 | 2538 | */ |
| 2539 | 2539 | if ((T1 & 0x40) && tlb->size < TARGET_PAGE_SIZE) { |
| 2540 | - cpu_abort(env, "TLB size %u < %u are not supported (%d)\n", | |
| 2540 | + cpu_abort(env, "TLB size " TARGET_FMT_lu " < %u " | |
| 2541 | + "are not supported (%d)\n", | |
| 2541 | 2542 | tlb->size, TARGET_PAGE_SIZE, (int)((T1 >> 7) & 0x7)); |
| 2542 | 2543 | } |
| 2543 | 2544 | tlb->EPN = (T1 & 0xFFFFFC00) & ~(tlb->size - 1); | ... | ... |