gwj / at91sam9263 · Commits

Commit 71817e48988acad1f1d92902ed5d46dc36dd2117

Authored by blueswir1
1 parent d60bb01c

Really fix cas 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4869 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 5 additions and 6 deletions
target-sparc/translate.c
  View file @71817e4
@@ -4178,12 +4178,11 @@ static void disas_sparc_insn(DisasContext * dc) @@ -4178,12 +4178,11 @@ static void disas_sparc_insn(DisasContext * dc)
4178 unsigned int xop = GET_FIELD(insn, 7, 12); 4178 unsigned int xop = GET_FIELD(insn, 7, 12);
4179 4179
4180 cpu_src1 = get_src1(insn, cpu_src1); 4180 cpu_src1 = get_src1(insn, cpu_src1);
4181 - if (xop == 0x3c || xop == 0x3e)  
4182 - { 4181 + if (xop == 0x3c || xop == 0x3e) { // V9 casa/casxa
4183 rs2 = GET_FIELD(insn, 27, 31); 4182 rs2 = GET_FIELD(insn, 27, 31);
4184 gen_movl_reg_TN(rs2, cpu_src2); 4183 gen_movl_reg_TN(rs2, cpu_src2);
4185 - }  
4186 - else if (IS_IMM) { /* immediate */ 4184 + tcg_gen_mov_tl(cpu_addr, cpu_src1);
  4185 + } else if (IS_IMM) { /* immediate */
4187 rs2 = GET_FIELDs(insn, 19, 31); 4186 rs2 = GET_FIELDs(insn, 19, 31);
4188 tcg_gen_addi_tl(cpu_addr, cpu_src1, (int)rs2); 4187 tcg_gen_addi_tl(cpu_addr, cpu_src1, (int)rs2);
4189 } else { /* register */ 4188 } else { /* register */
@@ -4615,11 +4614,11 @@ static void disas_sparc_insn(DisasContext * dc) @@ -4615,11 +4614,11 @@ static void disas_sparc_insn(DisasContext * dc)
4615 gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd)); 4614 gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd));
4616 break; 4615 break;
4617 case 0x3c: /* V9 casa */ 4616 case 0x3c: /* V9 casa */
4618 - gen_cas_asi(cpu_val, cpu_addr, cpu_val, insn, rd); 4617 + gen_cas_asi(cpu_val, cpu_addr, cpu_src2, insn, rd);
4619 gen_movl_TN_reg(rd, cpu_val); 4618 gen_movl_TN_reg(rd, cpu_val);
4620 break; 4619 break;
4621 case 0x3e: /* V9 casxa */ 4620 case 0x3e: /* V9 casxa */
4622 - gen_casx_asi(cpu_val, cpu_addr, cpu_val, insn, rd); 4621 + gen_casx_asi(cpu_val, cpu_addr, cpu_src2, insn, rd);
4623 gen_movl_TN_reg(rd, cpu_val); 4622 gen_movl_TN_reg(rd, cpu_val);
4624 break; 4623 break;
4625 #else 4624 #else