gwj / at91sam9263 · Commits

Commit 7138fcfbf7dd74a0bc68e2fc3fa7c5ba58f2d6c8

Authored by bellard
1 parent c45886db

use CPUState 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@540 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 4 changed files with 33 additions and 20 deletions
hw/ide.c
  View file @7138fcf
... ... @@ -1047,7 +1047,7 @@ static void ide_atapi_cmd(IDEState *s)
1047 1047 }
1048 1048 }
1049 1049  
1050   -static void ide_ioport_write(CPUX86State *env, uint32_t addr, uint32_t val)
  1050 +static void ide_ioport_write(CPUState *env, uint32_t addr, uint32_t val)
1051 1051 {
1052 1052 IDEState *ide_if = get_ide_interface(addr);
1053 1053 IDEState *s = ide_if->cur_drive;
... ... @@ -1198,7 +1198,7 @@ static void ide_ioport_write(CPUX86State *env, uint32_t addr, uint32_t val)
1198 1198 }
1199 1199 }
1200 1200  
1201   -static uint32_t ide_ioport_read(CPUX86State *env, uint32_t addr1)
  1201 +static uint32_t ide_ioport_read(CPUState *env, uint32_t addr1)
1202 1202 {
1203 1203 IDEState *s = get_ide_interface(addr1)->cur_drive;
1204 1204 uint32_t addr;
... ... @@ -1239,7 +1239,7 @@ static uint32_t ide_ioport_read(CPUX86State *env, uint32_t addr1)
1239 1239 return ret;
1240 1240 }
1241 1241  
1242   -static uint32_t ide_status_read(CPUX86State *env, uint32_t addr)
  1242 +static uint32_t ide_status_read(CPUState *env, uint32_t addr)
1243 1243 {
1244 1244 IDEState *s = get_ide_interface(addr)->cur_drive;
1245 1245 int ret;
... ... @@ -1250,7 +1250,7 @@ static uint32_t ide_status_read(CPUX86State *env, uint32_t addr)
1250 1250 return ret;
1251 1251 }
1252 1252  
1253   -static void ide_cmd_write(CPUX86State *env, uint32_t addr, uint32_t val)
  1253 +static void ide_cmd_write(CPUState *env, uint32_t addr, uint32_t val)
1254 1254 {
1255 1255 IDEState *ide_if = get_ide_interface(addr);
1256 1256 IDEState *s;
... ... @@ -1285,7 +1285,7 @@ static void ide_cmd_write(CPUX86State *env, uint32_t addr, uint32_t val)
1285 1285 ide_if[1].cmd = val;
1286 1286 }
1287 1287  
1288   -static void ide_data_writew(CPUX86State *env, uint32_t addr, uint32_t val)
  1288 +static void ide_data_writew(CPUState *env, uint32_t addr, uint32_t val)
1289 1289 {
1290 1290 IDEState *s = get_ide_interface(addr)->cur_drive;
1291 1291 uint8_t *p;
... ... @@ -1298,7 +1298,7 @@ static void ide_data_writew(CPUX86State *env, uint32_t addr, uint32_t val)
1298 1298 s->end_transfer_func(s);
1299 1299 }
1300 1300  
1301   -static uint32_t ide_data_readw(CPUX86State *env, uint32_t addr)
  1301 +static uint32_t ide_data_readw(CPUState *env, uint32_t addr)
1302 1302 {
1303 1303 IDEState *s = get_ide_interface(addr)->cur_drive;
1304 1304 uint8_t *p;
... ... @@ -1312,7 +1312,7 @@ static uint32_t ide_data_readw(CPUX86State *env, uint32_t addr)
1312 1312 return ret;
1313 1313 }
1314 1314  
1315   -static void ide_data_writel(CPUX86State *env, uint32_t addr, uint32_t val)
  1315 +static void ide_data_writel(CPUState *env, uint32_t addr, uint32_t val)
1316 1316 {
1317 1317 IDEState *s = get_ide_interface(addr)->cur_drive;
1318 1318 uint8_t *p;
... ... @@ -1325,7 +1325,7 @@ static void ide_data_writel(CPUX86State *env, uint32_t addr, uint32_t val)
1325 1325 s->end_transfer_func(s);
1326 1326 }
1327 1327  
1328   -static uint32_t ide_data_readl(CPUX86State *env, uint32_t addr)
  1328 +static uint32_t ide_data_readl(CPUState *env, uint32_t addr)
1329 1329 {
1330 1330 IDEState *s = get_ide_interface(addr)->cur_drive;
1331 1331 uint8_t *p;
... ...
hw/sb16.c
  View file @7138fcf
... ... @@ -48,9 +48,9 @@
48 48 #endif
49 49  
50 50 #define IO_READ_PROTO(name) \
51   - uint32_t name (struct CPUX86State *env, uint32_t nport)
  51 + uint32_t name (struct CPUState *env, uint32_t nport)
52 52 #define IO_WRITE_PROTO(name) \
53   - void name (struct CPUX86State *env, uint32_t nport, uint32_t val)
  53 + void name (struct CPUState *env, uint32_t nport, uint32_t val)
54 54  
55 55 static struct {
56 56 int ver_lo;
... ...
hw/vga.c
  View file @7138fcf
... ... @@ -223,7 +223,7 @@ static uint8_t expand4to8[16];
223 223 VGAState vga_state;
224 224 int vga_io_memory;
225 225  
226   -static uint32_t vga_ioport_read(CPUX86State *env, uint32_t addr)
  226 +static uint32_t vga_ioport_read(CPUState *env, uint32_t addr)
227 227 {
228 228 VGAState *s = &vga_state;
229 229 int val, index;
... ... @@ -319,7 +319,7 @@ static uint32_t vga_ioport_read(CPUX86State *env, uint32_t addr)
319 319 return val;
320 320 }
321 321  
322   -static void vga_ioport_write(CPUX86State *env, uint32_t addr, uint32_t val)
  322 +static void vga_ioport_write(CPUState *env, uint32_t addr, uint32_t val)
323 323 {
324 324 VGAState *s = &vga_state;
325 325 int index, v;
... ... @@ -1350,8 +1350,8 @@ CPUWriteMemoryFunc *vga_mem_write[3] = {
1350 1350 vga_mem_writel,
1351 1351 };
1352 1352  
1353   -int vga_init(DisplayState *ds, uint8_t *vga_ram_base,
1354   - unsigned long vga_ram_offset, int vga_ram_size)
  1353 +int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
  1354 + unsigned long vga_ram_offset, int vga_ram_size)
1355 1355 {
1356 1356 VGAState *s = &vga_state;
1357 1357 int i, j, v, b;
... ... @@ -1417,6 +1417,10 @@ int vga_init(DisplayState *ds, uint8_t *vga_ram_base,
1417 1417 register_ioport_read(0x3da, 1, vga_ioport_read, 1);
1418 1418  
1419 1419 vga_io_memory = cpu_register_io_memory(0, vga_mem_read, vga_mem_write);
1420   - cpu_register_physical_memory(0xa0000, 0x20000, vga_io_memory);
  1420 +#if defined (TARGET_I386)
  1421 + cpu_register_physical_memory(0x000a0000, 0x20000, vga_io_memory);
  1422 +#elif defined (TARGET_PPC)
  1423 + cpu_register_physical_memory(0xf00a0000, 0x20000, vga_io_memory);
  1424 +#endif
1421 1425 return 0;
1422 1426 }
... ...
... ... @@ -25,12 +25,12 @@
25 25 #define VL_H
26 26  
27 27 /* vl.c */
28   -struct CPUX86State;
  28 +struct CPUState;
29 29 extern int reset_requested;
30 30 extern int64_t ticks_per_sec;
31 31  
32   -typedef void (IOPortWriteFunc)(struct CPUX86State *env, uint32_t address, uint32_t data);
33   -typedef uint32_t (IOPortReadFunc)(struct CPUX86State *env, uint32_t address);
  32 +typedef void (IOPortWriteFunc)(struct CPUState *env, uint32_t address, uint32_t data);
  33 +typedef uint32_t (IOPortReadFunc)(struct CPUState *env, uint32_t address);
34 34  
35 35 void *get_mmap_addr(unsigned long size);
36 36 int register_ioport_read(int start, int length, IOPortReadFunc *func, int size);
... ... @@ -93,8 +93,8 @@ static inline void dpy_resize(DisplayState *s, int w, int h)
93 93 s->dpy_resize(s, w, h);
94 94 }
95 95  
96   -int vga_init(DisplayState *ds, uint8_t *vga_ram_base,
97   - unsigned long vga_ram_offset, int vga_ram_size);
  96 +int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
  97 + unsigned long vga_ram_offset, int vga_ram_size);
98 98 void vga_update_display(void);
99 99  
100 100 /* sdl.c */
... ... @@ -144,4 +144,13 @@ void DMA_register_channel (int nchan,
144 144 void SB16_run (void);
145 145 void SB16_init (void);
146 146  
  147 +/* fdc.c */
  148 +#define MAX_FD 2
  149 +extern BlockDriverState *fd_table[MAX_FD];
  150 +
  151 +void cmos_register_fd (uint8_t fd0, uint8_t fd1);
  152 +void fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, uint32_t base,
  153 + char boot_device);
  154 +int fdctrl_disk_change (int idx, const unsigned char *filename, int ro);
  155 +
147 156 #endif /* VL_H */
... ...