gwj / at91sam9263 · Commits

Commit 6f2d8978728c48ca46f5c01835438508aace5c64

Authored by j_mayer
1 parent 8582a53a

Fix usage of the -1 constant in the PowerPC target code: 

fix invalid size casts and/or sign-extensions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3626 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 4 changed files with 54 additions and 51 deletions
target-ppc/helper.c
  View file @6f2d897
... ... @@ -199,7 +199,7 @@ static always_inline int _pte_check (mmu_ctx_t *ctx, int is_64b,
199 199 pp = pte1 & 0x00000003;
200 200 }
201 201 if (ptem == ctx->ptem) {
202   - if (ctx->raddr != (target_ulong)-1) {
  202 + if (ctx->raddr != (target_phys_addr_t)-1ULL) {
203 203 /* all matches should have equal RPN, WIMG & PP */
204 204 if ((ctx->raddr & mmask) != (pte1 & mmask)) {
205 205 if (loglevel != 0)
... ... @@ -900,7 +900,7 @@ static always_inline target_phys_addr_t get_pgaddr (target_phys_addr_t sdr1,
900 900 target_phys_addr_t hash,
901 901 target_phys_addr_t mask)
902 902 {
903   - return (sdr1 & ((target_ulong)(-1ULL) << sdr_sh)) | (hash & mask);
  903 + return (sdr1 & ((target_phys_addr_t)(-1ULL) << sdr_sh)) | (hash & mask);
904 904 }
905 905  
906 906 static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
... ... @@ -1011,7 +1011,7 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx,
1011 1011 ctx->ptem = (vsid << 7) | (pgidx >> 10);
1012 1012 }
1013 1013 /* Initialize real address with an invalid value */
1014   - ctx->raddr = (target_ulong)-1;
  1014 + ctx->raddr = (target_phys_addr_t)-1ULL;
1015 1015 if (unlikely(env->mmu_model == POWERPC_MMU_SOFT_6xx ||
1016 1016 env->mmu_model == POWERPC_MMU_SOFT_74xx)) {
1017 1017 /* Software TLB search */
... ... @@ -1223,7 +1223,7 @@ int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
1223 1223 int i, ret, zsel, zpr, pr;
1224 1224  
1225 1225 ret = -1;
1226   - raddr = -1;
  1226 + raddr = (target_phys_addr_t)-1ULL;
1227 1227 pr = msr_pr;
1228 1228 for (i = 0; i < env->nb_tlb; i++) {
1229 1229 tlb = &env->tlb[i].tlbe;
... ... @@ -1306,7 +1306,7 @@ int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
1306 1306 int i, prot, ret;
1307 1307  
1308 1308 ret = -1;
1309   - raddr = -1;
  1309 + raddr = (target_phys_addr_t)-1ULL;
1310 1310 for (i = 0; i < env->nb_tlb; i++) {
1311 1311 tlb = &env->tlb[i].tlbe;
1312 1312 if (ppcemb_tlb_check(env, tlb, &raddr, address,
... ... @@ -1975,7 +1975,7 @@ void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr)
1975 1975 case POWERPC_MMU_32B:
1976 1976 case POWERPC_MMU_601:
1977 1977 /* tlbie invalidate TLBs for all segments */
1978   - addr &= ~((target_ulong)-1 << 28);
  1978 + addr &= ~((target_ulong)-1ULL << 28);
1979 1979 /* XXX: this case should be optimized,
1980 1980 * giving a mask to tlb_flush_page
1981 1981 */
... ... @@ -2730,7 +2730,7 @@ static always_inline void powerpc_excp (CPUState *env,
2730 2730 new_msr &= ~((target_ulong)1 << MSR_LE);
2731 2731 /* Jump to handler */
2732 2732 vector = env->excp_vectors[excp];
2733   - if (vector == (target_ulong)-1) {
  2733 + if (vector == (target_ulong)-1ULL) {
2734 2734 cpu_abort(env, "Raised an exception without defined vector %d\n",
2735 2735 excp);
2736 2736 }
... ... @@ -2961,7 +2961,7 @@ void cpu_ppc_reset (void *opaque)
2961 2961 #endif
2962 2962 env->msr = msr;
2963 2963 hreg_compute_hflags(env);
2964   - env->reserve = -1;
  2964 + env->reserve = (target_ulong)-1ULL;
2965 2965 /* Be sure no exception or interrupt is pending */
2966 2966 env->pending_interrupts = 0;
2967 2967 env->exception_index = POWERPC_EXCP_NONE;
... ...
target-ppc/op.c
  View file @6f2d897
... ... @@ -959,9 +959,9 @@ void OPPROTO op_add_ze (void)
959 959 /* divide word */
960 960 void OPPROTO op_divw (void)
961 961 {
962   - if (unlikely(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) ||
  962 + if (unlikely(((int32_t)T0 == INT32_MIN && (int32_t)T1 == (int32_t)-1) ||
963 963 (int32_t)T1 == 0)) {
964   - T0 = (int32_t)((-1) * ((uint32_t)T0 >> 31));
  964 + T0 = (int32_t)(UINT32_MAX * ((uint32_t)T0 >> 31));
965 965 } else {
966 966 T0 = (int32_t)T0 / (int32_t)T1;
967 967 }
... ... @@ -971,9 +971,9 @@ void OPPROTO op_divw (void)
971 971 #if defined(TARGET_PPC64)
972 972 void OPPROTO op_divd (void)
973 973 {
974   - if (unlikely(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1) ||
  974 + if (unlikely(((int64_t)T0 == INT64_MIN && (int64_t)T1 == (int64_t)-1LL) ||
975 975 (int64_t)T1 == 0)) {
976   - T0 = (int64_t)((-1ULL) * ((uint64_t)T0 >> 63));
  976 + T0 = (int64_t)(UINT64_MAX * ((uint64_t)T0 >> 63));
977 977 } else {
978 978 T0 = (int64_t)T0 / (int64_t)T1;
979 979 }
... ... @@ -2006,7 +2006,7 @@ void OPPROTO op_check_reservation (void)
2006 2006 void OPPROTO op_check_reservation_64 (void)
2007 2007 {
2008 2008 if ((uint64_t)env->reserve == (uint64_t)(T0 & ~0x00000003))
2009   - env->reserve = -1;
  2009 + env->reserve = (target_ulong)-1ULL;
2010 2010 RETURN();
2011 2011 }
2012 2012 #endif
... ... @@ -2344,7 +2344,7 @@ void OPPROTO op_POWER_sleq (void)
2344 2344  
2345 2345 void OPPROTO op_POWER_sllq (void)
2346 2346 {
2347   - uint32_t msk = -1;
  2347 + uint32_t msk = UINT32_MAX;
2348 2348  
2349 2349 msk = msk << (T1 & 0x1FUL);
2350 2350 if (T1 & 0x20UL)
... ... @@ -2357,7 +2357,7 @@ void OPPROTO op_POWER_sllq (void)
2357 2357  
2358 2358 void OPPROTO op_POWER_slq (void)
2359 2359 {
2360   - uint32_t msk = -1, tmp;
  2360 + uint32_t msk = UINT32_MAX, tmp;
2361 2361  
2362 2362 msk = msk << (T1 & 0x1FUL);
2363 2363 if (T1 & 0x20UL)
... ... @@ -2373,7 +2373,7 @@ void OPPROTO op_POWER_sraq (void)
2373 2373 {
2374 2374 env->spr[SPR_MQ] = rotl32(T0, 32 - (T1 & 0x1FUL));
2375 2375 if (T1 & 0x20UL)
2376   - T0 = -1L;
  2376 + T0 = UINT32_MAX;
2377 2377 else
2378 2378 T0 = (int32_t)T0 >> T1;
2379 2379 RETURN();
... ... @@ -2529,7 +2529,7 @@ void OPPROTO op_405_check_satu (void)
2529 2529 {
2530 2530 if (unlikely(T0 < T2)) {
2531 2531 /* Saturate result */
2532   - T0 = -1;
  2532 + T0 = UINT32_MAX;
2533 2533 }
2534 2534 RETURN();
2535 2535 }
... ... @@ -2602,7 +2602,7 @@ void OPPROTO op_4xx_tlbsx_check (void)
2602 2602 int tmp;
2603 2603  
2604 2604 tmp = xer_so;
2605   - if (T0 != -1)
  2605 + if ((int)T0 != -1)
2606 2606 tmp |= 0x02;
2607 2607 env->crf[0] = tmp;
2608 2608 RETURN();
... ...
target-ppc/op_helper.c
  View file @6f2d897
... ... @@ -175,29 +175,29 @@ void do_addmeo_64 (void)
175 175  
176 176 void do_divwo (void)
177 177 {
178   - if (likely(!(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) ||
  178 + if (likely(!(((int32_t)T0 == INT32_MIN && (int32_t)T1 == (int32_t)-1) ||
179 179 (int32_t)T1 == 0))) {
180 180 xer_ov = 0;
181 181 T0 = (int32_t)T0 / (int32_t)T1;
182 182 } else {
183 183 xer_ov = 1;
184   - xer_so = 1;
185   - T0 = (-1) * ((uint32_t)T0 >> 31);
  184 + T0 = UINT32_MAX * ((uint32_t)T0 >> 31);
186 185 }
  186 + xer_so |= xer_ov;
187 187 }
188 188  
189 189 #if defined(TARGET_PPC64)
190 190 void do_divdo (void)
191 191 {
192   - if (likely(!(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1ULL) ||
  192 + if (likely(!(((int64_t)T0 == INT64_MIN && (int64_t)T1 == (int64_t)-1LL) ||
193 193 (int64_t)T1 == 0))) {
194 194 xer_ov = 0;
195 195 T0 = (int64_t)T0 / (int64_t)T1;
196 196 } else {
197 197 xer_ov = 1;
198   - xer_so = 1;
199   - T0 = (-1ULL) * ((uint64_t)T0 >> 63);
  198 + T0 = UINT64_MAX * ((uint64_t)T0 >> 63);
200 199 }
  200 + xer_so |= xer_ov;
201 201 }
202 202 #endif
203 203  
... ... @@ -247,14 +247,14 @@ void do_mulldo (void)
247 247 uint64_t tl;
248 248  
249 249 muls64(&tl, &th, T0, T1);
  250 + T0 = (int64_t)tl;
250 251 /* If th != 0 && th != -1, then we had an overflow */
251   - if (likely((th + 1) <= 1)) {
  252 + if (likely((uint64_t)(th + 1) <= 1)) {
252 253 xer_ov = 0;
253 254 } else {
254 255 xer_ov = 1;
255   - xer_so = 1;
256 256 }
257   - T0 = (int64_t)tl;
  257 + xer_so |= xer_ov;
258 258 }
259 259 #endif
260 260  
... ... @@ -392,7 +392,7 @@ void do_sraw (void)
392 392 xer_ca = 0;
393 393 }
394 394 } else {
395   - ret = (-1) * ((uint32_t)T0 >> 31);
  395 + ret = UINT32_MAX * ((uint32_t)T0 >> 31);
396 396 if (likely(ret >= 0 || ((uint32_t)T0 & ~0x80000000UL) == 0)) {
397 397 xer_ca = 0;
398 398 } else {
... ... @@ -420,7 +420,7 @@ void do_srad (void)
420 420 xer_ca = 0;
421 421 }
422 422 } else {
423   - ret = (-1) * ((uint64_t)T0 >> 63);
  423 + ret = UINT64_MAX * ((uint64_t)T0 >> 63);
424 424 if (likely(ret >= 0 || ((uint64_t)T0 & ~0x8000000000000000ULL) == 0)) {
425 425 xer_ca = 0;
426 426 } else {
... ... @@ -609,7 +609,7 @@ static always_inline void fload_invalid_op_excp (int op)
609 609 env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI));
610 610 if (ve == 0) {
611 611 /* Set the result to quiet NaN */
612   - FT0 = (uint64_t)-1;
  612 + FT0 = UINT64_MAX;
613 613 env->fpscr &= ~(0xF << FPSCR_FPCC);
614 614 env->fpscr |= 0x11 << FPSCR_FPCC;
615 615 }
... ... @@ -620,7 +620,7 @@ static always_inline void fload_invalid_op_excp (int op)
620 620 env->fpscr &= ~((1 << FPSCR_FR) | (1 << FPSCR_FI));
621 621 if (ve == 0) {
622 622 /* Set the result to quiet NaN */
623   - FT0 = (uint64_t)-1;
  623 + FT0 = UINT64_MAX;
624 624 env->fpscr &= ~(0xF << FPSCR_FPCC);
625 625 env->fpscr |= 0x11 << FPSCR_FPCC;
626 626 }
... ... @@ -1555,8 +1555,9 @@ void do_POWER_div (void)
1555 1555 {
1556 1556 uint64_t tmp;
1557 1557  
1558   - if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
1559   - T0 = (long)((-1) * (T0 >> 31));
  1558 + if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == (int32_t)-1) ||
  1559 + (int32_t)T1 == 0) {
  1560 + T0 = UINT32_MAX * ((uint32_t)T0 >> 31);
1560 1561 env->spr[SPR_MQ] = 0;
1561 1562 } else {
1562 1563 tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
... ... @@ -1569,29 +1570,30 @@ void do_POWER_divo (void)
1569 1570 {
1570 1571 int64_t tmp;
1571 1572  
1572   - if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
1573   - T0 = (long)((-1) * (T0 >> 31));
  1573 + if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == (int32_t)-1) ||
  1574 + (int32_t)T1 == 0) {
  1575 + T0 = UINT32_MAX * ((uint32_t)T0 >> 31);
1574 1576 env->spr[SPR_MQ] = 0;
1575 1577 xer_ov = 1;
1576   - xer_so = 1;
1577 1578 } else {
1578 1579 tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
1579 1580 env->spr[SPR_MQ] = tmp % T1;
1580 1581 tmp /= (int32_t)T1;
1581 1582 if (tmp > (int64_t)INT32_MAX || tmp < (int64_t)INT32_MIN) {
1582 1583 xer_ov = 1;
1583   - xer_so = 1;
1584 1584 } else {
1585 1585 xer_ov = 0;
1586 1586 }
1587 1587 T0 = tmp;
1588 1588 }
  1589 + xer_so |= xer_ov;
1589 1590 }
1590 1591  
1591 1592 void do_POWER_divs (void)
1592 1593 {
1593   - if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
1594   - T0 = (long)((-1) * (T0 >> 31));
  1594 + if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == (int32_t)-1) ||
  1595 + (int32_t)T1 == 0) {
  1596 + T0 = UINT32_MAX * ((uint32_t)T0 >> 31);
1595 1597 env->spr[SPR_MQ] = 0;
1596 1598 } else {
1597 1599 env->spr[SPR_MQ] = T0 % T1;
... ... @@ -1601,16 +1603,17 @@ void do_POWER_divs (void)
1601 1603  
1602 1604 void do_POWER_divso (void)
1603 1605 {
1604   - if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) {
1605   - T0 = (long)((-1) * (T0 >> 31));
  1606 + if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == (int32_t)-1) ||
  1607 + (int32_t)T1 == 0) {
  1608 + T0 = UINT32_MAX * ((uint32_t)T0 >> 31);
1606 1609 env->spr[SPR_MQ] = 0;
1607 1610 xer_ov = 1;
1608   - xer_so = 1;
1609 1611 } else {
1610 1612 T0 = (int32_t)T0 / (int32_t)T1;
1611 1613 env->spr[SPR_MQ] = (int32_t)T0 % (int32_t)T1;
1612 1614 xer_ov = 0;
1613 1615 }
  1616 + xer_so |= xer_ov;
1614 1617 }
1615 1618  
1616 1619 void do_POWER_dozo (void)
... ... @@ -1636,10 +1639,10 @@ void do_POWER_maskg (void)
1636 1639 uint32_t ret;
1637 1640  
1638 1641 if ((uint32_t)T0 == (uint32_t)(T1 + 1)) {
1639   - ret = -1;
  1642 + ret = UINT32_MAX;
1640 1643 } else {
1641   - ret = (((uint32_t)(-1)) >> ((uint32_t)T0)) ^
1642   - (((uint32_t)(-1) >> ((uint32_t)T1)) >> 1);
  1644 + ret = (UINT32_MAX >> ((uint32_t)T0)) ^
  1645 + ((UINT32_MAX >> ((uint32_t)T1)) >> 1);
1643 1646 if ((uint32_t)T0 > (uint32_t)T1)
1644 1647 ret = ~ret;
1645 1648 }
... ... @@ -1874,7 +1877,7 @@ void do_brinc (void)
1874 1877 {
1875 1878 uint32_t a, b, d, mask;
1876 1879  
1877   - mask = (uint32_t)(-1UL) >> MASKBITS;
  1880 + mask = UINT32_MAX >> MASKBITS;
1878 1881 b = T1_64 & mask;
1879 1882 a = T0_64 & mask;
1880 1883 d = word_reverse(1 + word_reverse(a | ~mask));
... ...
target-ppc/translate.c
  View file @6f2d897
... ... @@ -404,15 +404,15 @@ static always_inline target_ulong MASK (uint32_t start, uint32_t end)
404 404  
405 405 #if defined(TARGET_PPC64)
406 406 if (likely(start == 0)) {
407   - ret = (uint64_t)(-1ULL) << (63 - end);
  407 + ret = UINT64_MAX << (63 - end);
408 408 } else if (likely(end == 63)) {
409   - ret = (uint64_t)(-1ULL) >> start;
  409 + ret = UINT64_MAX >> start;
410 410 }
411 411 #else
412 412 if (likely(start == 0)) {
413   - ret = (uint32_t)(-1ULL) << (31 - end);
  413 + ret = UINT32_MAX << (31 - end);
414 414 } else if (likely(end == 31)) {
415   - ret = (uint32_t)(-1ULL) >> start;
  415 + ret = UINT32_MAX >> start;
416 416 }
417 417 #endif
418 418 else {
... ... @@ -3517,7 +3517,7 @@ GEN_HANDLER(mfmsr, 0x1F, 0x13, 0x02, 0x001FF801, PPC_MISC)
3517 3517 }
3518 3518  
3519 3519 #if 1
3520   -#define SPR_NOACCESS ((void *)(-1))
  3520 +#define SPR_NOACCESS ((void *)(-1UL))
3521 3521 #else
3522 3522 static void spr_noaccess (void *opaque, int sprn)
3523 3523 {
... ...