gwj / at91sam9263 · Commits

Commit 6cadb320c70cdcbfa38afe9ac864eb77ae6012a3

Authored by bellard
1 parent 856074ec

rtl8139 fixes (Igor Kovalenko) 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2035 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 1 changed file with 837 additions and 442 deletions
hw/rtl8139.c
  View file @6cadb32
@@ -23,15 +23,28 @@ @@ -23,15 +23,28 @@
23 23
24 * Modifications: 24 * Modifications:
25 * 2006-Jan-28 Mark Malakanov : TSAD and CSCR implementation (for Windows driver) 25 * 2006-Jan-28 Mark Malakanov : TSAD and CSCR implementation (for Windows driver)
26 - * 26 + *
  27 + * 2006-Apr-28 Juergen Lock : EEPROM emulation changes for FreeBSD driver
  28 + * HW revision ID changes for FreeBSD driver
  29 + *
  30 + * 2006-Jul-01 Igor Kovalenko : Implemented loopback mode for FreeBSD driver
  31 + * Corrected packet transfer reassembly routine for 8139C+ mode
  32 + * Rearranged debugging print statements
  33 + * Implemented PCI timer interrupt (disabled by default)
  34 + * Implemented Tally Counters, increased VM load/save version
  35 + * Implemented IP/TCP/UDP checksum task offloading
27 */ 36 */
28 37
29 #include "vl.h" 38 #include "vl.h"
30 39
  40 +/* XXX: such dependency must be suppressed */
  41 +#include <slirp/slirp.h>
31 42
32 /* debug RTL8139 card */ 43 /* debug RTL8139 card */
33 //#define DEBUG_RTL8139 1 44 //#define DEBUG_RTL8139 1
34 45
  46 +#define PCI_FREQUENCY 33000000L
  47 +
35 /* debug RTL8139 card C+ mode only */ 48 /* debug RTL8139 card C+ mode only */
36 //#define DEBUG_RTL8139CP 1 49 //#define DEBUG_RTL8139CP 1
37 50
@@ -39,6 +52,8 @@ @@ -39,6 +52,8 @@
39 ignored by most drivers, disabled by default */ 52 ignored by most drivers, disabled by default */
40 //#define RTL8139_CALCULATE_RXCRC 1 53 //#define RTL8139_CALCULATE_RXCRC 1
41 54
  55 +/* Uncomment to enable on-board timer interrupts */
  56 +//#define RTL8139_ONBOARD_TIMER 1
42 57
43 #if defined(RTL8139_CALCULATE_RXCRC) 58 #if defined(RTL8139_CALCULATE_RXCRC)
44 /* For crc32 */ 59 /* For crc32 */
@@ -52,12 +67,19 @@ @@ -52,12 +67,19 @@
52 #define MOD2(input, size) \ 67 #define MOD2(input, size) \
53 ( ( input ) & ( size - 1 ) ) 68 ( ( input ) & ( size - 1 ) )
54 69
  70 +#if defined (DEBUG_RTL8139)
  71 +# define DEBUG_PRINT(x) do { printf x ; } while (0)
  72 +#else
  73 +# define DEBUG_PRINT(x)
  74 +#endif
  75 +
55 /* Symbolic offsets to registers. */ 76 /* Symbolic offsets to registers. */
56 enum RTL8139_registers { 77 enum RTL8139_registers {
57 MAC0 = 0, /* Ethernet hardware address. */ 78 MAC0 = 0, /* Ethernet hardware address. */
58 MAR0 = 8, /* Multicast filter. */ 79 MAR0 = 8, /* Multicast filter. */
59 - TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */  
60 - TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */ 80 + TxStatus0 = 0x10,/* Transmit status (Four 32bit registers). C mode only */
  81 + /* Dump Tally Conter control register(64bit). C+ mode only */
  82 + TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */
61 RxBuf = 0x30, 83 RxBuf = 0x30,
62 ChipCmd = 0x37, 84 ChipCmd = 0x37,
63 RxBufPtr = 0x38, 85 RxBufPtr = 0x38,
@@ -115,8 +137,10 @@ enum ChipCmdBits { @@ -115,8 +137,10 @@ enum ChipCmdBits {
115 137
116 /* C+ mode */ 138 /* C+ mode */
117 enum CplusCmdBits { 139 enum CplusCmdBits {
118 - CPlusRxEnb = 0x0002,  
119 - CPlusTxEnb = 0x0001, 140 + CPlusRxVLAN = 0x0040, /* enable receive VLAN detagging */
  141 + CPlusRxChkSum = 0x0020, /* enable receive checksum offloading */
  142 + CPlusRxEnb = 0x0002,
  143 + CPlusTxEnb = 0x0001,
120 }; 144 };
121 145
122 /* Interrupt register bits, using my own meaningful names. */ 146 /* Interrupt register bits, using my own meaningful names. */
@@ -315,6 +339,11 @@ enum chip_flags { @@ -315,6 +339,11 @@ enum chip_flags {
315 (b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22) 339 (b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
316 #define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1) 340 #define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1)
317 341
  342 +#define RTL8139_PCI_REVID_8139 0x10
  343 +#define RTL8139_PCI_REVID_8139CPLUS 0x20
  344 +
  345 +#define RTL8139_PCI_REVID RTL8139_PCI_REVID_8139CPLUS
  346 +
318 /* Size is 64 * 16bit words */ 347 /* Size is 64 * 16bit words */
319 #define EEPROM_9346_ADDR_BITS 6 348 #define EEPROM_9346_ADDR_BITS 6
320 #define EEPROM_9346_SIZE (1 << EEPROM_9346_ADDR_BITS) 349 #define EEPROM_9346_SIZE (1 << EEPROM_9346_ADDR_BITS)
@@ -356,11 +385,41 @@ typedef struct EEprom9346 @@ -356,11 +385,41 @@ typedef struct EEprom9346
356 uint8_t eedo; 385 uint8_t eedo;
357 } EEprom9346; 386 } EEprom9346;
358 387
  388 +typedef struct RTL8139TallyCounters
  389 +{
  390 + /* Tally counters */
  391 + uint64_t TxOk;
  392 + uint64_t RxOk;
  393 + uint64_t TxERR;
  394 + uint32_t RxERR;
  395 + uint16_t MissPkt;
  396 + uint16_t FAE;
  397 + uint32_t Tx1Col;
  398 + uint32_t TxMCol;
  399 + uint64_t RxOkPhy;
  400 + uint64_t RxOkBrd;
  401 + uint32_t RxOkMul;
  402 + uint16_t TxAbt;
  403 + uint16_t TxUndrn;
  404 +} RTL8139TallyCounters;
  405 +
  406 +/* Clears all tally counters */
  407 +static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters);
  408 +
  409 +/* Writes tally counters to specified physical memory address */
  410 +static void RTL8139TallyCounters_physical_memory_write(target_phys_addr_t tc_addr, RTL8139TallyCounters* counters);
  411 +
  412 +/* Loads values of tally counters from VM state file */
  413 +static void RTL8139TallyCounters_load(QEMUFile* f, RTL8139TallyCounters *tally_counters);
  414 +
  415 +/* Saves values of tally counters to VM state file */
  416 +static void RTL8139TallyCounters_save(QEMUFile* f, RTL8139TallyCounters *tally_counters);
  417 +
359 typedef struct RTL8139State { 418 typedef struct RTL8139State {
360 uint8_t phys[8]; /* mac address */ 419 uint8_t phys[8]; /* mac address */
361 uint8_t mult[8]; /* multicast mask array */ 420 uint8_t mult[8]; /* multicast mask array */
362 421
363 - uint32_t TxStatus[4]; /* TxStatus0 */ 422 + uint32_t TxStatus[4]; /* TxStatus0 in C mode*/ /* also DTCCR[0] and DTCCR[1] in C+ mode */
364 uint32_t TxAddr[4]; /* TxAddr0 */ 423 uint32_t TxAddr[4]; /* TxAddr0 */
365 uint32_t RxBuf; /* Receive buffer */ 424 uint32_t RxBuf; /* Receive buffer */
366 uint32_t RxBufferSize;/* internal variable, receive ring buffer size in C mode */ 425 uint32_t RxBufferSize;/* internal variable, receive ring buffer size in C mode */
@@ -414,14 +473,27 @@ typedef struct RTL8139State { @@ -414,14 +473,27 @@ typedef struct RTL8139State {
414 uint32_t RxRingAddrHI; 473 uint32_t RxRingAddrHI;
415 474
416 EEprom9346 eeprom; 475 EEprom9346 eeprom;
417 - 476 +
  477 + uint32_t TCTR;
  478 + uint32_t TimerInt;
  479 + int64_t TCTR_base;
  480 +
  481 + /* Tally counters */
  482 + RTL8139TallyCounters tally_counters;
  483 +
  484 + /* Non-persistent data */
  485 + uint8_t *cplus_txbuffer;
  486 + int cplus_txbuffer_len;
  487 + int cplus_txbuffer_offset;
  488 +
  489 + /* PCI interrupt timer */
  490 + QEMUTimer *timer;
  491 +
418 } RTL8139State; 492 } RTL8139State;
419 493
420 void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command) 494 void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command)
421 { 495 {
422 -#if defined(DEBUG_RTL8139)  
423 - printf("RTL8139: eeprom command 0x%02x\n", command);  
424 -#endif 496 + DEBUG_PRINT(("RTL8139: eeprom command 0x%02x\n", command));
425 497
426 switch (command & Chip9346_op_mask) 498 switch (command & Chip9346_op_mask)
427 { 499 {
@@ -432,10 +504,8 @@ void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command) @@ -432,10 +504,8 @@ void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command)
432 eeprom->eedo = 0; 504 eeprom->eedo = 0;
433 eeprom->tick = 0; 505 eeprom->tick = 0;
434 eeprom->mode = Chip9346_data_read; 506 eeprom->mode = Chip9346_data_read;
435 -#if defined(DEBUG_RTL8139)  
436 - printf("RTL8139: eeprom read from address 0x%02x data=0x%04x\n",  
437 - eeprom->address, eeprom->output);  
438 -#endif 507 + DEBUG_PRINT(("RTL8139: eeprom read from address 0x%02x data=0x%04x\n",
  508 + eeprom->address, eeprom->output));
439 } 509 }
440 break; 510 break;
441 511
@@ -445,10 +515,8 @@ void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command) @@ -445,10 +515,8 @@ void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command)
445 eeprom->input = 0; 515 eeprom->input = 0;
446 eeprom->tick = 0; 516 eeprom->tick = 0;
447 eeprom->mode = Chip9346_none; /* Chip9346_data_write */ 517 eeprom->mode = Chip9346_none; /* Chip9346_data_write */
448 -#if defined(DEBUG_RTL8139)  
449 - printf("RTL8139: eeprom begin write to address 0x%02x\n",  
450 - eeprom->address);  
451 -#endif 518 + DEBUG_PRINT(("RTL8139: eeprom begin write to address 0x%02x\n",
  519 + eeprom->address));
452 } 520 }
453 break; 521 break;
454 default: 522 default:
@@ -456,19 +524,13 @@ void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command) @@ -456,19 +524,13 @@ void prom9346_decode_command(EEprom9346 *eeprom, uint8_t command)
456 switch (command & Chip9346_op_ext_mask) 524 switch (command & Chip9346_op_ext_mask)
457 { 525 {
458 case Chip9346_op_write_enable: 526 case Chip9346_op_write_enable:
459 -#if defined(DEBUG_RTL8139)  
460 - printf("RTL8139: eeprom write enabled\n");  
461 -#endif 527 + DEBUG_PRINT(("RTL8139: eeprom write enabled\n"));
462 break; 528 break;
463 case Chip9346_op_write_all: 529 case Chip9346_op_write_all:
464 -#if defined(DEBUG_RTL8139)  
465 - printf("RTL8139: eeprom begin write all\n");  
466 -#endif 530 + DEBUG_PRINT(("RTL8139: eeprom begin write all\n"));
467 break; 531 break;
468 case Chip9346_op_write_disable: 532 case Chip9346_op_write_disable:
469 -#if defined(DEBUG_RTL8139)  
470 - printf("RTL8139: eeprom write disabled\n");  
471 -#endif 533 + DEBUG_PRINT(("RTL8139: eeprom write disabled\n"));
472 break; 534 break;
473 } 535 }
474 break; 536 break;
@@ -481,9 +543,7 @@ void prom9346_shift_clock(EEprom9346 *eeprom) @@ -481,9 +543,7 @@ void prom9346_shift_clock(EEprom9346 *eeprom)
481 543
482 ++ eeprom->tick; 544 ++ eeprom->tick;
483 545
484 -#if defined(DEBUG_RTL8139)  
485 - printf("eeprom: tick %d eedi=%d eedo=%d\n", eeprom->tick, eeprom->eedi, eeprom->eedo);  
486 -#endif 546 + DEBUG_PRINT(("eeprom: tick %d eedi=%d eedo=%d\n", eeprom->tick, eeprom->eedi, eeprom->eedo));
487 547
488 switch (eeprom->mode) 548 switch (eeprom->mode)
489 { 549 {
@@ -493,9 +553,7 @@ void prom9346_shift_clock(EEprom9346 *eeprom) @@ -493,9 +553,7 @@ void prom9346_shift_clock(EEprom9346 *eeprom)
493 eeprom->mode = Chip9346_read_command; 553 eeprom->mode = Chip9346_read_command;
494 eeprom->tick = 0; 554 eeprom->tick = 0;
495 eeprom->input = 0; 555 eeprom->input = 0;
496 -#if defined(DEBUG_RTL8139)  
497 - printf("eeprom: +++ synchronized, begin command read\n");  
498 -#endif 556 + DEBUG_PRINT(("eeprom: +++ synchronized, begin command read\n"));
499 } 557 }
500 break; 558 break;
501 559
@@ -512,14 +570,24 @@ void prom9346_shift_clock(EEprom9346 *eeprom) @@ -512,14 +570,24 @@ void prom9346_shift_clock(EEprom9346 *eeprom)
512 eeprom->output <<= 1; 570 eeprom->output <<= 1;
513 if (eeprom->tick == 16) 571 if (eeprom->tick == 16)
514 { 572 {
  573 +#if 1
  574 + // the FreeBSD drivers (rl and re) don't explicitly toggle
  575 + // CS between reads (or does setting Cfg9346 to 0 count too?),
  576 + // so we need to enter wait-for-command state here
  577 + eeprom->mode = Chip9346_enter_command_mode;
  578 + eeprom->input = 0;
  579 + eeprom->tick = 0;
  580 +
  581 + DEBUG_PRINT(("eeprom: +++ end of read, awaiting next command\n"));
  582 +#else
  583 + // original behaviour
515 ++eeprom->address; 584 ++eeprom->address;
516 eeprom->address &= EEPROM_9346_ADDR_MASK; 585 eeprom->address &= EEPROM_9346_ADDR_MASK;
517 eeprom->output = eeprom->contents[eeprom->address]; 586 eeprom->output = eeprom->contents[eeprom->address];
518 eeprom->tick = 0; 587 eeprom->tick = 0;
519 588
520 -#if defined(DEBUG_RTL8139)  
521 - printf("eeprom: +++ read next address 0x%02x data=0x%04x\n",  
522 - eeprom->address, eeprom->output); 589 + DEBUG_PRINT(("eeprom: +++ read next address 0x%02x data=0x%04x\n",
  590 + eeprom->address, eeprom->output));
523 #endif 591 #endif
524 } 592 }
525 break; 593 break;
@@ -528,10 +596,9 @@ void prom9346_shift_clock(EEprom9346 *eeprom) @@ -528,10 +596,9 @@ void prom9346_shift_clock(EEprom9346 *eeprom)
528 eeprom->input = (eeprom->input << 1) | (bit & 1); 596 eeprom->input = (eeprom->input << 1) | (bit & 1);
529 if (eeprom->tick == 16) 597 if (eeprom->tick == 16)
530 { 598 {
531 -#if defined(DEBUG_RTL8139)  
532 - printf("RTL8139: eeprom write to address 0x%02x data=0x%04x\n",  
533 - eeprom->address, eeprom->input);  
534 -#endif 599 + DEBUG_PRINT(("RTL8139: eeprom write to address 0x%02x data=0x%04x\n",
  600 + eeprom->address, eeprom->input));
  601 +
535 eeprom->contents[eeprom->address] = eeprom->input; 602 eeprom->contents[eeprom->address] = eeprom->input;
536 eeprom->mode = Chip9346_none; /* waiting for next command after CS cycle */ 603 eeprom->mode = Chip9346_none; /* waiting for next command after CS cycle */
537 eeprom->tick = 0; 604 eeprom->tick = 0;
@@ -548,10 +615,9 @@ void prom9346_shift_clock(EEprom9346 *eeprom) @@ -548,10 +615,9 @@ void prom9346_shift_clock(EEprom9346 *eeprom)
548 { 615 {
549 eeprom->contents[i] = eeprom->input; 616 eeprom->contents[i] = eeprom->input;
550 } 617 }
551 -#if defined(DEBUG_RTL8139)  
552 - printf("RTL8139: eeprom filled with data=0x%04x\n",  
553 - eeprom->input);  
554 -#endif 618 + DEBUG_PRINT(("RTL8139: eeprom filled with data=0x%04x\n",
  619 + eeprom->input));
  620 +
555 eeprom->mode = Chip9346_enter_command_mode; 621 eeprom->mode = Chip9346_enter_command_mode;
556 eeprom->tick = 0; 622 eeprom->tick = 0;
557 eeprom->input = 0; 623 eeprom->input = 0;
@@ -582,9 +648,8 @@ void prom9346_set_wire(RTL8139State *s, int eecs, int eesk, int eedi) @@ -582,9 +648,8 @@ void prom9346_set_wire(RTL8139State *s, int eecs, int eesk, int eedi)
582 eeprom->eesk = eesk; 648 eeprom->eesk = eesk;
583 eeprom->eedi = eedi; 649 eeprom->eedi = eedi;
584 650
585 -#if defined(DEBUG_RTL8139)  
586 - printf("eeprom: +++ wires CS=%d SK=%d DI=%d DO=%d\n", eeprom->eecs, eeprom->eesk, eeprom->eedi, eeprom->eedo);  
587 -#endif 651 + DEBUG_PRINT(("eeprom: +++ wires CS=%d SK=%d DI=%d DO=%d\n",
  652 + eeprom->eecs, eeprom->eesk, eeprom->eedi, eeprom->eedo));
588 653
589 if (!old_eecs && eecs) 654 if (!old_eecs && eecs)
590 { 655 {
@@ -594,17 +659,12 @@ void prom9346_set_wire(RTL8139State *s, int eecs, int eesk, int eedi) @@ -594,17 +659,12 @@ void prom9346_set_wire(RTL8139State *s, int eecs, int eesk, int eedi)
594 eeprom->output = 0; 659 eeprom->output = 0;
595 eeprom->mode = Chip9346_enter_command_mode; 660 eeprom->mode = Chip9346_enter_command_mode;
596 661
597 -#if defined(DEBUG_RTL8139)  
598 - printf("=== eeprom: begin access, enter command mode\n");  
599 -#endif  
600 - 662 + DEBUG_PRINT(("=== eeprom: begin access, enter command mode\n"));
601 } 663 }
602 664
603 if (!eecs) 665 if (!eecs)
604 { 666 {
605 -#if defined(DEBUG_RTL8139)  
606 - printf("=== eeprom: end access\n");  
607 -#endif 667 + DEBUG_PRINT(("=== eeprom: end access\n"));
608 return; 668 return;
609 } 669 }
610 670
@@ -619,10 +679,10 @@ static void rtl8139_update_irq(RTL8139State *s) @@ -619,10 +679,10 @@ static void rtl8139_update_irq(RTL8139State *s)
619 { 679 {
620 int isr; 680 int isr;
621 isr = (s->IntrStatus & s->IntrMask) & 0xffff; 681 isr = (s->IntrStatus & s->IntrMask) & 0xffff;
622 -#if defined(DEBUG_RTL8139)  
623 - printf("RTL8139: Set IRQ line %d to %d (%04x %04x)\n",  
624 - s->irq, isr ? 1 : 0, s->IntrStatus, s->IntrMask);  
625 -#endif 682 +
  683 + DEBUG_PRINT(("RTL8139: Set IRQ line %d to %d (%04x %04x)\n",
  684 + s->irq, isr ? 1 : 0, s->IntrStatus, s->IntrMask));
  685 +
626 if (s->irq == 16) { 686 if (s->irq == 16) {
627 /* PCI irq */ 687 /* PCI irq */
628 pci_set_irq(s->pci_dev, 0, (isr != 0)); 688 pci_set_irq(s->pci_dev, 0, (isr != 0));
@@ -691,9 +751,7 @@ static void rtl8139_write_buffer(RTL8139State *s, const void *buf, int size) @@ -691,9 +751,7 @@ static void rtl8139_write_buffer(RTL8139State *s, const void *buf, int size)
691 /* write packet data */ 751 /* write packet data */
692 if (wrapped && s->RxBufferSize < 65536 && !rtl8139_RxWrap(s)) 752 if (wrapped && s->RxBufferSize < 65536 && !rtl8139_RxWrap(s))
693 { 753 {
694 - #if defined(DEBUG_RTL8139)  
695 - printf(">>> RTL8139: rx packet wrapped in buffer at %d\n", size-wrapped);  
696 - #endif 754 + DEBUG_PRINT((">>> RTL8139: rx packet wrapped in buffer at %d\n", size-wrapped));
697 755
698 if (size > wrapped) 756 if (size > wrapped)
699 { 757 {
@@ -751,7 +809,7 @@ static int rtl8139_can_receive(void *opaque) @@ -751,7 +809,7 @@ static int rtl8139_can_receive(void *opaque)
751 } 809 }
752 } 810 }
753 811
754 -static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) 812 +static void rtl8139_do_receive(void *opaque, const uint8_t *buf, int size, int do_interrupt)
755 { 813 {
756 RTL8139State *s = opaque; 814 RTL8139State *s = opaque;
757 815
@@ -761,16 +819,12 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -761,16 +819,12 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
761 static const uint8_t broadcast_macaddr[6] = 819 static const uint8_t broadcast_macaddr[6] =
762 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; 820 { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
763 821
764 -#if defined(DEBUG_RTL8139)  
765 - printf(">>> RTL8139: received len=%d\n", size);  
766 -#endif 822 + DEBUG_PRINT((">>> RTL8139: received len=%d\n", size));
767 823
768 /* test if board clock is stopped */ 824 /* test if board clock is stopped */
769 if (!s->clock_enabled) 825 if (!s->clock_enabled)
770 { 826 {
771 -#if defined(DEBUG_RTL8139)  
772 - printf("RTL8139: stopped ==========================\n");  
773 -#endif 827 + DEBUG_PRINT(("RTL8139: stopped ==========================\n"));
774 return; 828 return;
775 } 829 }
776 830
@@ -778,42 +832,44 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -778,42 +832,44 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
778 832
779 if (!rtl8139_receiver_enabled(s)) 833 if (!rtl8139_receiver_enabled(s))
780 { 834 {
781 -#if defined(DEBUG_RTL8139)  
782 - printf("RTL8139: receiver disabled ================\n");  
783 -#endif 835 + DEBUG_PRINT(("RTL8139: receiver disabled ================\n"));
784 return; 836 return;
785 } 837 }
786 838
787 /* XXX: check this */ 839 /* XXX: check this */
788 if (s->RxConfig & AcceptAllPhys) { 840 if (s->RxConfig & AcceptAllPhys) {
789 /* promiscuous: receive all */ 841 /* promiscuous: receive all */
790 -#if defined(DEBUG_RTL8139)  
791 - printf(">>> RTL8139: packet received in promiscuous mode\n");  
792 -#endif 842 + DEBUG_PRINT((">>> RTL8139: packet received in promiscuous mode\n"));
793 843
794 } else { 844 } else {
795 if (!memcmp(buf, broadcast_macaddr, 6)) { 845 if (!memcmp(buf, broadcast_macaddr, 6)) {
796 /* broadcast address */ 846 /* broadcast address */
797 if (!(s->RxConfig & AcceptBroadcast)) 847 if (!(s->RxConfig & AcceptBroadcast))
798 { 848 {
799 -#if defined(DEBUG_RTL8139)  
800 - printf(">>> RTL8139: broadcast packet rejected\n");  
801 -#endif 849 + DEBUG_PRINT((">>> RTL8139: broadcast packet rejected\n"));
  850 +
  851 + /* update tally counter */
  852 + ++s->tally_counters.RxERR;
  853 +
802 return; 854 return;
803 } 855 }
804 856
805 packet_header |= RxBroadcast; 857 packet_header |= RxBroadcast;
806 858
807 -#if defined(DEBUG_RTL8139)  
808 - printf(">>> RTL8139: broadcast packet received\n");  
809 -#endif 859 + DEBUG_PRINT((">>> RTL8139: broadcast packet received\n"));
  860 +
  861 + /* update tally counter */
  862 + ++s->tally_counters.RxOkBrd;
  863 +
810 } else if (buf[0] & 0x01) { 864 } else if (buf[0] & 0x01) {
811 /* multicast */ 865 /* multicast */
812 if (!(s->RxConfig & AcceptMulticast)) 866 if (!(s->RxConfig & AcceptMulticast))
813 { 867 {
814 -#if defined(DEBUG_RTL8139)  
815 - printf(">>> RTL8139: multicast packet rejected\n");  
816 -#endif 868 + DEBUG_PRINT((">>> RTL8139: multicast packet rejected\n"));
  869 +
  870 + /* update tally counter */
  871 + ++s->tally_counters.RxERR;
  872 +
817 return; 873 return;
818 } 874 }
819 875
@@ -821,17 +877,21 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -821,17 +877,21 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
821 877
822 if (!(s->mult[mcast_idx >> 3] & (1 << (mcast_idx & 7)))) 878 if (!(s->mult[mcast_idx >> 3] & (1 << (mcast_idx & 7))))
823 { 879 {
824 -#if defined(DEBUG_RTL8139)  
825 - printf(">>> RTL8139: multicast address mismatch\n");  
826 -#endif 880 + DEBUG_PRINT((">>> RTL8139: multicast address mismatch\n"));
  881 +
  882 + /* update tally counter */
  883 + ++s->tally_counters.RxERR;
  884 +
827 return; 885 return;
828 } 886 }
829 887
830 packet_header |= RxMulticast; 888 packet_header |= RxMulticast;
831 889
832 -#if defined(DEBUG_RTL8139)  
833 - printf(">>> RTL8139: multicast packet received\n");  
834 -#endif 890 + DEBUG_PRINT((">>> RTL8139: multicast packet received\n"));
  891 +
  892 + /* update tally counter */
  893 + ++s->tally_counters.RxOkMul;
  894 +
835 } else if (s->phys[0] == buf[0] && 895 } else if (s->phys[0] == buf[0] &&
836 s->phys[1] == buf[1] && 896 s->phys[1] == buf[1] &&
837 s->phys[2] == buf[2] && 897 s->phys[2] == buf[2] &&
@@ -841,23 +901,28 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -841,23 +901,28 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
841 /* match */ 901 /* match */
842 if (!(s->RxConfig & AcceptMyPhys)) 902 if (!(s->RxConfig & AcceptMyPhys))
843 { 903 {
844 -#if defined(DEBUG_RTL8139)  
845 - printf(">>> RTL8139: rejecting physical address matching packet\n");  
846 -#endif 904 + DEBUG_PRINT((">>> RTL8139: rejecting physical address matching packet\n"));
  905 +
  906 + /* update tally counter */
  907 + ++s->tally_counters.RxERR;
  908 +
847 return; 909 return;
848 } 910 }
849 911
850 packet_header |= RxPhysical; 912 packet_header |= RxPhysical;
851 913
852 -#if defined(DEBUG_RTL8139)  
853 - printf(">>> RTL8139: physical address matching packet received\n");  
854 -#endif 914 + DEBUG_PRINT((">>> RTL8139: physical address matching packet received\n"));
  915 +
  916 + /* update tally counter */
  917 + ++s->tally_counters.RxOkPhy;
855 918
856 } else { 919 } else {
857 920
858 -#if defined(DEBUG_RTL8139)  
859 - printf(">>> RTL8139: unknown packet\n");  
860 -#endif 921 + DEBUG_PRINT((">>> RTL8139: unknown packet\n"));
  922 +
  923 + /* update tally counter */
  924 + ++s->tally_counters.RxERR;
  925 +
861 return; 926 return;
862 } 927 }
863 } 928 }
@@ -872,9 +937,7 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -872,9 +937,7 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
872 937
873 if (rtl8139_cp_receiver_enabled(s)) 938 if (rtl8139_cp_receiver_enabled(s))
874 { 939 {
875 -#if defined(DEBUG_RTL8139)  
876 - printf("RTL8139: in C+ Rx mode ================\n");  
877 -#endif 940 + DEBUG_PRINT(("RTL8139: in C+ Rx mode ================\n"));
878 941
879 /* begin C+ receiver mode */ 942 /* begin C+ receiver mode */
880 943
@@ -897,10 +960,8 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -897,10 +960,8 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
897 cplus_rx_ring_desc = rtl8139_addr64(s->RxRingAddrLO, s->RxRingAddrHI); 960 cplus_rx_ring_desc = rtl8139_addr64(s->RxRingAddrLO, s->RxRingAddrHI);
898 cplus_rx_ring_desc += 16 * descriptor; 961 cplus_rx_ring_desc += 16 * descriptor;
899 962
900 -#ifdef DEBUG_RTL8139  
901 - printf("RTL8139: +++ C+ mode reading RX descriptor %d from host memory at %08x %08x = 0x%8lx\n",  
902 - descriptor, s->RxRingAddrHI, s->RxRingAddrLO, cplus_rx_ring_desc);  
903 -#endif 963 + DEBUG_PRINT(("RTL8139: +++ C+ mode reading RX descriptor %d from host memory at %08x %08x = %016" PRIx64 "\n",
  964 + descriptor, s->RxRingAddrHI, s->RxRingAddrLO, (uint64_t)cplus_rx_ring_desc));
904 965
905 uint32_t val, rxdw0,rxdw1,rxbufLO,rxbufHI; 966 uint32_t val, rxdw0,rxdw1,rxbufLO,rxbufHI;
906 967
@@ -913,33 +974,41 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -913,33 +974,41 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
913 cpu_physical_memory_read(cplus_rx_ring_desc+12, (uint8_t *)&val, 4); 974 cpu_physical_memory_read(cplus_rx_ring_desc+12, (uint8_t *)&val, 4);
914 rxbufHI = le32_to_cpu(val); 975 rxbufHI = le32_to_cpu(val);
915 976
916 -#ifdef DEBUG_RTL8139  
917 - printf("RTL8139: +++ C+ mode RX descriptor %d %08x %08x %08x %08x\n", 977 + DEBUG_PRINT(("RTL8139: +++ C+ mode RX descriptor %d %08x %08x %08x %08x\n",
918 descriptor, 978 descriptor,
919 - rxdw0, rxdw1, rxbufLO, rxbufHI);  
920 -#endif 979 + rxdw0, rxdw1, rxbufLO, rxbufHI));
921 980
922 if (!(rxdw0 & CP_RX_OWN)) 981 if (!(rxdw0 & CP_RX_OWN))
923 { 982 {
924 -#if defined(DEBUG_RTL8139)  
925 - printf("RTL8139: C+ Rx mode : descriptor %d is owned by host\n", descriptor);  
926 -#endif 983 + DEBUG_PRINT(("RTL8139: C+ Rx mode : descriptor %d is owned by host\n", descriptor));
  984 +
927 s->IntrStatus |= RxOverflow; 985 s->IntrStatus |= RxOverflow;
928 ++s->RxMissed; 986 ++s->RxMissed;
  987 +
  988 + /* update tally counter */
  989 + ++s->tally_counters.RxERR;
  990 + ++s->tally_counters.MissPkt;
  991 +
929 rtl8139_update_irq(s); 992 rtl8139_update_irq(s);
930 return; 993 return;
931 } 994 }
932 995
933 uint32_t rx_space = rxdw0 & CP_RX_BUFFER_SIZE_MASK; 996 uint32_t rx_space = rxdw0 & CP_RX_BUFFER_SIZE_MASK;
934 997
  998 + /* TODO: scatter the packet over available receive ring descriptors space */
  999 +
935 if (size+4 > rx_space) 1000 if (size+4 > rx_space)
936 { 1001 {
937 -#if defined(DEBUG_RTL8139)  
938 - printf("RTL8139: C+ Rx mode : descriptor %d size %d received %d + 4\n",  
939 - descriptor, rx_space, size);  
940 -#endif 1002 + DEBUG_PRINT(("RTL8139: C+ Rx mode : descriptor %d size %d received %d + 4\n",
  1003 + descriptor, rx_space, size));
  1004 +
941 s->IntrStatus |= RxOverflow; 1005 s->IntrStatus |= RxOverflow;
942 ++s->RxMissed; 1006 ++s->RxMissed;
  1007 +
  1008 + /* update tally counter */
  1009 + ++s->tally_counters.RxERR;
  1010 + ++s->tally_counters.MissPkt;
  1011 +
943 rtl8139_update_irq(s); 1012 rtl8139_update_irq(s);
944 return; 1013 return;
945 } 1014 }
@@ -949,6 +1018,11 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -949,6 +1018,11 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
949 /* receive/copy to target memory */ 1018 /* receive/copy to target memory */
950 cpu_physical_memory_write( rx_addr, buf, size ); 1019 cpu_physical_memory_write( rx_addr, buf, size );
951 1020
  1021 + if (s->CpCmd & CPlusRxChkSum)
  1022 + {
  1023 + /* do some packet checksumming */
  1024 + }
  1025 +
952 /* write checksum */ 1026 /* write checksum */
953 #if defined (RTL8139_CALCULATE_RXCRC) 1027 #if defined (RTL8139_CALCULATE_RXCRC)
954 val = cpu_to_le32(crc32(~0, buf, size)); 1028 val = cpu_to_le32(crc32(~0, buf, size));
@@ -1008,6 +1082,9 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -1008,6 +1082,9 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
1008 val = cpu_to_le32(rxdw1); 1082 val = cpu_to_le32(rxdw1);
1009 cpu_physical_memory_write(cplus_rx_ring_desc+4, (uint8_t *)&val, 4); 1083 cpu_physical_memory_write(cplus_rx_ring_desc+4, (uint8_t *)&val, 4);
1010 1084
  1085 + /* update tally counter */
  1086 + ++s->tally_counters.RxOk;
  1087 +
1011 /* seek to next Rx descriptor */ 1088 /* seek to next Rx descriptor */
1012 if (rxdw0 & CP_RX_EOR) 1089 if (rxdw0 & CP_RX_EOR)
1013 { 1090 {
@@ -1018,16 +1095,13 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -1018,16 +1095,13 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
1018 ++s->currCPlusRxDesc; 1095 ++s->currCPlusRxDesc;
1019 } 1096 }
1020 1097
1021 -#if defined(DEBUG_RTL8139)  
1022 - printf("RTL8139: done C+ Rx mode ----------------\n");  
1023 -#endif 1098 + DEBUG_PRINT(("RTL8139: done C+ Rx mode ----------------\n"));
1024 1099
1025 } 1100 }
1026 else 1101 else
1027 { 1102 {
1028 -#if defined(DEBUG_RTL8139)  
1029 - printf("RTL8139: in ring Rx mode ================\n");  
1030 -#endif 1103 + DEBUG_PRINT(("RTL8139: in ring Rx mode ================\n"));
  1104 +
1031 /* begin ring receiver mode */ 1105 /* begin ring receiver mode */
1032 int avail = MOD2(s->RxBufferSize + s->RxBufPtr - s->RxBufAddr, s->RxBufferSize); 1106 int avail = MOD2(s->RxBufferSize + s->RxBufPtr - s->RxBufAddr, s->RxBufferSize);
1033 1107
@@ -1035,10 +1109,9 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -1035,10 +1109,9 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
1035 1109
1036 if (avail != 0 && size + 8 >= avail) 1110 if (avail != 0 && size + 8 >= avail)
1037 { 1111 {
1038 -#if defined(DEBUG_RTL8139)  
1039 - printf("rx overflow: rx buffer length %d head 0x%04x read 0x%04x === available 0x%04x need 0x%04x\n",  
1040 - s->RxBufferSize, s->RxBufAddr, s->RxBufPtr, avail, size + 8);  
1041 -#endif 1112 + DEBUG_PRINT(("rx overflow: rx buffer length %d head 0x%04x read 0x%04x === available 0x%04x need 0x%04x\n",
  1113 + s->RxBufferSize, s->RxBufAddr, s->RxBufPtr, avail, size + 8));
  1114 +
1042 s->IntrStatus |= RxOverflow; 1115 s->IntrStatus |= RxOverflow;
1043 ++s->RxMissed; 1116 ++s->RxMissed;
1044 rtl8139_update_irq(s); 1117 rtl8139_update_irq(s);
@@ -1070,15 +1143,21 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size) @@ -1070,15 +1143,21 @@ static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
1070 1143
1071 /* now we can signal we have received something */ 1144 /* now we can signal we have received something */
1072 1145
1073 -#if defined(DEBUG_RTL8139)  
1074 - printf(" received: rx buffer length %d head 0x%04x read 0x%04x\n",  
1075 - s->RxBufferSize, s->RxBufAddr, s->RxBufPtr);  
1076 -#endif  
1077 - 1146 + DEBUG_PRINT((" received: rx buffer length %d head 0x%04x read 0x%04x\n",
  1147 + s->RxBufferSize, s->RxBufAddr, s->RxBufPtr));
1078 } 1148 }
1079 1149
1080 s->IntrStatus |= RxOK; 1150 s->IntrStatus |= RxOK;
1081 - rtl8139_update_irq(s); 1151 +
  1152 + if (do_interrupt)
  1153 + {
  1154 + rtl8139_update_irq(s);
  1155 + }
  1156 +}
  1157 +
  1158 +static void rtl8139_receive(void *opaque, const uint8_t *buf, int size)
  1159 +{
  1160 + rtl8139_do_receive(opaque, buf, size, 1);
1082 } 1161 }
1083 1162
1084 static void rtl8139_reset_rxring(RTL8139State *s, uint32_t bufferSize) 1163 static void rtl8139_reset_rxring(RTL8139State *s, uint32_t bufferSize)
@@ -1103,6 +1182,11 @@ static void rtl8139_reset(RTL8139State *s) @@ -1103,6 +1182,11 @@ static void rtl8139_reset(RTL8139State *s)
1103 1182
1104 /* prepare eeprom */ 1183 /* prepare eeprom */
1105 s->eeprom.contents[0] = 0x8129; 1184 s->eeprom.contents[0] = 0x8129;
  1185 +#if 1
  1186 + // PCI vendor and device ID should be mirrored here
  1187 + s->eeprom.contents[1] = 0x10ec;
  1188 + s->eeprom.contents[2] = 0x8139;
  1189 +#endif
1106 memcpy(&s->eeprom.contents[7], s->macaddr, 6); 1190 memcpy(&s->eeprom.contents[7], s->macaddr, 6);
1107 1191
1108 /* mark all status registers as owned by host */ 1192 /* mark all status registers as owned by host */
@@ -1129,7 +1213,7 @@ static void rtl8139_reset(RTL8139State *s) @@ -1129,7 +1213,7 @@ static void rtl8139_reset(RTL8139State *s)
1129 // s->TxConfig |= HW_REVID(1, 0, 0, 0, 0, 0, 0); // RTL-8139 HasHltClk 1213 // s->TxConfig |= HW_REVID(1, 0, 0, 0, 0, 0, 0); // RTL-8139 HasHltClk
1130 s->clock_enabled = 0; 1214 s->clock_enabled = 0;
1131 #else 1215 #else
1132 - s->TxConfig |= HW_REVID(1, 1, 1, 0, 1, 0, 0); // RTL-8139C HasLWake 1216 + s->TxConfig |= HW_REVID(1, 1, 1, 0, 1, 1, 0); // RTL-8139C+ HasLWake
1133 s->clock_enabled = 1; 1217 s->clock_enabled = 1;
1134 #endif 1218 #endif
1135 1219
@@ -1157,34 +1241,133 @@ static void rtl8139_reset(RTL8139State *s) @@ -1157,34 +1241,133 @@ static void rtl8139_reset(RTL8139State *s)
1157 s->NWayAdvert = 0x05e1; /* all modes, full duplex */ 1241 s->NWayAdvert = 0x05e1; /* all modes, full duplex */
1158 s->NWayLPAR = 0x05e1; /* all modes, full duplex */ 1242 s->NWayLPAR = 0x05e1; /* all modes, full duplex */
1159 s->NWayExpansion = 0x0001; /* autonegotiation supported */ 1243 s->NWayExpansion = 0x0001; /* autonegotiation supported */
  1244 +
  1245 + /* also reset timer and disable timer interrupt */
  1246 + s->TCTR = 0;
  1247 + s->TimerInt = 0;
  1248 + s->TCTR_base = 0;
  1249 +
  1250 + /* reset tally counters */
  1251 + RTL8139TallyCounters_clear(&s->tally_counters);
  1252 +}
  1253 +
  1254 +void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters)
  1255 +{
  1256 + counters->TxOk = 0;
  1257 + counters->RxOk = 0;
  1258 + counters->TxERR = 0;
  1259 + counters->RxERR = 0;
  1260 + counters->MissPkt = 0;
  1261 + counters->FAE = 0;
  1262 + counters->Tx1Col = 0;
  1263 + counters->TxMCol = 0;
  1264 + counters->RxOkPhy = 0;
  1265 + counters->RxOkBrd = 0;
  1266 + counters->RxOkMul = 0;
  1267 + counters->TxAbt = 0;
  1268 + counters->TxUndrn = 0;
  1269 +}
  1270 +
  1271 +static void RTL8139TallyCounters_physical_memory_write(target_phys_addr_t tc_addr, RTL8139TallyCounters* tally_counters)
  1272 +{
  1273 + uint16_t val16;
  1274 + uint32_t val32;
  1275 + uint64_t val64;
  1276 +
  1277 + val64 = cpu_to_le64(tally_counters->TxOk);
  1278 + cpu_physical_memory_write(tc_addr + 0, (uint8_t *)&val64, 8);
  1279 +
  1280 + val64 = cpu_to_le64(tally_counters->RxOk);
  1281 + cpu_physical_memory_write(tc_addr + 8, (uint8_t *)&val64, 8);
  1282 +
  1283 + val64 = cpu_to_le64(tally_counters->TxERR);
  1284 + cpu_physical_memory_write(tc_addr + 16, (uint8_t *)&val64, 8);
  1285 +
  1286 + val32 = cpu_to_le32(tally_counters->RxERR);
  1287 + cpu_physical_memory_write(tc_addr + 24, (uint8_t *)&val32, 4);
  1288 +
  1289 + val16 = cpu_to_le16(tally_counters->MissPkt);
  1290 + cpu_physical_memory_write(tc_addr + 28, (uint8_t *)&val16, 2);
  1291 +
  1292 + val16 = cpu_to_le16(tally_counters->FAE);
  1293 + cpu_physical_memory_write(tc_addr + 30, (uint8_t *)&val16, 2);
  1294 +
  1295 + val32 = cpu_to_le32(tally_counters->Tx1Col);
  1296 + cpu_physical_memory_write(tc_addr + 32, (uint8_t *)&val32, 4);
  1297 +
  1298 + val32 = cpu_to_le32(tally_counters->TxMCol);
  1299 + cpu_physical_memory_write(tc_addr + 36, (uint8_t *)&val32, 4);
  1300 +
  1301 + val64 = cpu_to_le64(tally_counters->RxOkPhy);
  1302 + cpu_physical_memory_write(tc_addr + 40, (uint8_t *)&val64, 8);
  1303 +
  1304 + val64 = cpu_to_le64(tally_counters->RxOkBrd);
  1305 + cpu_physical_memory_write(tc_addr + 48, (uint8_t *)&val64, 8);
  1306 +
  1307 + val32 = cpu_to_le32(tally_counters->RxOkMul);
  1308 + cpu_physical_memory_write(tc_addr + 56, (uint8_t *)&val32, 4);
  1309 +
  1310 + val16 = cpu_to_le16(tally_counters->TxAbt);
  1311 + cpu_physical_memory_write(tc_addr + 60, (uint8_t *)&val16, 2);
  1312 +
  1313 + val16 = cpu_to_le16(tally_counters->TxUndrn);
  1314 + cpu_physical_memory_write(tc_addr + 62, (uint8_t *)&val16, 2);
  1315 +}
  1316 +
  1317 +/* Loads values of tally counters from VM state file */
  1318 +static void RTL8139TallyCounters_load(QEMUFile* f, RTL8139TallyCounters *tally_counters)
  1319 +{
  1320 + qemu_get_be64s(f, &tally_counters->TxOk);
  1321 + qemu_get_be64s(f, &tally_counters->RxOk);
  1322 + qemu_get_be64s(f, &tally_counters->TxERR);
  1323 + qemu_get_be32s(f, &tally_counters->RxERR);
  1324 + qemu_get_be16s(f, &tally_counters->MissPkt);
  1325 + qemu_get_be16s(f, &tally_counters->FAE);
  1326 + qemu_get_be32s(f, &tally_counters->Tx1Col);
  1327 + qemu_get_be32s(f, &tally_counters->TxMCol);
  1328 + qemu_get_be64s(f, &tally_counters->RxOkPhy);
  1329 + qemu_get_be64s(f, &tally_counters->RxOkBrd);
  1330 + qemu_get_be32s(f, &tally_counters->RxOkMul);
  1331 + qemu_get_be16s(f, &tally_counters->TxAbt);
  1332 + qemu_get_be16s(f, &tally_counters->TxUndrn);
  1333 +}
  1334 +
  1335 +/* Saves values of tally counters to VM state file */
  1336 +static void RTL8139TallyCounters_save(QEMUFile* f, RTL8139TallyCounters *tally_counters)
  1337 +{
  1338 + qemu_put_be64s(f, &tally_counters->TxOk);
  1339 + qemu_put_be64s(f, &tally_counters->RxOk);
  1340 + qemu_put_be64s(f, &tally_counters->TxERR);
  1341 + qemu_put_be32s(f, &tally_counters->RxERR);
  1342 + qemu_put_be16s(f, &tally_counters->MissPkt);
  1343 + qemu_put_be16s(f, &tally_counters->FAE);
  1344 + qemu_put_be32s(f, &tally_counters->Tx1Col);
  1345 + qemu_put_be32s(f, &tally_counters->TxMCol);
  1346 + qemu_put_be64s(f, &tally_counters->RxOkPhy);
  1347 + qemu_put_be64s(f, &tally_counters->RxOkBrd);
  1348 + qemu_put_be32s(f, &tally_counters->RxOkMul);
  1349 + qemu_put_be16s(f, &tally_counters->TxAbt);
  1350 + qemu_put_be16s(f, &tally_counters->TxUndrn);
1160 } 1351 }
1161 1352
1162 static void rtl8139_ChipCmd_write(RTL8139State *s, uint32_t val) 1353 static void rtl8139_ChipCmd_write(RTL8139State *s, uint32_t val)
1163 { 1354 {
1164 val &= 0xff; 1355 val &= 0xff;
1165 1356
1166 -#ifdef DEBUG_RTL8139  
1167 - printf("RTL8139: ChipCmd write val=0x%08x\n", val);  
1168 -#endif 1357 + DEBUG_PRINT(("RTL8139: ChipCmd write val=0x%08x\n", val));
1169 1358
1170 if (val & CmdReset) 1359 if (val & CmdReset)
1171 { 1360 {
1172 -#ifdef DEBUG_RTL8139  
1173 - printf("RTL8139: ChipCmd reset\n");  
1174 -#endif 1361 + DEBUG_PRINT(("RTL8139: ChipCmd reset\n"));
1175 rtl8139_reset(s); 1362 rtl8139_reset(s);
1176 } 1363 }
1177 if (val & CmdRxEnb) 1364 if (val & CmdRxEnb)
1178 { 1365 {
1179 -#ifdef DEBUG_RTL8139  
1180 - printf("RTL8139: ChipCmd enable receiver\n");  
1181 -#endif 1366 + DEBUG_PRINT(("RTL8139: ChipCmd enable receiver\n"));
1182 } 1367 }
1183 if (val & CmdTxEnb) 1368 if (val & CmdTxEnb)
1184 { 1369 {
1185 -#ifdef DEBUG_RTL8139  
1186 - printf("RTL8139: ChipCmd enable transmitter\n");  
1187 -#endif 1370 + DEBUG_PRINT(("RTL8139: ChipCmd enable transmitter\n"));
1188 } 1371 }
1189 1372
1190 /* mask unwriteable bits */ 1373 /* mask unwriteable bits */
@@ -1202,15 +1385,11 @@ static int rtl8139_RxBufferEmpty(RTL8139State *s) @@ -1202,15 +1385,11 @@ static int rtl8139_RxBufferEmpty(RTL8139State *s)
1202 1385
1203 if (unread != 0) 1386 if (unread != 0)
1204 { 1387 {
1205 -#ifdef DEBUG_RTL8139  
1206 - printf("RTL8139: receiver buffer data available 0x%04x\n", unread);  
1207 -#endif 1388 + DEBUG_PRINT(("RTL8139: receiver buffer data available 0x%04x\n", unread));
1208 return 0; 1389 return 0;
1209 } 1390 }
1210 1391
1211 -#ifdef DEBUG_RTL8139  
1212 - printf("RTL8139: receiver buffer is empty\n");  
1213 -#endif 1392 + DEBUG_PRINT(("RTL8139: receiver buffer is empty\n"));
1214 1393
1215 return 1; 1394 return 1;
1216 } 1395 }
@@ -1222,9 +1401,7 @@ static uint32_t rtl8139_ChipCmd_read(RTL8139State *s) @@ -1222,9 +1401,7 @@ static uint32_t rtl8139_ChipCmd_read(RTL8139State *s)
1222 if (rtl8139_RxBufferEmpty(s)) 1401 if (rtl8139_RxBufferEmpty(s))
1223 ret |= RxBufEmpty; 1402 ret |= RxBufEmpty;
1224 1403
1225 -#ifdef DEBUG_RTL8139  
1226 - printf("RTL8139: ChipCmd read val=0x%04x\n", ret);  
1227 -#endif 1404 + DEBUG_PRINT(("RTL8139: ChipCmd read val=0x%04x\n", ret));
1228 1405
1229 return ret; 1406 return ret;
1230 } 1407 }
@@ -1233,9 +1410,7 @@ static void rtl8139_CpCmd_write(RTL8139State *s, uint32_t val) @@ -1233,9 +1410,7 @@ static void rtl8139_CpCmd_write(RTL8139State *s, uint32_t val)
1233 { 1410 {
1234 val &= 0xffff; 1411 val &= 0xffff;
1235 1412
1236 -#ifdef DEBUG_RTL8139  
1237 - printf("RTL8139C+ command register write(w) val=0x%04x\n", val);  
1238 -#endif 1413 + DEBUG_PRINT(("RTL8139C+ command register write(w) val=0x%04x\n", val));
1239 1414
1240 /* mask unwriteable bits */ 1415 /* mask unwriteable bits */
1241 val = SET_MASKED(val, 0xff84, s->CpCmd); 1416 val = SET_MASKED(val, 0xff84, s->CpCmd);
@@ -1247,9 +1422,21 @@ static uint32_t rtl8139_CpCmd_read(RTL8139State *s) @@ -1247,9 +1422,21 @@ static uint32_t rtl8139_CpCmd_read(RTL8139State *s)
1247 { 1422 {
1248 uint32_t ret = s->CpCmd; 1423 uint32_t ret = s->CpCmd;
1249 1424
1250 -#ifdef DEBUG_RTL8139  
1251 - printf("RTL8139C+ command register read(w) val=0x%04x\n", ret);  
1252 -#endif 1425 + DEBUG_PRINT(("RTL8139C+ command register read(w) val=0x%04x\n", ret));
  1426 +
  1427 + return ret;
  1428 +}
  1429 +
  1430 +static void rtl8139_IntrMitigate_write(RTL8139State *s, uint32_t val)
  1431 +{
  1432 + DEBUG_PRINT(("RTL8139C+ IntrMitigate register write(w) val=0x%04x\n", val));
  1433 +}
  1434 +
  1435 +static uint32_t rtl8139_IntrMitigate_read(RTL8139State *s)
  1436 +{
  1437 + uint32_t ret = 0;
  1438 +
  1439 + DEBUG_PRINT(("RTL8139C+ IntrMitigate register read(w) val=0x%04x\n", ret));
1253 1440
1254 return ret; 1441 return ret;
1255 } 1442 }
@@ -1261,9 +1448,7 @@ int rtl8139_config_writeable(RTL8139State *s) @@ -1261,9 +1448,7 @@ int rtl8139_config_writeable(RTL8139State *s)
1261 return 1; 1448 return 1;
1262 } 1449 }
1263 1450
1264 -#ifdef DEBUG_RTL8139  
1265 - printf("RTL8139: Configuration registers are write-protected\n");  
1266 -#endif 1451 + DEBUG_PRINT(("RTL8139: Configuration registers are write-protected\n"));
1267 1452
1268 return 0; 1453 return 0;
1269 } 1454 }
@@ -1272,9 +1457,7 @@ static void rtl8139_BasicModeCtrl_write(RTL8139State *s, uint32_t val) @@ -1272,9 +1457,7 @@ static void rtl8139_BasicModeCtrl_write(RTL8139State *s, uint32_t val)
1272 { 1457 {
1273 val &= 0xffff; 1458 val &= 0xffff;
1274 1459
1275 -#ifdef DEBUG_RTL8139  
1276 - printf("RTL8139: BasicModeCtrl register write(w) val=0x%04x\n", val);  
1277 -#endif 1460 + DEBUG_PRINT(("RTL8139: BasicModeCtrl register write(w) val=0x%04x\n", val));
1278 1461
1279 /* mask unwriteable bits */ 1462 /* mask unwriteable bits */
1280 uint32 mask = 0x4cff; 1463 uint32 mask = 0x4cff;
@@ -1296,9 +1479,7 @@ static uint32_t rtl8139_BasicModeCtrl_read(RTL8139State *s) @@ -1296,9 +1479,7 @@ static uint32_t rtl8139_BasicModeCtrl_read(RTL8139State *s)
1296 { 1479 {
1297 uint32_t ret = s->BasicModeCtrl; 1480 uint32_t ret = s->BasicModeCtrl;
1298 1481
1299 -#ifdef DEBUG_RTL8139  
1300 - printf("RTL8139: BasicModeCtrl register read(w) val=0x%04x\n", ret);  
1301 -#endif 1482 + DEBUG_PRINT(("RTL8139: BasicModeCtrl register read(w) val=0x%04x\n", ret));
1302 1483
1303 return ret; 1484 return ret;
1304 } 1485 }
@@ -1307,9 +1488,7 @@ static void rtl8139_BasicModeStatus_write(RTL8139State *s, uint32_t val) @@ -1307,9 +1488,7 @@ static void rtl8139_BasicModeStatus_write(RTL8139State *s, uint32_t val)
1307 { 1488 {
1308 val &= 0xffff; 1489 val &= 0xffff;
1309 1490
1310 -#ifdef DEBUG_RTL8139  
1311 - printf("RTL8139: BasicModeStatus register write(w) val=0x%04x\n", val);  
1312 -#endif 1491 + DEBUG_PRINT(("RTL8139: BasicModeStatus register write(w) val=0x%04x\n", val));
1313 1492
1314 /* mask unwriteable bits */ 1493 /* mask unwriteable bits */
1315 val = SET_MASKED(val, 0xff3f, s->BasicModeStatus); 1494 val = SET_MASKED(val, 0xff3f, s->BasicModeStatus);
@@ -1321,9 +1500,7 @@ static uint32_t rtl8139_BasicModeStatus_read(RTL8139State *s) @@ -1321,9 +1500,7 @@ static uint32_t rtl8139_BasicModeStatus_read(RTL8139State *s)
1321 { 1500 {
1322 uint32_t ret = s->BasicModeStatus; 1501 uint32_t ret = s->BasicModeStatus;
1323 1502
1324 -#ifdef DEBUG_RTL8139  
1325 - printf("RTL8139: BasicModeStatus register read(w) val=0x%04x\n", ret);  
1326 -#endif 1503 + DEBUG_PRINT(("RTL8139: BasicModeStatus register read(w) val=0x%04x\n", ret));
1327 1504
1328 return ret; 1505 return ret;
1329 } 1506 }
@@ -1332,9 +1509,7 @@ static void rtl8139_Cfg9346_write(RTL8139State *s, uint32_t val) @@ -1332,9 +1509,7 @@ static void rtl8139_Cfg9346_write(RTL8139State *s, uint32_t val)
1332 { 1509 {
1333 val &= 0xff; 1510 val &= 0xff;
1334 1511
1335 -#ifdef DEBUG_RTL8139  
1336 - printf("RTL8139: Cfg9346 write val=0x%02x\n", val);  
1337 -#endif 1512 + DEBUG_PRINT(("RTL8139: Cfg9346 write val=0x%02x\n", val));
1338 1513
1339 /* mask unwriteable bits */ 1514 /* mask unwriteable bits */
1340 val = SET_MASKED(val, 0x31, s->Cfg9346); 1515 val = SET_MASKED(val, 0x31, s->Cfg9346);
@@ -1377,9 +1552,7 @@ static uint32_t rtl8139_Cfg9346_read(RTL8139State *s) @@ -1377,9 +1552,7 @@ static uint32_t rtl8139_Cfg9346_read(RTL8139State *s)
1377 } 1552 }
1378 } 1553 }
1379 1554
1380 -#ifdef DEBUG_RTL8139  
1381 - printf("RTL8139: Cfg9346 read val=0x%02x\n", ret);  
1382 -#endif 1555 + DEBUG_PRINT(("RTL8139: Cfg9346 read val=0x%02x\n", ret));
1383 1556
1384 return ret; 1557 return ret;
1385 } 1558 }
@@ -1388,9 +1561,7 @@ static void rtl8139_Config0_write(RTL8139State *s, uint32_t val) @@ -1388,9 +1561,7 @@ static void rtl8139_Config0_write(RTL8139State *s, uint32_t val)
1388 { 1561 {
1389 val &= 0xff; 1562 val &= 0xff;
1390 1563
1391 -#ifdef DEBUG_RTL8139  
1392 - printf("RTL8139: Config0 write val=0x%02x\n", val);  
1393 -#endif 1564 + DEBUG_PRINT(("RTL8139: Config0 write val=0x%02x\n", val));
1394 1565
1395 if (!rtl8139_config_writeable(s)) 1566 if (!rtl8139_config_writeable(s))
1396 return; 1567 return;
@@ -1405,9 +1576,7 @@ static uint32_t rtl8139_Config0_read(RTL8139State *s) @@ -1405,9 +1576,7 @@ static uint32_t rtl8139_Config0_read(RTL8139State *s)
1405 { 1576 {
1406 uint32_t ret = s->Config0; 1577 uint32_t ret = s->Config0;
1407 1578
1408 -#ifdef DEBUG_RTL8139  
1409 - printf("RTL8139: Config0 read val=0x%02x\n", ret);  
1410 -#endif 1579 + DEBUG_PRINT(("RTL8139: Config0 read val=0x%02x\n", ret));
1411 1580
1412 return ret; 1581 return ret;
1413 } 1582 }
@@ -1416,9 +1585,7 @@ static void rtl8139_Config1_write(RTL8139State *s, uint32_t val) @@ -1416,9 +1585,7 @@ static void rtl8139_Config1_write(RTL8139State *s, uint32_t val)
1416 { 1585 {
1417 val &= 0xff; 1586 val &= 0xff;
1418 1587
1419 -#ifdef DEBUG_RTL8139  
1420 - printf("RTL8139: Config1 write val=0x%02x\n", val);  
1421 -#endif 1588 + DEBUG_PRINT(("RTL8139: Config1 write val=0x%02x\n", val));
1422 1589
1423 if (!rtl8139_config_writeable(s)) 1590 if (!rtl8139_config_writeable(s))
1424 return; 1591 return;
@@ -1433,9 +1600,7 @@ static uint32_t rtl8139_Config1_read(RTL8139State *s) @@ -1433,9 +1600,7 @@ static uint32_t rtl8139_Config1_read(RTL8139State *s)
1433 { 1600 {
1434 uint32_t ret = s->Config1; 1601 uint32_t ret = s->Config1;
1435 1602
1436 -#ifdef DEBUG_RTL8139  
1437 - printf("RTL8139: Config1 read val=0x%02x\n", ret);  
1438 -#endif 1603 + DEBUG_PRINT(("RTL8139: Config1 read val=0x%02x\n", ret));
1439 1604
1440 return ret; 1605 return ret;
1441 } 1606 }
@@ -1444,9 +1609,7 @@ static void rtl8139_Config3_write(RTL8139State *s, uint32_t val) @@ -1444,9 +1609,7 @@ static void rtl8139_Config3_write(RTL8139State *s, uint32_t val)
1444 { 1609 {
1445 val &= 0xff; 1610 val &= 0xff;
1446 1611
1447 -#ifdef DEBUG_RTL8139  
1448 - printf("RTL8139: Config3 write val=0x%02x\n", val);  
1449 -#endif 1612 + DEBUG_PRINT(("RTL8139: Config3 write val=0x%02x\n", val));
1450 1613
1451 if (!rtl8139_config_writeable(s)) 1614 if (!rtl8139_config_writeable(s))
1452 return; 1615 return;
@@ -1461,9 +1624,7 @@ static uint32_t rtl8139_Config3_read(RTL8139State *s) @@ -1461,9 +1624,7 @@ static uint32_t rtl8139_Config3_read(RTL8139State *s)
1461 { 1624 {
1462 uint32_t ret = s->Config3; 1625 uint32_t ret = s->Config3;
1463 1626
1464 -#ifdef DEBUG_RTL8139  
1465 - printf("RTL8139: Config3 read val=0x%02x\n", ret);  
1466 -#endif 1627 + DEBUG_PRINT(("RTL8139: Config3 read val=0x%02x\n", ret));
1467 1628
1468 return ret; 1629 return ret;
1469 } 1630 }
@@ -1472,9 +1633,7 @@ static void rtl8139_Config4_write(RTL8139State *s, uint32_t val) @@ -1472,9 +1633,7 @@ static void rtl8139_Config4_write(RTL8139State *s, uint32_t val)
1472 { 1633 {
1473 val &= 0xff; 1634 val &= 0xff;
1474 1635
1475 -#ifdef DEBUG_RTL8139  
1476 - printf("RTL8139: Config4 write val=0x%02x\n", val);  
1477 -#endif 1636 + DEBUG_PRINT(("RTL8139: Config4 write val=0x%02x\n", val));
1478 1637
1479 if (!rtl8139_config_writeable(s)) 1638 if (!rtl8139_config_writeable(s))
1480 return; 1639 return;
@@ -1489,9 +1648,7 @@ static uint32_t rtl8139_Config4_read(RTL8139State *s) @@ -1489,9 +1648,7 @@ static uint32_t rtl8139_Config4_read(RTL8139State *s)
1489 { 1648 {
1490 uint32_t ret = s->Config4; 1649 uint32_t ret = s->Config4;
1491 1650
1492 -#ifdef DEBUG_RTL8139  
1493 - printf("RTL8139: Config4 read val=0x%02x\n", ret);  
1494 -#endif 1651 + DEBUG_PRINT(("RTL8139: Config4 read val=0x%02x\n", ret));
1495 1652
1496 return ret; 1653 return ret;
1497 } 1654 }
@@ -1500,9 +1657,7 @@ static void rtl8139_Config5_write(RTL8139State *s, uint32_t val) @@ -1500,9 +1657,7 @@ static void rtl8139_Config5_write(RTL8139State *s, uint32_t val)
1500 { 1657 {
1501 val &= 0xff; 1658 val &= 0xff;
1502 1659
1503 -#ifdef DEBUG_RTL8139  
1504 - printf("RTL8139: Config5 write val=0x%02x\n", val);  
1505 -#endif 1660 + DEBUG_PRINT(("RTL8139: Config5 write val=0x%02x\n", val));
1506 1661
1507 /* mask unwriteable bits */ 1662 /* mask unwriteable bits */
1508 val = SET_MASKED(val, 0x80, s->Config5); 1663 val = SET_MASKED(val, 0x80, s->Config5);
@@ -1514,9 +1669,7 @@ static uint32_t rtl8139_Config5_read(RTL8139State *s) @@ -1514,9 +1669,7 @@ static uint32_t rtl8139_Config5_read(RTL8139State *s)
1514 { 1669 {
1515 uint32_t ret = s->Config5; 1670 uint32_t ret = s->Config5;
1516 1671
1517 -#ifdef DEBUG_RTL8139  
1518 - printf("RTL8139: Config5 read val=0x%02x\n", ret);  
1519 -#endif 1672 + DEBUG_PRINT(("RTL8139: Config5 read val=0x%02x\n", ret));
1520 1673
1521 return ret; 1674 return ret;
1522 } 1675 }
@@ -1525,15 +1678,11 @@ static void rtl8139_TxConfig_write(RTL8139State *s, uint32_t val) @@ -1525,15 +1678,11 @@ static void rtl8139_TxConfig_write(RTL8139State *s, uint32_t val)
1525 { 1678 {
1526 if (!rtl8139_transmitter_enabled(s)) 1679 if (!rtl8139_transmitter_enabled(s))
1527 { 1680 {
1528 -#ifdef DEBUG_RTL8139  
1529 - printf("RTL8139: transmitter disabled; no TxConfig write val=0x%08x\n", val);  
1530 -#endif 1681 + DEBUG_PRINT(("RTL8139: transmitter disabled; no TxConfig write val=0x%08x\n", val));
1531 return; 1682 return;
1532 } 1683 }
1533 1684
1534 -#ifdef DEBUG_RTL8139  
1535 - printf("RTL8139: TxConfig write val=0x%08x\n", val);  
1536 -#endif 1685 + DEBUG_PRINT(("RTL8139: TxConfig write val=0x%08x\n", val));
1537 1686
1538 val = SET_MASKED(val, TxVersionMask | 0x8070f80f, s->TxConfig); 1687 val = SET_MASKED(val, TxVersionMask | 0x8070f80f, s->TxConfig);
1539 1688
@@ -1542,31 +1691,26 @@ static void rtl8139_TxConfig_write(RTL8139State *s, uint32_t val) @@ -1542,31 +1691,26 @@ static void rtl8139_TxConfig_write(RTL8139State *s, uint32_t val)
1542 1691
1543 static void rtl8139_TxConfig_writeb(RTL8139State *s, uint32_t val) 1692 static void rtl8139_TxConfig_writeb(RTL8139State *s, uint32_t val)
1544 { 1693 {
1545 -#ifdef DEBUG_RTL8139  
1546 - printf("RTL8139C TxConfig via write(b) val=0x%02x\n", val);  
1547 -#endif  
1548 - uint32_t tc = s->TxConfig;  
1549 - tc &= 0xFFFFFF00;  
1550 - tc |= (val & 0x000000FF);  
1551 - rtl8139_TxConfig_write(s, tc); 1694 + DEBUG_PRINT(("RTL8139C TxConfig via write(b) val=0x%02x\n", val));
  1695 +
  1696 + uint32_t tc = s->TxConfig;
  1697 + tc &= 0xFFFFFF00;
  1698 + tc |= (val & 0x000000FF);
  1699 + rtl8139_TxConfig_write(s, tc);
1552 } 1700 }
1553 1701
1554 static uint32_t rtl8139_TxConfig_read(RTL8139State *s) 1702 static uint32_t rtl8139_TxConfig_read(RTL8139State *s)
1555 { 1703 {
1556 uint32_t ret = s->TxConfig; 1704 uint32_t ret = s->TxConfig;
1557 1705
1558 -#ifdef DEBUG_RTL8139  
1559 - printf("RTL8139: TxConfig read val=0x%04x\n", ret);  
1560 -#endif 1706 + DEBUG_PRINT(("RTL8139: TxConfig read val=0x%04x\n", ret));
1561 1707
1562 return ret; 1708 return ret;
1563 } 1709 }
1564 1710
1565 static void rtl8139_RxConfig_write(RTL8139State *s, uint32_t val) 1711 static void rtl8139_RxConfig_write(RTL8139State *s, uint32_t val)
1566 { 1712 {
1567 -#ifdef DEBUG_RTL8139  
1568 - printf("RTL8139: RxConfig write val=0x%08x\n", val);  
1569 -#endif 1713 + DEBUG_PRINT(("RTL8139: RxConfig write val=0x%08x\n", val));
1570 1714
1571 /* mask unwriteable bits */ 1715 /* mask unwriteable bits */
1572 val = SET_MASKED(val, 0xf0fc0040, s->RxConfig); 1716 val = SET_MASKED(val, 0xf0fc0040, s->RxConfig);
@@ -1576,18 +1720,14 @@ static void rtl8139_RxConfig_write(RTL8139State *s, uint32_t val) @@ -1576,18 +1720,14 @@ static void rtl8139_RxConfig_write(RTL8139State *s, uint32_t val)
1576 /* reset buffer size and read/write pointers */ 1720 /* reset buffer size and read/write pointers */
1577 rtl8139_reset_rxring(s, 8192 << ((s->RxConfig >> 11) & 0x3)); 1721 rtl8139_reset_rxring(s, 8192 << ((s->RxConfig >> 11) & 0x3));
1578 1722
1579 -#ifdef DEBUG_RTL8139  
1580 - printf("RTL8139: RxConfig write reset buffer size to %d\n", s->RxBufferSize);  
1581 -#endif 1723 + DEBUG_PRINT(("RTL8139: RxConfig write reset buffer size to %d\n", s->RxBufferSize));
1582 } 1724 }
1583 1725
1584 static uint32_t rtl8139_RxConfig_read(RTL8139State *s) 1726 static uint32_t rtl8139_RxConfig_read(RTL8139State *s)
1585 { 1727 {
1586 uint32_t ret = s->RxConfig; 1728 uint32_t ret = s->RxConfig;
1587 1729
1588 -#ifdef DEBUG_RTL8139  
1589 - printf("RTL8139: RxConfig read val=0x%08x\n", ret);  
1590 -#endif 1730 + DEBUG_PRINT(("RTL8139: RxConfig read val=0x%08x\n", ret));
1591 1731
1592 return ret; 1732 return ret;
1593 } 1733 }
@@ -1596,41 +1736,43 @@ static int rtl8139_transmit_one(RTL8139State *s, int descriptor) @@ -1596,41 +1736,43 @@ static int rtl8139_transmit_one(RTL8139State *s, int descriptor)
1596 { 1736 {
1597 if (!rtl8139_transmitter_enabled(s)) 1737 if (!rtl8139_transmitter_enabled(s))
1598 { 1738 {
1599 -#ifdef DEBUG_RTL8139  
1600 - printf("RTL8139: +++ cannot transmit from descriptor %d: transmitter disabled\n", descriptor);  
1601 -#endif 1739 + DEBUG_PRINT(("RTL8139: +++ cannot transmit from descriptor %d: transmitter disabled\n",
  1740 + descriptor));
1602 return 0; 1741 return 0;
1603 } 1742 }
1604 1743
1605 if (s->TxStatus[descriptor] & TxHostOwns) 1744 if (s->TxStatus[descriptor] & TxHostOwns)
1606 { 1745 {
1607 -#ifdef DEBUG_RTL8139  
1608 - printf("RTL8139: +++ cannot transmit from descriptor %d: owned by host (%08x)\n", descriptor, s->TxStatus[descriptor]);  
1609 -#endif 1746 + DEBUG_PRINT(("RTL8139: +++ cannot transmit from descriptor %d: owned by host (%08x)\n",
  1747 + descriptor, s->TxStatus[descriptor]));
1610 return 0; 1748 return 0;
1611 } 1749 }
1612 1750
1613 -#ifdef DEBUG_RTL8139  
1614 - printf("RTL8139: +++ transmitting from descriptor %d\n", descriptor);  
1615 -#endif 1751 + DEBUG_PRINT(("RTL8139: +++ transmitting from descriptor %d\n", descriptor));
1616 1752
1617 int txsize = s->TxStatus[descriptor] & 0x1fff; 1753 int txsize = s->TxStatus[descriptor] & 0x1fff;
1618 uint8_t txbuffer[0x2000]; 1754 uint8_t txbuffer[0x2000];
1619 1755
1620 -#ifdef DEBUG_RTL8139  
1621 - printf("RTL8139: +++ transmit reading %d bytes from host memory at 0x%08x\n", txsize, s->TxAddr[descriptor]);  
1622 -#endif  
1623 - cpu_physical_memory_read(s->TxAddr[descriptor], txbuffer, txsize); 1756 + DEBUG_PRINT(("RTL8139: +++ transmit reading %d bytes from host memory at 0x%08x\n",
  1757 + txsize, s->TxAddr[descriptor]));
1624 1758
1625 - qemu_send_packet(s->vc, txbuffer, txsize); 1759 + cpu_physical_memory_read(s->TxAddr[descriptor], txbuffer, txsize);
1626 1760
1627 /* Mark descriptor as transferred */ 1761 /* Mark descriptor as transferred */
1628 s->TxStatus[descriptor] |= TxHostOwns; 1762 s->TxStatus[descriptor] |= TxHostOwns;
1629 s->TxStatus[descriptor] |= TxStatOK; 1763 s->TxStatus[descriptor] |= TxStatOK;
1630 1764
1631 -#ifdef DEBUG_RTL8139  
1632 - printf("RTL8139: +++ transmitted %d bytes from descriptor %d\n", txsize, descriptor);  
1633 -#endif 1765 + if (TxLoopBack == (s->TxConfig & TxLoopBack))
  1766 + {
  1767 + DEBUG_PRINT(("RTL8139: +++ transmit loopback mode\n"));
  1768 + rtl8139_do_receive(s, txbuffer, txsize, 0);
  1769 + }
  1770 + else
  1771 + {
  1772 + qemu_send_packet(s->vc, txbuffer, txsize);
  1773 + }
  1774 +
  1775 + DEBUG_PRINT(("RTL8139: +++ transmitted %d bytes from descriptor %d\n", txsize, descriptor));
1634 1776
1635 /* update interrupt */ 1777 /* update interrupt */
1636 s->IntrStatus |= TxOK; 1778 s->IntrStatus |= TxOK;
@@ -1643,17 +1785,13 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) @@ -1643,17 +1785,13 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s)
1643 { 1785 {
1644 if (!rtl8139_transmitter_enabled(s)) 1786 if (!rtl8139_transmitter_enabled(s))
1645 { 1787 {
1646 -#ifdef DEBUG_RTL8139  
1647 - printf("RTL8139: +++ C+ mode: transmitter disabled\n");  
1648 -#endif 1788 + DEBUG_PRINT(("RTL8139: +++ C+ mode: transmitter disabled\n"));
1649 return 0; 1789 return 0;
1650 } 1790 }
1651 1791
1652 if (!rtl8139_cp_transmitter_enabled(s)) 1792 if (!rtl8139_cp_transmitter_enabled(s))
1653 { 1793 {
1654 -#ifdef DEBUG_RTL8139  
1655 - printf("RTL8139: +++ C+ mode: C+ transmitter disabled\n");  
1656 -#endif 1794 + DEBUG_PRINT(("RTL8139: +++ C+ mode: C+ transmitter disabled\n"));
1657 return 0 ; 1795 return 0 ;
1658 } 1796 }
1659 1797
@@ -1665,10 +1803,8 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) @@ -1665,10 +1803,8 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s)
1665 /* Normal priority ring */ 1803 /* Normal priority ring */
1666 cplus_tx_ring_desc += 16 * descriptor; 1804 cplus_tx_ring_desc += 16 * descriptor;
1667 1805
1668 -#ifdef DEBUG_RTL8139  
1669 - printf("RTL8139: +++ C+ mode reading TX descriptor %d from host memory at %08x0x%08x = 0x%8lx\n",  
1670 - descriptor, s->TxAddr[1], s->TxAddr[0], cplus_tx_ring_desc);  
1671 -#endif 1806 + DEBUG_PRINT(("RTL8139: +++ C+ mode reading TX descriptor %d from host memory at %08x0x%08x = 0x%8lx\n",
  1807 + descriptor, s->TxAddr[1], s->TxAddr[0], cplus_tx_ring_desc));
1672 1808
1673 uint32_t val, txdw0,txdw1,txbufLO,txbufHI; 1809 uint32_t val, txdw0,txdw1,txbufLO,txbufHI;
1674 1810
@@ -1681,11 +1817,9 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) @@ -1681,11 +1817,9 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s)
1681 cpu_physical_memory_read(cplus_tx_ring_desc+12, (uint8_t *)&val, 4); 1817 cpu_physical_memory_read(cplus_tx_ring_desc+12, (uint8_t *)&val, 4);
1682 txbufHI = le32_to_cpu(val); 1818 txbufHI = le32_to_cpu(val);
1683 1819
1684 -#ifdef DEBUG_RTL8139  
1685 - printf("RTL8139: +++ C+ mode TX descriptor %d %08x %08x %08x %08x\n", 1820 + DEBUG_PRINT(("RTL8139: +++ C+ mode TX descriptor %d %08x %08x %08x %08x\n",
1686 descriptor, 1821 descriptor,
1687 - txdw0, txdw1, txbufLO, txbufHI);  
1688 -#endif 1822 + txdw0, txdw1, txbufLO, txbufHI));
1689 1823
1690 /* w0 ownership flag */ 1824 /* w0 ownership flag */
1691 #define CP_TX_OWN (1<<31) 1825 #define CP_TX_OWN (1<<31)
@@ -1728,28 +1862,71 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) @@ -1728,28 +1862,71 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s)
1728 1862
1729 if (!(txdw0 & CP_TX_OWN)) 1863 if (!(txdw0 & CP_TX_OWN))
1730 { 1864 {
1731 -#if defined(DEBUG_RTL8139)  
1732 - printf("RTL8139: C+ Tx mode : descriptor %d is owned by host\n", descriptor);  
1733 -#endif 1865 + DEBUG_PRINT(("RTL8139: C+ Tx mode : descriptor %d is owned by host\n", descriptor));
1734 return 0 ; 1866 return 0 ;
1735 } 1867 }
1736 1868
1737 -#ifdef DEBUG_RTL8139  
1738 - printf("RTL8139: +++ C+ Tx mode : transmitting from descriptor %d\n", descriptor);  
1739 -#endif 1869 + DEBUG_PRINT(("RTL8139: +++ C+ Tx mode : transmitting from descriptor %d\n", descriptor));
  1870 +
  1871 + if (txdw0 & CP_TX_FS)
  1872 + {
  1873 + DEBUG_PRINT(("RTL8139: +++ C+ Tx mode : descriptor %d is first segment descriptor\n", descriptor));
  1874 +
  1875 + /* reset internal buffer offset */
  1876 + s->cplus_txbuffer_offset = 0;
  1877 + }
1740 1878
1741 int txsize = txdw0 & CP_TX_BUFFER_SIZE_MASK; 1879 int txsize = txdw0 & CP_TX_BUFFER_SIZE_MASK;
1742 target_phys_addr_t tx_addr = rtl8139_addr64(txbufLO, txbufHI); 1880 target_phys_addr_t tx_addr = rtl8139_addr64(txbufLO, txbufHI);
1743 1881
1744 - uint8_t txbuffer[CP_TX_BUFFER_SIZE]; 1882 + /* make sure we have enough space to assemble the packet */
  1883 + if (!s->cplus_txbuffer)
  1884 + {
  1885 + s->cplus_txbuffer_len = CP_TX_BUFFER_SIZE;
  1886 + s->cplus_txbuffer = malloc(s->cplus_txbuffer_len);
  1887 + s->cplus_txbuffer_offset = 0;
  1888 + }
  1889 +
  1890 + while (s->cplus_txbuffer && s->cplus_txbuffer_offset + txsize >= s->cplus_txbuffer_len)
  1891 + {
  1892 + s->cplus_txbuffer_len += CP_TX_BUFFER_SIZE;
  1893 + s->cplus_txbuffer = realloc(s->cplus_txbuffer, s->cplus_txbuffer_len);
1745 1894
1746 -#ifdef DEBUG_RTL8139  
1747 - printf("RTL8139: +++ C+ mode transmit reading %d bytes from host memory at 0x%08x\n", txsize, tx_addr);  
1748 -#endif  
1749 - cpu_physical_memory_read(tx_addr, txbuffer, txsize); 1895 + DEBUG_PRINT(("RTL8139: +++ C+ mode transmission buffer space changed to %d\n", s->cplus_txbuffer_len));
  1896 + }
  1897 +
  1898 + if (!s->cplus_txbuffer)
  1899 + {
  1900 + /* out of memory */
1750 1901
1751 - /* transmit the packet */  
1752 - qemu_send_packet(s->vc, txbuffer, txsize); 1902 + DEBUG_PRINT(("RTL8139: +++ C+ mode transmiter failed to reallocate %d bytes\n", s->cplus_txbuffer_len));
  1903 +
  1904 + /* update tally counter */
  1905 + ++s->tally_counters.TxERR;
  1906 + ++s->tally_counters.TxAbt;
  1907 +
  1908 + return 0;
  1909 + }
  1910 +
  1911 + /* append more data to the packet */
  1912 +
  1913 + DEBUG_PRINT(("RTL8139: +++ C+ mode transmit reading %d bytes from host memory at %016" PRIx64 " to offset %d\n",
  1914 + txsize, (uint64_t)tx_addr, s->cplus_txbuffer_offset));
  1915 +
  1916 + cpu_physical_memory_read(tx_addr, s->cplus_txbuffer + s->cplus_txbuffer_offset, txsize);
  1917 + s->cplus_txbuffer_offset += txsize;
  1918 +
  1919 + /* seek to next Rx descriptor */
  1920 + if (txdw0 & CP_TX_EOR)
  1921 + {
  1922 + s->currCPlusTxDesc = 0;
  1923 + }
  1924 + else
  1925 + {
  1926 + ++s->currCPlusTxDesc;
  1927 + if (s->currCPlusTxDesc >= 64)
  1928 + s->currCPlusTxDesc = 0;
  1929 + }
1753 1930
1754 /* transfer ownership to target */ 1931 /* transfer ownership to target */
1755 txdw0 &= ~CP_RX_OWN; 1932 txdw0 &= ~CP_RX_OWN;
@@ -1767,19 +1944,175 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) @@ -1767,19 +1944,175 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s)
1767 // val = cpu_to_le32(txdw1); 1944 // val = cpu_to_le32(txdw1);
1768 // cpu_physical_memory_write(cplus_tx_ring_desc+4, &val, 4); 1945 // cpu_physical_memory_write(cplus_tx_ring_desc+4, &val, 4);
1769 1946
1770 - /* seek to next Rx descriptor */  
1771 - if (txdw0 & CP_TX_EOR) 1947 + /* Now decide if descriptor being processed is holding the last segment of packet */
  1948 + if (txdw0 & CP_TX_LS)
1772 { 1949 {
1773 - s->currCPlusTxDesc = 0; 1950 + DEBUG_PRINT(("RTL8139: +++ C+ Tx mode : descriptor %d is last segment descriptor\n", descriptor));
  1951 +
  1952 + /* can transfer fully assembled packet */
  1953 +
  1954 + uint8_t *saved_buffer = s->cplus_txbuffer;
  1955 + int saved_size = s->cplus_txbuffer_offset;
  1956 + int saved_buffer_len = s->cplus_txbuffer_len;
  1957 +
  1958 + /* reset the card space to protect from recursive call */
  1959 + s->cplus_txbuffer = NULL;
  1960 + s->cplus_txbuffer_offset = 0;
  1961 + s->cplus_txbuffer_len = 0;
  1962 +
  1963 + if (txdw0 & (CP_TX_IPCS | CP_TX_UDPCS | CP_TX_TCPCS))
  1964 + {
  1965 + DEBUG_PRINT(("RTL8139: +++ C+ mode offloaded task checksum\n"));
  1966 +
  1967 + #define ETH_P_IP 0x0800 /* Internet Protocol packet */
  1968 + #define ETH_HLEN 14
  1969 +
  1970 + /* ip packet header */
  1971 + register struct ip *ip = 0;
  1972 + int hlen = 0;
  1973 +
  1974 + struct mbuf local_m;
  1975 +
  1976 + int proto = ntohs(*(uint16_t *)(saved_buffer + 12));
  1977 + if (proto == ETH_P_IP)
  1978 + {
  1979 + DEBUG_PRINT(("RTL8139: +++ C+ mode has IP packet\n"));
  1980 +
  1981 + /* not aligned */
  1982 + local_m.m_data = saved_buffer + ETH_HLEN;
  1983 + local_m.m_len = saved_size - ETH_HLEN;
  1984 +
  1985 + ip = mtod(&local_m, struct ip *);
  1986 +
  1987 + if (ip->ip_v != IPVERSION) {
  1988 + DEBUG_PRINT(("RTL8139: +++ C+ mode packet has bad IP version %d expected %d\n", ip->ip_v, IPVERSION));
  1989 + ip = NULL;
  1990 + } else {
  1991 + hlen = ip->ip_hl << 2;
  1992 + }
  1993 + }
  1994 +
  1995 + if (ip)
  1996 + {
  1997 + if (txdw0 & CP_TX_IPCS)
  1998 + {
  1999 + DEBUG_PRINT(("RTL8139: +++ C+ mode need IP checksum\n"));
  2000 +
  2001 + if (hlen<sizeof(struct ip ) || hlen>local_m.m_len) {/* min header length */
  2002 + /* bad packet header len */
  2003 + /* or packet too short */
  2004 + }
  2005 + else
  2006 + {
  2007 + ip->ip_sum = 0;
  2008 + ip->ip_sum = cksum(&local_m, hlen);
  2009 + DEBUG_PRINT(("RTL8139: +++ C+ mode IP header len=%d checksum=%04x\n", hlen, ip->ip_sum));
  2010 + }
  2011 + }
  2012 +
  2013 + if (txdw0 & (CP_TX_TCPCS|CP_TX_UDPCS))
  2014 + {
  2015 + DEBUG_PRINT(("RTL8139: +++ C+ mode need TCP or UDP checksum\n"));
  2016 +
  2017 + u_int8_t ip_protocol = ip->ip_p;
  2018 + u_int16_t ip_data_len = ntohs(ip->ip_len) - hlen;
  2019 +
  2020 + /* maximum IP header length is 60 bytes */
  2021 + uint8_t saved_ip_header[60];
  2022 + memcpy(saved_ip_header, local_m.m_data, hlen);
  2023 +
  2024 + struct mbuf local_checksum_m;
  2025 +
  2026 + local_checksum_m.m_data = local_m.m_data + hlen - 12;
  2027 + local_checksum_m.m_len = local_m.m_len - hlen + 12;
  2028 +
  2029 + /* add 4 TCP pseudoheader fields */
  2030 + /* copy IP source and destination fields */
  2031 + memcpy(local_checksum_m.m_data, saved_ip_header + 12, 8);
  2032 +
  2033 + if ((txdw0 & CP_TX_TCPCS) && ip_protocol == IPPROTO_TCP)
  2034 + {
  2035 + DEBUG_PRINT(("RTL8139: +++ C+ mode calculating TCP checksum for packet with %d bytes data\n", ip_data_len));
  2036 +
  2037 + struct tcpiphdr * p_tcpip_hdr = (struct tcpiphdr *)local_checksum_m.m_data;
  2038 + p_tcpip_hdr->ti_x1 = 0;
  2039 + p_tcpip_hdr->ti_pr = IPPROTO_TCP;
  2040 + p_tcpip_hdr->ti_len = htons(ip_data_len);
  2041 +
  2042 + struct tcphdr* p_tcp_hdr = (struct tcphdr*) (local_checksum_m.m_data+12);
  2043 +
  2044 + p_tcp_hdr->th_sum = 0;
  2045 +
  2046 + int tcp_checksum = cksum(&local_checksum_m, ip_data_len + 12);
  2047 + DEBUG_PRINT(("RTL8139: +++ C+ mode TCP checksum %04x\n", tcp_checksum));
  2048 +
  2049 + p_tcp_hdr->th_sum = tcp_checksum;
  2050 + }
  2051 + else if ((txdw0 & CP_TX_UDPCS) && ip_protocol == IPPROTO_UDP)
  2052 + {
  2053 + DEBUG_PRINT(("RTL8139: +++ C+ mode calculating UDP checksum for packet with %d bytes data\n", ip_data_len));
  2054 +
  2055 + struct udpiphdr * p_udpip_hdr = (struct udpiphdr *)local_checksum_m.m_data;
  2056 + p_udpip_hdr->ui_x1 = 0;
  2057 + p_udpip_hdr->ui_pr = IPPROTO_UDP;
  2058 + p_udpip_hdr->ui_len = htons(ip_data_len);
  2059 +
  2060 + struct udphdr* p_udp_hdr = (struct udphdr*) (local_checksum_m.m_data+12);
  2061 +
  2062 + int old_csum = p_udp_hdr->uh_sum;
  2063 + p_udp_hdr->uh_sum = 0;
  2064 +
  2065 + int udp_checksum = cksum(&local_checksum_m, ip_data_len + 12);
  2066 + DEBUG_PRINT(("RTL8139: +++ C+ mode UDP checksum %04x\n", udp_checksum));
  2067 +
  2068 + if (old_csum != udp_checksum)
  2069 + {
  2070 + DEBUG_PRINT(("RTL8139: +++ C+ mode UDP checksum mismatch old=%04x new=%04x\n",
  2071 + old_csum, udp_checksum));
  2072 + }
  2073 +
  2074 + p_udp_hdr->uh_sum = udp_checksum;
  2075 + }
  2076 +
  2077 + /* restore IP header */
  2078 + memcpy(local_m.m_data, saved_ip_header, hlen);
  2079 + }
  2080 + }
  2081 + }
  2082 +
  2083 + /* update tally counter */
  2084 + ++s->tally_counters.TxOk;
  2085 +
  2086 + DEBUG_PRINT(("RTL8139: +++ C+ mode transmitting %d bytes packet\n", saved_size));
  2087 +
  2088 + if (TxLoopBack == (s->TxConfig & TxLoopBack))
  2089 + {
  2090 + DEBUG_PRINT(("RTL8139: +++ C+ transmit loopback mode\n"));
  2091 + rtl8139_receive(s, saved_buffer, saved_size);
  2092 + }
  2093 + else
  2094 + {
  2095 + /* transmit the packet */
  2096 + qemu_send_packet(s->vc, saved_buffer, saved_size);
  2097 + }
  2098 +
  2099 + /* restore card space if there was no recursion and reset offset */
  2100 + if (!s->cplus_txbuffer)
  2101 + {
  2102 + s->cplus_txbuffer = saved_buffer;
  2103 + s->cplus_txbuffer_len = saved_buffer_len;
  2104 + s->cplus_txbuffer_offset = 0;
  2105 + }
  2106 + else
  2107 + {
  2108 + free(saved_buffer);
  2109 + }
1774 } 2110 }
1775 else 2111 else
1776 { 2112 {
1777 - ++s->currCPlusTxDesc; 2113 + DEBUG_PRINT(("RTL8139: +++ C+ mode transmission continue to next descriptor\n"));
1778 } 2114 }
1779 2115
1780 -#ifdef DEBUG_RTL8139  
1781 - printf("RTL8139: +++ C+ mode transmitted %d bytes from descriptor %d\n", txsize, descriptor);  
1782 -#endif  
1783 return 1; 2116 return 1;
1784 } 2117 }
1785 2118
@@ -1795,9 +2128,8 @@ static void rtl8139_cplus_transmit(RTL8139State *s) @@ -1795,9 +2128,8 @@ static void rtl8139_cplus_transmit(RTL8139State *s)
1795 /* Mark transfer completed */ 2128 /* Mark transfer completed */
1796 if (!txcount) 2129 if (!txcount)
1797 { 2130 {
1798 -#ifdef DEBUG_RTL8139  
1799 - printf("RTL8139: C+ mode : transmitter queue stalled, current TxDesc = %d\n", s->currCPlusTxDesc);  
1800 -#endif 2131 + DEBUG_PRINT(("RTL8139: C+ mode : transmitter queue stalled, current TxDesc = %d\n",
  2132 + s->currCPlusTxDesc));
1801 } 2133 }
1802 else 2134 else
1803 { 2135 {
@@ -1822,9 +2154,7 @@ static void rtl8139_transmit(RTL8139State *s) @@ -1822,9 +2154,7 @@ static void rtl8139_transmit(RTL8139State *s)
1822 /* Mark transfer completed */ 2154 /* Mark transfer completed */
1823 if (!txcount) 2155 if (!txcount)
1824 { 2156 {
1825 -#ifdef DEBUG_RTL8139  
1826 - printf("RTL8139: transmitter queue stalled, current TxDesc = %d\n", s->currTxDesc);  
1827 -#endif 2157 + DEBUG_PRINT(("RTL8139: transmitter queue stalled, current TxDesc = %d\n", s->currTxDesc));
1828 } 2158 }
1829 } 2159 }
1830 2160
@@ -1832,9 +2162,31 @@ static void rtl8139_TxStatus_write(RTL8139State *s, uint32_t txRegOffset, uint32 @@ -1832,9 +2162,31 @@ static void rtl8139_TxStatus_write(RTL8139State *s, uint32_t txRegOffset, uint32
1832 { 2162 {
1833 2163
1834 int descriptor = txRegOffset/4; 2164 int descriptor = txRegOffset/4;
1835 -#ifdef DEBUG_RTL8139  
1836 - printf("RTL8139: TxStatus write offset=0x%x val=0x%08x descriptor=%d\n", txRegOffset, val, descriptor);  
1837 -#endif 2165 +
  2166 + /* handle C+ transmit mode register configuration */
  2167 +
  2168 + if (rtl8139_cp_transmitter_enabled(s))
  2169 + {
  2170 + DEBUG_PRINT(("RTL8139C+ DTCCR write offset=0x%x val=0x%08x descriptor=%d\n", txRegOffset, val, descriptor));
  2171 +
  2172 + /* handle Dump Tally Counters command */
  2173 + s->TxStatus[descriptor] = val;
  2174 +
  2175 + if (descriptor == 0 && (val & 0x8))
  2176 + {
  2177 + target_phys_addr_t tc_addr = rtl8139_addr64(s->TxStatus[0] & ~0x3f, s->TxStatus[1]);
  2178 +
  2179 + /* dump tally counters to specified memory location */
  2180 + RTL8139TallyCounters_physical_memory_write( tc_addr, &s->tally_counters);
  2181 +
  2182 + /* mark dump completed */
  2183 + s->TxStatus[0] &= ~0x8;
  2184 + }
  2185 +
  2186 + return;
  2187 + }
  2188 +
  2189 + DEBUG_PRINT(("RTL8139: TxStatus write offset=0x%x val=0x%08x descriptor=%d\n", txRegOffset, val, descriptor));
1838 2190
1839 /* mask only reserved bits */ 2191 /* mask only reserved bits */
1840 val &= ~0xff00c000; /* these bits are reset on write */ 2192 val &= ~0xff00c000; /* these bits are reset on write */
@@ -1850,9 +2202,7 @@ static uint32_t rtl8139_TxStatus_read(RTL8139State *s, uint32_t txRegOffset) @@ -1850,9 +2202,7 @@ static uint32_t rtl8139_TxStatus_read(RTL8139State *s, uint32_t txRegOffset)
1850 { 2202 {
1851 uint32_t ret = s->TxStatus[txRegOffset/4]; 2203 uint32_t ret = s->TxStatus[txRegOffset/4];
1852 2204
1853 -#ifdef DEBUG_RTL8139  
1854 - printf("RTL8139: TxStatus read offset=0x%x val=0x%08x\n", txRegOffset, ret);  
1855 -#endif 2205 + DEBUG_PRINT(("RTL8139: TxStatus read offset=0x%x val=0x%08x\n", txRegOffset, ret));
1856 2206
1857 return ret; 2207 return ret;
1858 } 2208 }
@@ -1884,9 +2234,7 @@ static uint16_t rtl8139_TSAD_read(RTL8139State *s) @@ -1884,9 +2234,7 @@ static uint16_t rtl8139_TSAD_read(RTL8139State *s)
1884 |((s->TxStatus[0] & TxHostOwns )?TSAD_OWN0:0) ; 2234 |((s->TxStatus[0] & TxHostOwns )?TSAD_OWN0:0) ;
1885 2235
1886 2236
1887 -#ifdef DEBUG_RTL8139  
1888 - printf("RTL8139: TSAD read val=0x%04x\n", ret);  
1889 -#endif 2237 + DEBUG_PRINT(("RTL8139: TSAD read val=0x%04x\n", ret));
1890 2238
1891 return ret; 2239 return ret;
1892 } 2240 }
@@ -1895,46 +2243,38 @@ static uint16_t rtl8139_CSCR_read(RTL8139State *s) @@ -1895,46 +2243,38 @@ static uint16_t rtl8139_CSCR_read(RTL8139State *s)
1895 { 2243 {
1896 uint16_t ret = s->CSCR; 2244 uint16_t ret = s->CSCR;
1897 2245
1898 -#ifdef DEBUG_RTL8139  
1899 - printf("RTL8139: CSCR read val=0x%04x\n", ret);  
1900 -#endif 2246 + DEBUG_PRINT(("RTL8139: CSCR read val=0x%04x\n", ret));
1901 2247
1902 return ret; 2248 return ret;
1903 } 2249 }
1904 2250
1905 static void rtl8139_TxAddr_write(RTL8139State *s, uint32_t txAddrOffset, uint32_t val) 2251 static void rtl8139_TxAddr_write(RTL8139State *s, uint32_t txAddrOffset, uint32_t val)
1906 { 2252 {
1907 -#ifdef DEBUG_RTL8139  
1908 - printf("RTL8139: TxAddr write offset=0x%x val=0x%08x\n", txAddrOffset, val);  
1909 -#endif 2253 + DEBUG_PRINT(("RTL8139: TxAddr write offset=0x%x val=0x%08x\n", txAddrOffset, val));
1910 2254
1911 s->TxAddr[txAddrOffset/4] = le32_to_cpu(val); 2255 s->TxAddr[txAddrOffset/4] = le32_to_cpu(val);
  2256 +
  2257 + s->currCPlusTxDesc = 0;
1912 } 2258 }
1913 2259
1914 static uint32_t rtl8139_TxAddr_read(RTL8139State *s, uint32_t txAddrOffset) 2260 static uint32_t rtl8139_TxAddr_read(RTL8139State *s, uint32_t txAddrOffset)
1915 { 2261 {
1916 uint32_t ret = cpu_to_le32(s->TxAddr[txAddrOffset/4]); 2262 uint32_t ret = cpu_to_le32(s->TxAddr[txAddrOffset/4]);
1917 2263
1918 -#ifdef DEBUG_RTL8139  
1919 - printf("RTL8139: TxAddr read offset=0x%x val=0x%08x\n", txAddrOffset, ret);  
1920 -#endif 2264 + DEBUG_PRINT(("RTL8139: TxAddr read offset=0x%x val=0x%08x\n", txAddrOffset, ret));
1921 2265
1922 return ret; 2266 return ret;
1923 } 2267 }
1924 2268
1925 static void rtl8139_RxBufPtr_write(RTL8139State *s, uint32_t val) 2269 static void rtl8139_RxBufPtr_write(RTL8139State *s, uint32_t val)
1926 { 2270 {
1927 -#ifdef DEBUG_RTL8139  
1928 - printf("RTL8139: RxBufPtr write val=0x%04x\n", val);  
1929 -#endif 2271 + DEBUG_PRINT(("RTL8139: RxBufPtr write val=0x%04x\n", val));
1930 2272
1931 /* this value is off by 16 */ 2273 /* this value is off by 16 */
1932 s->RxBufPtr = MOD2(val + 0x10, s->RxBufferSize); 2274 s->RxBufPtr = MOD2(val + 0x10, s->RxBufferSize);
1933 2275
1934 -#if defined(DEBUG_RTL8139)  
1935 - printf(" CAPR write: rx buffer length %d head 0x%04x read 0x%04x\n",  
1936 - s->RxBufferSize, s->RxBufAddr, s->RxBufPtr);  
1937 -#endif 2276 + DEBUG_PRINT((" CAPR write: rx buffer length %d head 0x%04x read 0x%04x\n",
  2277 + s->RxBufferSize, s->RxBufAddr, s->RxBufPtr));
1938 } 2278 }
1939 2279
1940 static uint32_t rtl8139_RxBufPtr_read(RTL8139State *s) 2280 static uint32_t rtl8139_RxBufPtr_read(RTL8139State *s)
@@ -1942,18 +2282,24 @@ static uint32_t rtl8139_RxBufPtr_read(RTL8139State *s) @@ -1942,18 +2282,24 @@ static uint32_t rtl8139_RxBufPtr_read(RTL8139State *s)
1942 /* this value is off by 16 */ 2282 /* this value is off by 16 */
1943 uint32_t ret = s->RxBufPtr - 0x10; 2283 uint32_t ret = s->RxBufPtr - 0x10;
1944 2284
1945 -#ifdef DEBUG_RTL8139  
1946 - printf("RTL8139: RxBufPtr read val=0x%04x\n", ret);  
1947 -#endif 2285 + DEBUG_PRINT(("RTL8139: RxBufPtr read val=0x%04x\n", ret));
  2286 +
  2287 + return ret;
  2288 +}
  2289 +
  2290 +static uint32_t rtl8139_RxBufAddr_read(RTL8139State *s)
  2291 +{
  2292 + /* this value is NOT off by 16 */
  2293 + uint32_t ret = s->RxBufAddr;
  2294 +
  2295 + DEBUG_PRINT(("RTL8139: RxBufAddr read val=0x%04x\n", ret));
1948 2296
1949 return ret; 2297 return ret;
1950 } 2298 }
1951 2299
1952 static void rtl8139_RxBuf_write(RTL8139State *s, uint32_t val) 2300 static void rtl8139_RxBuf_write(RTL8139State *s, uint32_t val)
1953 { 2301 {
1954 -#ifdef DEBUG_RTL8139  
1955 - printf("RTL8139: RxBuf write val=0x%08x\n", val);  
1956 -#endif 2302 + DEBUG_PRINT(("RTL8139: RxBuf write val=0x%08x\n", val));
1957 2303
1958 s->RxBuf = val; 2304 s->RxBuf = val;
1959 2305
@@ -1964,18 +2310,14 @@ static uint32_t rtl8139_RxBuf_read(RTL8139State *s) @@ -1964,18 +2310,14 @@ static uint32_t rtl8139_RxBuf_read(RTL8139State *s)
1964 { 2310 {
1965 uint32_t ret = s->RxBuf; 2311 uint32_t ret = s->RxBuf;
1966 2312
1967 -#ifdef DEBUG_RTL8139  
1968 - printf("RTL8139: RxBuf read val=0x%08x\n", ret);  
1969 -#endif 2313 + DEBUG_PRINT(("RTL8139: RxBuf read val=0x%08x\n", ret));
1970 2314
1971 return ret; 2315 return ret;
1972 } 2316 }
1973 2317
1974 static void rtl8139_IntrMask_write(RTL8139State *s, uint32_t val) 2318 static void rtl8139_IntrMask_write(RTL8139State *s, uint32_t val)
1975 { 2319 {
1976 -#ifdef DEBUG_RTL8139  
1977 - printf("RTL8139: IntrMask write(w) val=0x%04x\n", val);  
1978 -#endif 2320 + DEBUG_PRINT(("RTL8139: IntrMask write(w) val=0x%04x\n", val));
1979 2321
1980 /* mask unwriteable bits */ 2322 /* mask unwriteable bits */
1981 val = SET_MASKED(val, 0x1e00, s->IntrMask); 2323 val = SET_MASKED(val, 0x1e00, s->IntrMask);
@@ -1989,18 +2331,14 @@ static uint32_t rtl8139_IntrMask_read(RTL8139State *s) @@ -1989,18 +2331,14 @@ static uint32_t rtl8139_IntrMask_read(RTL8139State *s)
1989 { 2331 {
1990 uint32_t ret = s->IntrMask; 2332 uint32_t ret = s->IntrMask;
1991 2333
1992 -#ifdef DEBUG_RTL8139  
1993 - printf("RTL8139: IntrMask read(w) val=0x%04x\n", ret);  
1994 -#endif 2334 + DEBUG_PRINT(("RTL8139: IntrMask read(w) val=0x%04x\n", ret));
1995 2335
1996 return ret; 2336 return ret;
1997 } 2337 }
1998 2338
1999 static void rtl8139_IntrStatus_write(RTL8139State *s, uint32_t val) 2339 static void rtl8139_IntrStatus_write(RTL8139State *s, uint32_t val)
2000 { 2340 {
2001 -#ifdef DEBUG_RTL8139  
2002 - printf("RTL8139: IntrStatus write(w) val=0x%04x\n", val);  
2003 -#endif 2341 + DEBUG_PRINT(("RTL8139: IntrStatus write(w) val=0x%04x\n", val));
2004 2342
2005 #if 0 2343 #if 0
2006 2344
@@ -2027,9 +2365,7 @@ static uint32_t rtl8139_IntrStatus_read(RTL8139State *s) @@ -2027,9 +2365,7 @@ static uint32_t rtl8139_IntrStatus_read(RTL8139State *s)
2027 { 2365 {
2028 uint32_t ret = s->IntrStatus; 2366 uint32_t ret = s->IntrStatus;
2029 2367
2030 -#ifdef DEBUG_RTL8139  
2031 - printf("RTL8139: IntrStatus read(w) val=0x%04x\n", ret);  
2032 -#endif 2368 + DEBUG_PRINT(("RTL8139: IntrStatus read(w) val=0x%04x\n", ret));
2033 2369
2034 #if 0 2370 #if 0
2035 2371
@@ -2045,9 +2381,7 @@ static uint32_t rtl8139_IntrStatus_read(RTL8139State *s) @@ -2045,9 +2381,7 @@ static uint32_t rtl8139_IntrStatus_read(RTL8139State *s)
2045 2381
2046 static void rtl8139_MultiIntr_write(RTL8139State *s, uint32_t val) 2382 static void rtl8139_MultiIntr_write(RTL8139State *s, uint32_t val)
2047 { 2383 {
2048 -#ifdef DEBUG_RTL8139  
2049 - printf("RTL8139: MultiIntr write(w) val=0x%04x\n", val);  
2050 -#endif 2384 + DEBUG_PRINT(("RTL8139: MultiIntr write(w) val=0x%04x\n", val));
2051 2385
2052 /* mask unwriteable bits */ 2386 /* mask unwriteable bits */
2053 val = SET_MASKED(val, 0xf000, s->MultiIntr); 2387 val = SET_MASKED(val, 0xf000, s->MultiIntr);
@@ -2059,9 +2393,7 @@ static uint32_t rtl8139_MultiIntr_read(RTL8139State *s) @@ -2059,9 +2393,7 @@ static uint32_t rtl8139_MultiIntr_read(RTL8139State *s)
2059 { 2393 {
2060 uint32_t ret = s->MultiIntr; 2394 uint32_t ret = s->MultiIntr;
2061 2395
2062 -#ifdef DEBUG_RTL8139  
2063 - printf("RTL8139: MultiIntr read(w) val=0x%04x\n", ret);  
2064 -#endif 2396 + DEBUG_PRINT(("RTL8139: MultiIntr read(w) val=0x%04x\n", ret));
2065 2397
2066 return ret; 2398 return ret;
2067 } 2399 }
@@ -2109,15 +2441,11 @@ static void rtl8139_io_writeb(void *opaque, uint8_t addr, uint32_t val) @@ -2109,15 +2441,11 @@ static void rtl8139_io_writeb(void *opaque, uint8_t addr, uint32_t val)
2109 break; 2441 break;
2110 case MediaStatus: 2442 case MediaStatus:
2111 /* ignore */ 2443 /* ignore */
2112 -#ifdef DEBUG_RTL8139  
2113 - printf("RTL8139: not implemented write(b) to MediaStatus val=0x%02x\n", val);  
2114 -#endif 2444 + DEBUG_PRINT(("RTL8139: not implemented write(b) to MediaStatus val=0x%02x\n", val));
2115 break; 2445 break;
2116 2446
2117 case HltClk: 2447 case HltClk:
2118 -#ifdef DEBUG_RTL8139  
2119 - printf("RTL8139: HltClk write val=0x%08x\n", val);  
2120 -#endif 2448 + DEBUG_PRINT(("RTL8139: HltClk write val=0x%08x\n", val));
2121 if (val == 'R') 2449 if (val == 'R')
2122 { 2450 {
2123 s->clock_enabled = 1; 2451 s->clock_enabled = 1;
@@ -2129,37 +2457,27 @@ static void rtl8139_io_writeb(void *opaque, uint8_t addr, uint32_t val) @@ -2129,37 +2457,27 @@ static void rtl8139_io_writeb(void *opaque, uint8_t addr, uint32_t val)
2129 break; 2457 break;
2130 2458
2131 case TxThresh: 2459 case TxThresh:
2132 -#ifdef DEBUG_RTL8139  
2133 - printf("RTL8139C+ TxThresh write(b) val=0x%02x\n", val);  
2134 -#endif 2460 + DEBUG_PRINT(("RTL8139C+ TxThresh write(b) val=0x%02x\n", val));
2135 s->TxThresh = val; 2461 s->TxThresh = val;
2136 break; 2462 break;
2137 2463
2138 case TxPoll: 2464 case TxPoll:
2139 -#ifdef DEBUG_RTL8139  
2140 - printf("RTL8139C+ TxPoll write(b) val=0x%02x\n", val);  
2141 -#endif 2465 + DEBUG_PRINT(("RTL8139C+ TxPoll write(b) val=0x%02x\n", val));
2142 if (val & (1 << 7)) 2466 if (val & (1 << 7))
2143 { 2467 {
2144 -#ifdef DEBUG_RTL8139  
2145 - printf("RTL8139C+ TxPoll high priority transmission (not implemented)\n");  
2146 -#endif 2468 + DEBUG_PRINT(("RTL8139C+ TxPoll high priority transmission (not implemented)\n"));
2147 //rtl8139_cplus_transmit(s); 2469 //rtl8139_cplus_transmit(s);
2148 } 2470 }
2149 if (val & (1 << 6)) 2471 if (val & (1 << 6))
2150 { 2472 {
2151 -#ifdef DEBUG_RTL8139  
2152 - printf("RTL8139C+ TxPoll normal priority transmission\n");  
2153 -#endif 2473 + DEBUG_PRINT(("RTL8139C+ TxPoll normal priority transmission\n"));
2154 rtl8139_cplus_transmit(s); 2474 rtl8139_cplus_transmit(s);
2155 } 2475 }
2156 2476
2157 break; 2477 break;
2158 2478
2159 default: 2479 default:
2160 -#ifdef DEBUG_RTL8139  
2161 - printf("RTL8139: not implemented write(b) addr=0x%x val=0x%02x\n", addr, val);  
2162 -#endif 2480 + DEBUG_PRINT(("RTL8139: not implemented write(b) addr=0x%x val=0x%02x\n", addr, val));
2163 break; 2481 break;
2164 } 2482 }
2165 } 2483 }
@@ -2195,20 +2513,14 @@ static void rtl8139_io_writew(void *opaque, uint8_t addr, uint32_t val) @@ -2195,20 +2513,14 @@ static void rtl8139_io_writew(void *opaque, uint8_t addr, uint32_t val)
2195 rtl8139_BasicModeStatus_write(s, val); 2513 rtl8139_BasicModeStatus_write(s, val);
2196 break; 2514 break;
2197 case NWayAdvert: 2515 case NWayAdvert:
2198 -#ifdef DEBUG_RTL8139  
2199 - printf("RTL8139: NWayAdvert write(w) val=0x%04x\n", val);  
2200 -#endif 2516 + DEBUG_PRINT(("RTL8139: NWayAdvert write(w) val=0x%04x\n", val));
2201 s->NWayAdvert = val; 2517 s->NWayAdvert = val;
2202 break; 2518 break;
2203 case NWayLPAR: 2519 case NWayLPAR:
2204 -#ifdef DEBUG_RTL8139  
2205 - printf("RTL8139: forbidden NWayLPAR write(w) val=0x%04x\n", val);  
2206 -#endif 2520 + DEBUG_PRINT(("RTL8139: forbidden NWayLPAR write(w) val=0x%04x\n", val));
2207 break; 2521 break;
2208 case NWayExpansion: 2522 case NWayExpansion:
2209 -#ifdef DEBUG_RTL8139  
2210 - printf("RTL8139: NWayExpansion write(w) val=0x%04x\n", val);  
2211 -#endif 2523 + DEBUG_PRINT(("RTL8139: NWayExpansion write(w) val=0x%04x\n", val));
2212 s->NWayExpansion = val; 2524 s->NWayExpansion = val;
2213 break; 2525 break;
2214 2526
@@ -2216,10 +2528,12 @@ static void rtl8139_io_writew(void *opaque, uint8_t addr, uint32_t val) @@ -2216,10 +2528,12 @@ static void rtl8139_io_writew(void *opaque, uint8_t addr, uint32_t val)
2216 rtl8139_CpCmd_write(s, val); 2528 rtl8139_CpCmd_write(s, val);
2217 break; 2529 break;
2218 2530
  2531 + case IntrMitigate:
  2532 + rtl8139_IntrMitigate_write(s, val);
  2533 + break;
  2534 +
2219 default: 2535 default:
2220 -#ifdef DEBUG_RTL8139  
2221 - printf("RTL8139: ioport write(w) addr=0x%x val=0x%04x via write(b)\n", addr, val);  
2222 -#endif 2536 + DEBUG_PRINT(("RTL8139: ioport write(w) addr=0x%x val=0x%04x via write(b)\n", addr, val));
2223 2537
2224 #ifdef TARGET_WORDS_BIGENDIAN 2538 #ifdef TARGET_WORDS_BIGENDIAN
2225 rtl8139_io_writeb(opaque, addr, (val >> 8) & 0xff); 2539 rtl8139_io_writeb(opaque, addr, (val >> 8) & 0xff);
@@ -2241,9 +2555,7 @@ static void rtl8139_io_writel(void *opaque, uint8_t addr, uint32_t val) @@ -2241,9 +2555,7 @@ static void rtl8139_io_writel(void *opaque, uint8_t addr, uint32_t val)
2241 switch (addr) 2555 switch (addr)
2242 { 2556 {
2243 case RxMissed: 2557 case RxMissed:
2244 -#ifdef DEBUG_RTL8139  
2245 - printf("RTL8139: RxMissed clearing on write\n");  
2246 -#endif 2558 + DEBUG_PRINT(("RTL8139: RxMissed clearing on write\n"));
2247 s->RxMissed = 0; 2559 s->RxMissed = 0;
2248 break; 2560 break;
2249 2561
@@ -2268,23 +2580,28 @@ static void rtl8139_io_writel(void *opaque, uint8_t addr, uint32_t val) @@ -2268,23 +2580,28 @@ static void rtl8139_io_writel(void *opaque, uint8_t addr, uint32_t val)
2268 break; 2580 break;
2269 2581
2270 case RxRingAddrLO: 2582 case RxRingAddrLO:
2271 -#ifdef DEBUG_RTL8139  
2272 - printf("RTL8139: C+ RxRing low bits write val=0x%08x\n", val);  
2273 -#endif 2583 + DEBUG_PRINT(("RTL8139: C+ RxRing low bits write val=0x%08x\n", val));
2274 s->RxRingAddrLO = val; 2584 s->RxRingAddrLO = val;
2275 break; 2585 break;
2276 2586
2277 case RxRingAddrHI: 2587 case RxRingAddrHI:
2278 -#ifdef DEBUG_RTL8139  
2279 - printf("RTL8139: C+ RxRing high bits write val=0x%08x\n", val);  
2280 -#endif 2588 + DEBUG_PRINT(("RTL8139: C+ RxRing high bits write val=0x%08x\n", val));
2281 s->RxRingAddrHI = val; 2589 s->RxRingAddrHI = val;
2282 break; 2590 break;
2283 2591
  2592 + case Timer:
  2593 + DEBUG_PRINT(("RTL8139: TCTR Timer reset on write\n"));
  2594 + s->TCTR = 0;
  2595 + s->TCTR_base = qemu_get_clock(vm_clock);
  2596 + break;
  2597 +
  2598 + case FlashReg:
  2599 + DEBUG_PRINT(("RTL8139: FlashReg TimerInt write val=0x%08x\n", val));
  2600 + s->TimerInt = val;
  2601 + break;
  2602 +
2284 default: 2603 default:
2285 -#ifdef DEBUG_RTL8139  
2286 - printf("RTL8139: ioport write(l) addr=0x%x val=0x%08x via write(b)\n", addr, val);  
2287 -#endif 2604 + DEBUG_PRINT(("RTL8139: ioport write(l) addr=0x%x val=0x%08x via write(b)\n", addr, val));
2288 #ifdef TARGET_WORDS_BIGENDIAN 2605 #ifdef TARGET_WORDS_BIGENDIAN
2289 rtl8139_io_writeb(opaque, addr, (val >> 24) & 0xff); 2606 rtl8139_io_writeb(opaque, addr, (val >> 24) & 0xff);
2290 rtl8139_io_writeb(opaque, addr + 1, (val >> 16) & 0xff); 2607 rtl8139_io_writeb(opaque, addr + 1, (val >> 16) & 0xff);
@@ -2342,43 +2659,31 @@ static uint32_t rtl8139_io_readb(void *opaque, uint8_t addr) @@ -2342,43 +2659,31 @@ static uint32_t rtl8139_io_readb(void *opaque, uint8_t addr)
2342 2659
2343 case MediaStatus: 2660 case MediaStatus:
2344 ret = 0xd0; 2661 ret = 0xd0;
2345 -#ifdef DEBUG_RTL8139  
2346 - printf("RTL8139: MediaStatus read 0x%x\n", ret);  
2347 -#endif 2662 + DEBUG_PRINT(("RTL8139: MediaStatus read 0x%x\n", ret));
2348 break; 2663 break;
2349 2664
2350 case HltClk: 2665 case HltClk:
2351 ret = s->clock_enabled; 2666 ret = s->clock_enabled;
2352 -#ifdef DEBUG_RTL8139  
2353 - printf("RTL8139: HltClk read 0x%x\n", ret);  
2354 -#endif 2667 + DEBUG_PRINT(("RTL8139: HltClk read 0x%x\n", ret));
2355 break; 2668 break;
2356 2669
2357 case PCIRevisionID: 2670 case PCIRevisionID:
2358 - ret = 0x10;  
2359 -#ifdef DEBUG_RTL8139  
2360 - printf("RTL8139: PCI Revision ID read 0x%x\n", ret);  
2361 -#endif 2671 + ret = RTL8139_PCI_REVID;
  2672 + DEBUG_PRINT(("RTL8139: PCI Revision ID read 0x%x\n", ret));
2362 break; 2673 break;
2363 2674
2364 case TxThresh: 2675 case TxThresh:
2365 ret = s->TxThresh; 2676 ret = s->TxThresh;
2366 -#ifdef DEBUG_RTL8139  
2367 - printf("RTL8139C+ TxThresh read(b) val=0x%02x\n", ret);  
2368 -#endif 2677 + DEBUG_PRINT(("RTL8139C+ TxThresh read(b) val=0x%02x\n", ret));
2369 break; 2678 break;
2370 2679
2371 case 0x43: /* Part of TxConfig register. Windows driver tries to read it */ 2680 case 0x43: /* Part of TxConfig register. Windows driver tries to read it */
2372 ret = s->TxConfig >> 24; 2681 ret = s->TxConfig >> 24;
2373 -#ifdef DEBUG_RTL8139  
2374 - printf("RTL8139C TxConfig at 0x43 read(b) val=0x%02x\n", ret);  
2375 -#endif 2682 + DEBUG_PRINT(("RTL8139C TxConfig at 0x43 read(b) val=0x%02x\n", ret));
2376 break; 2683 break;
2377 2684
2378 default: 2685 default:
2379 -#ifdef DEBUG_RTL8139  
2380 - printf("RTL8139: not implemented read(b) addr=0x%x\n", addr);  
2381 -#endif 2686 + DEBUG_PRINT(("RTL8139: not implemented read(b) addr=0x%x\n", addr));
2382 ret = 0; 2687 ret = 0;
2383 break; 2688 break;
2384 } 2689 }
@@ -2411,6 +2716,10 @@ static uint32_t rtl8139_io_readw(void *opaque, uint8_t addr) @@ -2411,6 +2716,10 @@ static uint32_t rtl8139_io_readw(void *opaque, uint8_t addr)
2411 ret = rtl8139_RxBufPtr_read(s); 2716 ret = rtl8139_RxBufPtr_read(s);
2412 break; 2717 break;
2413 2718
  2719 + case RxBufAddr:
  2720 + ret = rtl8139_RxBufAddr_read(s);
  2721 + break;
  2722 +
2414 case BasicModeCtrl: 2723 case BasicModeCtrl:
2415 ret = rtl8139_BasicModeCtrl_read(s); 2724 ret = rtl8139_BasicModeCtrl_read(s);
2416 break; 2725 break;
@@ -2419,27 +2728,25 @@ static uint32_t rtl8139_io_readw(void *opaque, uint8_t addr) @@ -2419,27 +2728,25 @@ static uint32_t rtl8139_io_readw(void *opaque, uint8_t addr)
2419 break; 2728 break;
2420 case NWayAdvert: 2729 case NWayAdvert:
2421 ret = s->NWayAdvert; 2730 ret = s->NWayAdvert;
2422 -#ifdef DEBUG_RTL8139  
2423 - printf("RTL8139: NWayAdvert read(w) val=0x%04x\n", ret);  
2424 -#endif 2731 + DEBUG_PRINT(("RTL8139: NWayAdvert read(w) val=0x%04x\n", ret));
2425 break; 2732 break;
2426 case NWayLPAR: 2733 case NWayLPAR:
2427 ret = s->NWayLPAR; 2734 ret = s->NWayLPAR;
2428 -#ifdef DEBUG_RTL8139  
2429 - printf("RTL8139: NWayLPAR read(w) val=0x%04x\n", ret);  
2430 -#endif 2735 + DEBUG_PRINT(("RTL8139: NWayLPAR read(w) val=0x%04x\n", ret));
2431 break; 2736 break;
2432 case NWayExpansion: 2737 case NWayExpansion:
2433 ret = s->NWayExpansion; 2738 ret = s->NWayExpansion;
2434 -#ifdef DEBUG_RTL8139  
2435 - printf("RTL8139: NWayExpansion read(w) val=0x%04x\n", ret);  
2436 -#endif 2739 + DEBUG_PRINT(("RTL8139: NWayExpansion read(w) val=0x%04x\n", ret));
2437 break; 2740 break;
2438 2741
2439 case CpCmd: 2742 case CpCmd:
2440 ret = rtl8139_CpCmd_read(s); 2743 ret = rtl8139_CpCmd_read(s);
2441 break; 2744 break;
2442 2745
  2746 + case IntrMitigate:
  2747 + ret = rtl8139_IntrMitigate_read(s);
  2748 + break;
  2749 +
2443 case TxSummary: 2750 case TxSummary:
2444 ret = rtl8139_TSAD_read(s); 2751 ret = rtl8139_TSAD_read(s);
2445 break; 2752 break;
@@ -2449,9 +2756,7 @@ static uint32_t rtl8139_io_readw(void *opaque, uint8_t addr) @@ -2449,9 +2756,7 @@ static uint32_t rtl8139_io_readw(void *opaque, uint8_t addr)
2449 break; 2756 break;
2450 2757
2451 default: 2758 default:
2452 -#ifdef DEBUG_RTL8139  
2453 - printf("RTL8139: ioport read(w) addr=0x%x via read(b)\n", addr);  
2454 -#endif 2759 + DEBUG_PRINT(("RTL8139: ioport read(w) addr=0x%x via read(b)\n", addr));
2455 2760
2456 #ifdef TARGET_WORDS_BIGENDIAN 2761 #ifdef TARGET_WORDS_BIGENDIAN
2457 ret = rtl8139_io_readb(opaque, addr) << 8; 2762 ret = rtl8139_io_readb(opaque, addr) << 8;
@@ -2461,9 +2766,7 @@ static uint32_t rtl8139_io_readw(void *opaque, uint8_t addr) @@ -2461,9 +2766,7 @@ static uint32_t rtl8139_io_readw(void *opaque, uint8_t addr)
2461 ret |= rtl8139_io_readb(opaque, addr + 1) << 8; 2766 ret |= rtl8139_io_readb(opaque, addr + 1) << 8;
2462 #endif 2767 #endif
2463 2768
2464 -#ifdef DEBUG_RTL8139  
2465 - printf("RTL8139: ioport read(w) addr=0x%x val=0x%04x\n", addr, ret);  
2466 -#endif 2769 + DEBUG_PRINT(("RTL8139: ioport read(w) addr=0x%x val=0x%04x\n", addr, ret));
2467 break; 2770 break;
2468 } 2771 }
2469 2772
@@ -2482,9 +2785,7 @@ static uint32_t rtl8139_io_readl(void *opaque, uint8_t addr) @@ -2482,9 +2785,7 @@ static uint32_t rtl8139_io_readl(void *opaque, uint8_t addr)
2482 case RxMissed: 2785 case RxMissed:
2483 ret = s->RxMissed; 2786 ret = s->RxMissed;
2484 2787
2485 -#ifdef DEBUG_RTL8139  
2486 - printf("RTL8139: RxMissed read val=0x%08x\n", ret);  
2487 -#endif 2788 + DEBUG_PRINT(("RTL8139: RxMissed read val=0x%08x\n", ret));
2488 break; 2789 break;
2489 2790
2490 case TxConfig: 2791 case TxConfig:
@@ -2509,22 +2810,26 @@ static uint32_t rtl8139_io_readl(void *opaque, uint8_t addr) @@ -2509,22 +2810,26 @@ static uint32_t rtl8139_io_readl(void *opaque, uint8_t addr)
2509 2810
2510 case RxRingAddrLO: 2811 case RxRingAddrLO:
2511 ret = s->RxRingAddrLO; 2812 ret = s->RxRingAddrLO;
2512 -#ifdef DEBUG_RTL8139  
2513 - printf("RTL8139: C+ RxRing low bits read val=0x%08x\n", ret);  
2514 -#endif 2813 + DEBUG_PRINT(("RTL8139: C+ RxRing low bits read val=0x%08x\n", ret));
2515 break; 2814 break;
2516 2815
2517 case RxRingAddrHI: 2816 case RxRingAddrHI:
2518 ret = s->RxRingAddrHI; 2817 ret = s->RxRingAddrHI;
2519 -#ifdef DEBUG_RTL8139  
2520 - printf("RTL8139: C+ RxRing high bits read val=0x%08x\n", ret);  
2521 -#endif 2818 + DEBUG_PRINT(("RTL8139: C+ RxRing high bits read val=0x%08x\n", ret));
  2819 + break;
  2820 +
  2821 + case Timer:
  2822 + ret = s->TCTR;
  2823 + DEBUG_PRINT(("RTL8139: TCTR Timer read val=0x%08x\n", ret));
  2824 + break;
  2825 +
  2826 + case FlashReg:
  2827 + ret = s->TimerInt;
  2828 + DEBUG_PRINT(("RTL8139: FlashReg TimerInt read val=0x%08x\n", ret));
2522 break; 2829 break;
2523 2830
2524 default: 2831 default:
2525 -#ifdef DEBUG_RTL8139  
2526 - printf("RTL8139: ioport read(l) addr=0x%x via read(b)\n", addr);  
2527 -#endif 2832 + DEBUG_PRINT(("RTL8139: ioport read(l) addr=0x%x via read(b)\n", addr));
2528 2833
2529 #ifdef TARGET_WORDS_BIGENDIAN 2834 #ifdef TARGET_WORDS_BIGENDIAN
2530 ret = rtl8139_io_readb(opaque, addr) << 24; 2835 ret = rtl8139_io_readb(opaque, addr) << 24;
@@ -2538,9 +2843,7 @@ static uint32_t rtl8139_io_readl(void *opaque, uint8_t addr) @@ -2538,9 +2843,7 @@ static uint32_t rtl8139_io_readl(void *opaque, uint8_t addr)
2538 ret |= rtl8139_io_readb(opaque, addr + 3) << 24; 2843 ret |= rtl8139_io_readb(opaque, addr + 3) << 24;
2539 #endif 2844 #endif
2540 2845
2541 -#ifdef DEBUG_RTL8139  
2542 - printf("RTL8139: read(l) addr=0x%x val=%08x\n", addr, ret);  
2543 -#endif 2846 + DEBUG_PRINT(("RTL8139: read(l) addr=0x%x val=%08x\n", addr, ret));
2544 break; 2847 break;
2545 } 2848 }
2546 2849
@@ -2688,6 +2991,12 @@ static void rtl8139_save(QEMUFile* f,void* opaque) @@ -2688,6 +2991,12 @@ static void rtl8139_save(QEMUFile* f,void* opaque)
2688 qemu_put_8s(f, &s->eeprom.eesk); 2991 qemu_put_8s(f, &s->eeprom.eesk);
2689 qemu_put_8s(f, &s->eeprom.eedi); 2992 qemu_put_8s(f, &s->eeprom.eedi);
2690 qemu_put_8s(f, &s->eeprom.eedo); 2993 qemu_put_8s(f, &s->eeprom.eedo);
  2994 +
  2995 + qemu_put_be32s(f, &s->TCTR);
  2996 + qemu_put_be32s(f, &s->TimerInt);
  2997 + qemu_put_be64s(f, &s->TCTR_base);
  2998 +
  2999 + RTL8139TallyCounters_save(f, &s->tally_counters);
2691 } 3000 }
2692 3001
2693 static int rtl8139_load(QEMUFile* f,void* opaque,int version_id) 3002 static int rtl8139_load(QEMUFile* f,void* opaque,int version_id)
@@ -2695,9 +3004,11 @@ static int rtl8139_load(QEMUFile* f,void* opaque,int version_id) @@ -2695,9 +3004,11 @@ static int rtl8139_load(QEMUFile* f,void* opaque,int version_id)
2695 RTL8139State* s=(RTL8139State*)opaque; 3004 RTL8139State* s=(RTL8139State*)opaque;
2696 int i; 3005 int i;
2697 3006
2698 - if (version_id != 1) 3007 + /* just 2 versions for now */
  3008 + if (version_id > 2)
2699 return -EINVAL; 3009 return -EINVAL;
2700 3010
  3011 + /* saved since version 1 */
2701 qemu_get_buffer(f, s->phys, 6); 3012 qemu_get_buffer(f, s->phys, 6);
2702 qemu_get_buffer(f, s->mult, 8); 3013 qemu_get_buffer(f, s->mult, 8);
2703 3014
@@ -2769,6 +3080,25 @@ static int rtl8139_load(QEMUFile* f,void* opaque,int version_id) @@ -2769,6 +3080,25 @@ static int rtl8139_load(QEMUFile* f,void* opaque,int version_id)
2769 qemu_get_8s(f, &s->eeprom.eedi); 3080 qemu_get_8s(f, &s->eeprom.eedi);
2770 qemu_get_8s(f, &s->eeprom.eedo); 3081 qemu_get_8s(f, &s->eeprom.eedo);
2771 3082
  3083 + /* saved since version 2 */
  3084 + if (version_id >= 2)
  3085 + {
  3086 + qemu_get_be32s(f, &s->TCTR);
  3087 + qemu_get_be32s(f, &s->TimerInt);
  3088 + qemu_get_be64s(f, &s->TCTR_base);
  3089 +
  3090 + RTL8139TallyCounters_load(f, &s->tally_counters);
  3091 + }
  3092 + else
  3093 + {
  3094 + /* not saved, use default */
  3095 + s->TCTR = 0;
  3096 + s->TimerInt = 0;
  3097 + s->TCTR_base = 0;
  3098 +
  3099 + RTL8139TallyCounters_clear(&s->tally_counters);
  3100 + }
  3101 +
2772 return 0; 3102 return 0;
2773 } 3103 }
2774 3104
@@ -2817,6 +3147,59 @@ static CPUWriteMemoryFunc *rtl8139_mmio_write[3] = { @@ -2817,6 +3147,59 @@ static CPUWriteMemoryFunc *rtl8139_mmio_write[3] = {
2817 rtl8139_mmio_writel, 3147 rtl8139_mmio_writel,
2818 }; 3148 };
2819 3149
  3150 +static inline int64_t rtl8139_get_next_tctr_time(RTL8139State *s, int64_t current_time)
  3151 +{
  3152 + int64_t next_time = current_time +
  3153 + muldiv64(1, ticks_per_sec, PCI_FREQUENCY);
  3154 + if (next_time <= current_time)
  3155 + next_time = current_time + 1;
  3156 + return next_time;
  3157 +}
  3158 +
  3159 +#if RTL8139_ONBOARD_TIMER
  3160 +static void rtl8139_timer(void *opaque)
  3161 +{
  3162 + RTL8139State *s = opaque;
  3163 +
  3164 + int is_timeout = 0;
  3165 +
  3166 + int64_t curr_time;
  3167 + uint32_t curr_tick;
  3168 +
  3169 + if (!s->clock_enabled)
  3170 + {
  3171 + DEBUG_PRINT(("RTL8139: >>> timer: clock is not running\n"));
  3172 + return;
  3173 + }
  3174 +
  3175 + curr_time = qemu_get_clock(vm_clock);
  3176 +
  3177 + curr_tick = muldiv64(curr_time - s->TCTR_base, PCI_FREQUENCY, ticks_per_sec);
  3178 +
  3179 + if (s->TimerInt && curr_tick >= s->TimerInt)
  3180 + {
  3181 + if (s->TCTR < s->TimerInt || curr_tick < s->TCTR)
  3182 + {
  3183 + is_timeout = 1;
  3184 + }
  3185 + }
  3186 +
  3187 + s->TCTR = curr_tick;
  3188 +
  3189 +// DEBUG_PRINT(("RTL8139: >>> timer: tick=%08u\n", s->TCTR));
  3190 +
  3191 + if (is_timeout)
  3192 + {
  3193 + DEBUG_PRINT(("RTL8139: >>> timer: timeout tick=%08u\n", s->TCTR));
  3194 + s->IntrStatus |= PCSTimeout;
  3195 + rtl8139_update_irq(s);
  3196 + }
  3197 +
  3198 + qemu_mod_timer(s->timer,
  3199 + rtl8139_get_next_tctr_time(s,curr_time));
  3200 +}
  3201 +#endif /* RTL8139_ONBOARD_TIMER */
  3202 +
2820 void pci_rtl8139_init(PCIBus *bus, NICInfo *nd) 3203 void pci_rtl8139_init(PCIBus *bus, NICInfo *nd)
2821 { 3204 {
2822 PCIRTL8139State *d; 3205 PCIRTL8139State *d;
@@ -2833,7 +3216,7 @@ void pci_rtl8139_init(PCIBus *bus, NICInfo *nd) @@ -2833,7 +3216,7 @@ void pci_rtl8139_init(PCIBus *bus, NICInfo *nd)
2833 pci_conf[0x02] = 0x39; 3216 pci_conf[0x02] = 0x39;
2834 pci_conf[0x03] = 0x81; 3217 pci_conf[0x03] = 0x81;
2835 pci_conf[0x04] = 0x05; /* command = I/O space, Bus Master */ 3218 pci_conf[0x04] = 0x05; /* command = I/O space, Bus Master */
2836 - pci_conf[0x08] = 0x10; /* 0x10 */ /* PCI revision ID; >=0x20 is for 8139C+ */ 3219 + pci_conf[0x08] = RTL8139_PCI_REVID; /* PCI revision ID; >=0x20 is for 8139C+ */
2837 pci_conf[0x0a] = 0x00; /* ethernet network controller */ 3220 pci_conf[0x0a] = 0x00; /* ethernet network controller */
2838 pci_conf[0x0b] = 0x02; 3221 pci_conf[0x0b] = 0x02;
2839 pci_conf[0x0e] = 0x00; /* header_type */ 3222 pci_conf[0x0e] = 0x00; /* header_type */
@@ -2867,9 +3250,21 @@ void pci_rtl8139_init(PCIBus *bus, NICInfo *nd) @@ -2867,9 +3250,21 @@ void pci_rtl8139_init(PCIBus *bus, NICInfo *nd)
2867 s->macaddr[3], 3250 s->macaddr[3],
2868 s->macaddr[4], 3251 s->macaddr[4],
2869 s->macaddr[5]); 3252 s->macaddr[5]);
  3253 +
  3254 + s->cplus_txbuffer = NULL;
  3255 + s->cplus_txbuffer_len = 0;
  3256 + s->cplus_txbuffer_offset = 0;
2870 3257
2871 /* XXX: instance number ? */ 3258 /* XXX: instance number ? */
2872 - register_savevm("rtl8139", 0, 1, rtl8139_save, rtl8139_load, s); 3259 + register_savevm("rtl8139", 0, 2, rtl8139_save, rtl8139_load, s);
2873 register_savevm("rtl8139_pci", 0, 1, generic_pci_save, generic_pci_load, 3260 register_savevm("rtl8139_pci", 0, 1, generic_pci_save, generic_pci_load,
2874 &d->dev); 3261 &d->dev);
  3262 +
  3263 +#if RTL8139_ONBOARD_TIMER
  3264 + s->timer = qemu_new_timer(vm_clock, rtl8139_timer, s);
  3265 +
  3266 + qemu_mod_timer(s->timer,
  3267 + rtl8139_get_next_tctr_time(s,qemu_get_clock(vm_clock)));
  3268 +#endif /* RTL8139_ONBOARD_TIMER */
2875 } 3269 }
  3270 +