gwj / at91sam9263 · Commits

Commit 6c95676b16dcabd69ad9a57c0a9ec4878d3d0e3d

Authored by balrog
1 parent 6f9bc132

Store the right TCG temp (typo). 

Stops ARMv6 target from segfaulting early.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4201 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 2 changed files with 3 additions and 3 deletions
target-arm/helper.c
  View file @6c95676
... ... @@ -675,7 +675,7 @@ void do_interrupt_v7m(CPUARMState *env)
675 675 env->regs[13] += 4;
676 676 xpsr |= 0x200;
677 677 }
678   - /* Switch to the hander mode. */
  678 + /* Switch to the handler mode. */
679 679 v7m_push(env, xpsr);
680 680 v7m_push(env, env->regs[15]);
681 681 v7m_push(env, env->regs[14]);
... ...
target-arm/translate.c
  View file @6c95676
... ... @@ -6372,7 +6372,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
6372 6372 break;
6373 6373 case 1:
6374 6374 if ((insn & 0x00700020) == 0) {
6375   - /* Hafword pack. */
  6375 + /* Halfword pack. */
6376 6376 tmp = load_reg(s, rn);
6377 6377 tmp2 = load_reg(s, rm);
6378 6378 shift = (insn >> 7) & 0x1f;
... ... @@ -6455,7 +6455,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
6455 6455 dead_tmp(tmp2);
6456 6456 }
6457 6457 }
6458   - store_reg(s, rd, tmp2);
  6458 + store_reg(s, rd, tmp);
6459 6459 } else if ((insn & 0x003f0f60) == 0x003f0f20) {
6460 6460 /* rev */
6461 6461 tmp = load_reg(s, rm);
... ...