Commit 6b542af760f44409b40441225fbef31a3b4bdbe1
1 parent
69facb78
Fix incorrect debug prints (reported by Paul Brook).
Remove obsolete / duplicated debug prints and improve output consistency. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3725 c046a42c-6fe2-441c-8c8c-71466251a162
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96 additions
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102 deletions
target-ppc/cpu.h
| @@ -30,7 +30,6 @@ | @@ -30,7 +30,6 @@ | ||
| 30 | typedef uint64_t ppc_gpr_t; | 30 | typedef uint64_t ppc_gpr_t; |
| 31 | #define TARGET_GPR_BITS 64 | 31 | #define TARGET_GPR_BITS 64 |
| 32 | #define TARGET_LONG_BITS 64 | 32 | #define TARGET_LONG_BITS 64 |
| 33 | -#define REGX "%016" PRIx64 | ||
| 34 | #define TARGET_PAGE_BITS 12 | 33 | #define TARGET_PAGE_BITS 12 |
| 35 | 34 | ||
| 36 | #else /* defined (TARGET_PPC64) */ | 35 | #else /* defined (TARGET_PPC64) */ |
| @@ -43,11 +42,9 @@ typedef uint64_t ppc_gpr_t; | @@ -43,11 +42,9 @@ typedef uint64_t ppc_gpr_t; | ||
| 43 | */ | 42 | */ |
| 44 | typedef uint64_t ppc_gpr_t; | 43 | typedef uint64_t ppc_gpr_t; |
| 45 | #define TARGET_GPR_BITS 64 | 44 | #define TARGET_GPR_BITS 64 |
| 46 | -#define REGX "%08" PRIx64 | ||
| 47 | #else /* (HOST_LONG_BITS >= 64) */ | 45 | #else /* (HOST_LONG_BITS >= 64) */ |
| 48 | typedef uint32_t ppc_gpr_t; | 46 | typedef uint32_t ppc_gpr_t; |
| 49 | #define TARGET_GPR_BITS 32 | 47 | #define TARGET_GPR_BITS 32 |
| 50 | -#define REGX "%08" PRIx32 | ||
| 51 | #endif /* (HOST_LONG_BITS >= 64) */ | 48 | #endif /* (HOST_LONG_BITS >= 64) */ |
| 52 | 49 | ||
| 53 | #define TARGET_LONG_BITS 32 | 50 | #define TARGET_LONG_BITS 32 |
| @@ -74,6 +71,7 @@ typedef uint32_t ppc_gpr_t; | @@ -74,6 +71,7 @@ typedef uint32_t ppc_gpr_t; | ||
| 74 | 71 | ||
| 75 | #include "cpu-defs.h" | 72 | #include "cpu-defs.h" |
| 76 | 73 | ||
| 74 | +#define REGX "%016" PRIx64 | ||
| 77 | #define ADDRX TARGET_FMT_lx | 75 | #define ADDRX TARGET_FMT_lx |
| 78 | #define PADDRX TARGET_FMT_plx | 76 | #define PADDRX TARGET_FMT_plx |
| 79 | 77 | ||
| @@ -792,6 +790,24 @@ int ppcemb_tlb_search (CPUPPCState *env, target_ulong address, uint32_t pid); | @@ -792,6 +790,24 @@ int ppcemb_tlb_search (CPUPPCState *env, target_ulong address, uint32_t pid); | ||
| 792 | #endif | 790 | #endif |
| 793 | #endif | 791 | #endif |
| 794 | 792 | ||
| 793 | +static always_inline uint64_t ppc_dump_gpr (CPUPPCState *env, int gprn) | ||
| 794 | +{ | ||
| 795 | + uint64_t gprv; | ||
| 796 | + | ||
| 797 | + gprv = env->gpr[gprn]; | ||
| 798 | +#if !defined(TARGET_PPC64) | ||
| 799 | + if (env->flags & POWERPC_FLAG_SPE) { | ||
| 800 | + /* If the CPU implements the SPE extension, we have to get the | ||
| 801 | + * high bits of the GPR from the gprh storage area | ||
| 802 | + */ | ||
| 803 | + gprv &= 0xFFFFFFFFULL; | ||
| 804 | + gprv |= (uint64_t)env->gprh[gprn] << 32; | ||
| 805 | + } | ||
| 806 | +#endif | ||
| 807 | + | ||
| 808 | + return gprv; | ||
| 809 | +} | ||
| 810 | + | ||
| 795 | /* Device control registers */ | 811 | /* Device control registers */ |
| 796 | int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp); | 812 | int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp); |
| 797 | int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val); | 813 | int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val); |
target-ppc/exec.h
| @@ -37,10 +37,12 @@ register struct CPUPPCState *env asm(AREG0); | @@ -37,10 +37,12 @@ register struct CPUPPCState *env asm(AREG0); | ||
| 37 | #define T0 (env->t0) | 37 | #define T0 (env->t0) |
| 38 | #define T1 (env->t1) | 38 | #define T1 (env->t1) |
| 39 | #define T2 (env->t2) | 39 | #define T2 (env->t2) |
| 40 | +#define TDX "%016" PRIx64 | ||
| 40 | #else | 41 | #else |
| 41 | register unsigned long T0 asm(AREG1); | 42 | register unsigned long T0 asm(AREG1); |
| 42 | register unsigned long T1 asm(AREG2); | 43 | register unsigned long T1 asm(AREG2); |
| 43 | register unsigned long T2 asm(AREG3); | 44 | register unsigned long T2 asm(AREG3); |
| 45 | +#define TDX "%016lx" | ||
| 44 | #endif | 46 | #endif |
| 45 | /* We may, sometime, need 64 bits registers on 32 bits targets */ | 47 | /* We may, sometime, need 64 bits registers on 32 bits targets */ |
| 46 | #if (HOST_LONG_BITS == 32) | 48 | #if (HOST_LONG_BITS == 32) |
target-ppc/helper.c
| @@ -31,6 +31,7 @@ | @@ -31,6 +31,7 @@ | ||
| 31 | 31 | ||
| 32 | //#define DEBUG_MMU | 32 | //#define DEBUG_MMU |
| 33 | //#define DEBUG_BATS | 33 | //#define DEBUG_BATS |
| 34 | +//#define DEBUG_SLB | ||
| 34 | //#define DEBUG_SOFTWARE_TLB | 35 | //#define DEBUG_SOFTWARE_TLB |
| 35 | //#define DUMP_PAGE_TABLES | 36 | //#define DUMP_PAGE_TABLES |
| 36 | //#define DEBUG_EXCEPTIONS | 37 | //#define DEBUG_EXCEPTIONS |
| @@ -436,7 +437,7 @@ static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx, | @@ -436,7 +437,7 @@ static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx, | ||
| 436 | done: | 437 | done: |
| 437 | #if defined (DEBUG_SOFTWARE_TLB) | 438 | #if defined (DEBUG_SOFTWARE_TLB) |
| 438 | if (loglevel != 0) { | 439 | if (loglevel != 0) { |
| 439 | - fprintf(logfile, "found TLB at addr 0x%08lx prot=0x%01x ret=%d\n", | 440 | + fprintf(logfile, "found TLB at addr " PADDRX " prot=%01x ret=%d\n", |
| 440 | ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret); | 441 | ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret); |
| 441 | } | 442 | } |
| 442 | #endif | 443 | #endif |
| @@ -484,8 +485,8 @@ static always_inline void bat_601_size_prot (CPUState *env,target_ulong *blp, | @@ -484,8 +485,8 @@ static always_inline void bat_601_size_prot (CPUState *env,target_ulong *blp, | ||
| 484 | bl = (*BATl & 0x0000003F) << 17; | 485 | bl = (*BATl & 0x0000003F) << 17; |
| 485 | #if defined (DEBUG_BATS) | 486 | #if defined (DEBUG_BATS) |
| 486 | if (loglevel != 0) { | 487 | if (loglevel != 0) { |
| 487 | - fprintf(logfile, "b %02x ==> bl %08x msk %08x\n", | ||
| 488 | - *BATl & 0x0000003F, bl, ~bl); | 488 | + fprintf(logfile, "b %02x ==> bl " ADDRX " msk " ADDRX "\n", |
| 489 | + (uint8_t)(*BATl & 0x0000003F), bl, ~bl); | ||
| 489 | } | 490 | } |
| 490 | #endif | 491 | #endif |
| 491 | prot = 0; | 492 | prot = 0; |
| @@ -513,7 +514,7 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, | @@ -513,7 +514,7 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, | ||
| 513 | 514 | ||
| 514 | #if defined (DEBUG_BATS) | 515 | #if defined (DEBUG_BATS) |
| 515 | if (loglevel != 0) { | 516 | if (loglevel != 0) { |
| 516 | - fprintf(logfile, "%s: %cBAT v 0x" ADDRX "\n", __func__, | 517 | + fprintf(logfile, "%s: %cBAT v " ADDRX "\n", __func__, |
| 517 | type == ACCESS_CODE ? 'I' : 'D', virtual); | 518 | type == ACCESS_CODE ? 'I' : 'D', virtual); |
| 518 | } | 519 | } |
| 519 | #endif | 520 | #endif |
| @@ -527,12 +528,6 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, | @@ -527,12 +528,6 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, | ||
| 527 | BATut = env->DBAT[0]; | 528 | BATut = env->DBAT[0]; |
| 528 | break; | 529 | break; |
| 529 | } | 530 | } |
| 530 | -#if defined (DEBUG_BATS) | ||
| 531 | - if (loglevel != 0) { | ||
| 532 | - fprintf(logfile, "%s...: %cBAT v 0x" ADDRX "\n", __func__, | ||
| 533 | - type == ACCESS_CODE ? 'I' : 'D', virtual); | ||
| 534 | - } | ||
| 535 | -#endif | ||
| 536 | base = virtual & 0xFFFC0000; | 531 | base = virtual & 0xFFFC0000; |
| 537 | for (i = 0; i < env->nb_BATs; i++) { | 532 | for (i = 0; i < env->nb_BATs; i++) { |
| 538 | BATu = &BATut[i]; | 533 | BATu = &BATut[i]; |
| @@ -546,10 +541,9 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, | @@ -546,10 +541,9 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, | ||
| 546 | } | 541 | } |
| 547 | #if defined (DEBUG_BATS) | 542 | #if defined (DEBUG_BATS) |
| 548 | if (loglevel != 0) { | 543 | if (loglevel != 0) { |
| 549 | - fprintf(logfile, "%s: %cBAT%d v 0x" ADDRX " BATu 0x" ADDRX | ||
| 550 | - " BATl 0x" ADDRX "\n", | ||
| 551 | - __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual, | ||
| 552 | - *BATu, *BATl); | 544 | + fprintf(logfile, "%s: %cBAT%d v " ADDRX " BATu " ADDRX |
| 545 | + " BATl " ADDRX "\n", __func__, | ||
| 546 | + type == ACCESS_CODE ? 'I' : 'D', i, virtual, *BATu, *BATl); | ||
| 553 | } | 547 | } |
| 554 | #endif | 548 | #endif |
| 555 | if ((virtual & 0xF0000000) == BEPIu && | 549 | if ((virtual & 0xF0000000) == BEPIu && |
| @@ -565,8 +559,7 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, | @@ -565,8 +559,7 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, | ||
| 565 | ret = check_prot(ctx->prot, rw, type); | 559 | ret = check_prot(ctx->prot, rw, type); |
| 566 | #if defined (DEBUG_BATS) | 560 | #if defined (DEBUG_BATS) |
| 567 | if (ret == 0 && loglevel != 0) { | 561 | if (ret == 0 && loglevel != 0) { |
| 568 | - fprintf(logfile, "BAT %d match: r 0x" PADDRX | ||
| 569 | - " prot=%c%c\n", | 562 | + fprintf(logfile, "BAT %d match: r " PADDRX " prot=%c%c\n", |
| 570 | i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-', | 563 | i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-', |
| 571 | ctx->prot & PAGE_WRITE ? 'W' : '-'); | 564 | ctx->prot & PAGE_WRITE ? 'W' : '-'); |
| 572 | } | 565 | } |
| @@ -578,16 +571,15 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, | @@ -578,16 +571,15 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, | ||
| 578 | if (ret < 0) { | 571 | if (ret < 0) { |
| 579 | #if defined (DEBUG_BATS) | 572 | #if defined (DEBUG_BATS) |
| 580 | if (loglevel != 0) { | 573 | if (loglevel != 0) { |
| 581 | - fprintf(logfile, "no BAT match for 0x" ADDRX ":\n", virtual); | 574 | + fprintf(logfile, "no BAT match for " ADDRX ":\n", virtual); |
| 582 | for (i = 0; i < 4; i++) { | 575 | for (i = 0; i < 4; i++) { |
| 583 | BATu = &BATut[i]; | 576 | BATu = &BATut[i]; |
| 584 | BATl = &BATlt[i]; | 577 | BATl = &BATlt[i]; |
| 585 | BEPIu = *BATu & 0xF0000000; | 578 | BEPIu = *BATu & 0xF0000000; |
| 586 | BEPIl = *BATu & 0x0FFE0000; | 579 | BEPIl = *BATu & 0x0FFE0000; |
| 587 | bl = (*BATu & 0x00001FFC) << 15; | 580 | bl = (*BATu & 0x00001FFC) << 15; |
| 588 | - fprintf(logfile, "%s: %cBAT%d v 0x" ADDRX " BATu 0x" ADDRX | ||
| 589 | - " BATl 0x" ADDRX " \n\t" | ||
| 590 | - "0x" ADDRX " 0x" ADDRX " 0x" ADDRX "\n", | 581 | + fprintf(logfile, "%s: %cBAT%d v " ADDRX " BATu " ADDRX |
| 582 | + " BATl " ADDRX " \n\t" ADDRX " " ADDRX " " ADDRX "\n", | ||
| 591 | __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual, | 583 | __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual, |
| 592 | *BATu, *BATl, BEPIu, BEPIl, bl); | 584 | *BATu, *BATl, BEPIu, BEPIl, bl); |
| 593 | } | 585 | } |
| @@ -617,8 +609,8 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h, | @@ -617,8 +609,8 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h, | ||
| 617 | r = pte64_check(ctx, pte0, pte1, h, rw, type); | 609 | r = pte64_check(ctx, pte0, pte1, h, rw, type); |
| 618 | #if defined (DEBUG_MMU) | 610 | #if defined (DEBUG_MMU) |
| 619 | if (loglevel != 0) { | 611 | if (loglevel != 0) { |
| 620 | - fprintf(logfile, "Load pte from 0x" ADDRX " => 0x" ADDRX | ||
| 621 | - " 0x" ADDRX " %d %d %d 0x" ADDRX "\n", | 612 | + fprintf(logfile, "Load pte from " ADDRX " => " ADDRX " " ADDRX |
| 613 | + " %d %d %d " ADDRX "\n", | ||
| 622 | base + (i * 16), pte0, pte1, | 614 | base + (i * 16), pte0, pte1, |
| 623 | (int)(pte0 & 1), h, (int)((pte0 >> 1) & 1), | 615 | (int)(pte0 & 1), h, (int)((pte0 >> 1) & 1), |
| 624 | ctx->ptem); | 616 | ctx->ptem); |
| @@ -632,8 +624,8 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h, | @@ -632,8 +624,8 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h, | ||
| 632 | r = pte32_check(ctx, pte0, pte1, h, rw, type); | 624 | r = pte32_check(ctx, pte0, pte1, h, rw, type); |
| 633 | #if defined (DEBUG_MMU) | 625 | #if defined (DEBUG_MMU) |
| 634 | if (loglevel != 0) { | 626 | if (loglevel != 0) { |
| 635 | - fprintf(logfile, "Load pte from 0x" ADDRX " => 0x" ADDRX | ||
| 636 | - " 0x" ADDRX " %d %d %d 0x" ADDRX "\n", | 627 | + fprintf(logfile, "Load pte from " ADDRX " => " ADDRX " " ADDRX |
| 628 | + " %d %d %d " ADDRX "\n", | ||
| 637 | base + (i * 8), pte0, pte1, | 629 | base + (i * 8), pte0, pte1, |
| 638 | (int)(pte0 >> 31), h, (int)((pte0 >> 6) & 1), | 630 | (int)(pte0 >> 31), h, (int)((pte0 >> 6) & 1), |
| 639 | ctx->ptem); | 631 | ctx->ptem); |
| @@ -668,8 +660,7 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h, | @@ -668,8 +660,7 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h, | ||
| 668 | done: | 660 | done: |
| 669 | #if defined (DEBUG_MMU) | 661 | #if defined (DEBUG_MMU) |
| 670 | if (loglevel != 0) { | 662 | if (loglevel != 0) { |
| 671 | - fprintf(logfile, "found PTE at addr 0x" PADDRX " prot=0x%01x " | ||
| 672 | - "ret=%d\n", | 663 | + fprintf(logfile, "found PTE at addr " PADDRX " prot=%01x ret=%d\n", |
| 673 | ctx->raddr, ctx->prot, ret); | 664 | ctx->raddr, ctx->prot, ret); |
| 674 | } | 665 | } |
| 675 | #endif | 666 | #endif |
| @@ -884,8 +875,9 @@ void ppc_store_slb (CPUPPCState *env, int slb_nr, target_ulong rs) | @@ -884,8 +875,9 @@ void ppc_store_slb (CPUPPCState *env, int slb_nr, target_ulong rs) | ||
| 884 | tmp64 |= (uint32_t)slb_nr << 28; | 875 | tmp64 |= (uint32_t)slb_nr << 28; |
| 885 | #if defined(DEBUG_SLB) | 876 | #if defined(DEBUG_SLB) |
| 886 | if (loglevel != 0) { | 877 | if (loglevel != 0) { |
| 887 | - fprintf(logfile, "%s: %d " ADDRX " => " PADDRX " %016" PRIx64 " %08" | ||
| 888 | - PRIx32 "\n", __func__, slb_nr, rs, sr_base, tmp64, tmp); | 878 | + fprintf(logfile, "%s: %d " ADDRX " => " PADDRX " %016" PRIx64 |
| 879 | + " %08" PRIx32 "\n", __func__, | ||
| 880 | + slb_nr, rs, sr_base, tmp64, tmp); | ||
| 889 | } | 881 | } |
| 890 | #endif | 882 | #endif |
| 891 | /* Write SLB entry to memory */ | 883 | /* Write SLB entry to memory */ |
| @@ -949,9 +941,8 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | @@ -949,9 +941,8 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | ||
| 949 | sdr_mask = 0xFFC0; | 941 | sdr_mask = 0xFFC0; |
| 950 | #if defined (DEBUG_MMU) | 942 | #if defined (DEBUG_MMU) |
| 951 | if (loglevel != 0) { | 943 | if (loglevel != 0) { |
| 952 | - fprintf(logfile, "Check segment v=0x" ADDRX " %d 0x" ADDRX | ||
| 953 | - " nip=0x" ADDRX " lr=0x" ADDRX | ||
| 954 | - " ir=%d dr=%d pr=%d %d t=%d\n", | 944 | + fprintf(logfile, "Check segment v=" ADDRX " %d " ADDRX |
| 945 | + " nip=" ADDRX " lr=" ADDRX " ir=%d dr=%d pr=%d %d t=%d\n", | ||
| 955 | eaddr, (int)(eaddr >> 28), sr, env->nip, | 946 | eaddr, (int)(eaddr >> 28), sr, env->nip, |
| 956 | env->lr, (int)msr_ir, (int)msr_dr, pr != 0 ? 1 : 0, | 947 | env->lr, (int)msr_ir, (int)msr_dr, pr != 0 ? 1 : 0, |
| 957 | rw, type); | 948 | rw, type); |
| @@ -986,9 +977,9 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | @@ -986,9 +977,9 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | ||
| 986 | mask = (htab_mask << sdr_sh) | sdr_mask; | 977 | mask = (htab_mask << sdr_sh) | sdr_mask; |
| 987 | #if defined (DEBUG_MMU) | 978 | #if defined (DEBUG_MMU) |
| 988 | if (loglevel != 0) { | 979 | if (loglevel != 0) { |
| 989 | - fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX " mask " | ||
| 990 | - PADDRX " " ADDRX "\n", sdr, sdr_sh, hash, mask, | ||
| 991 | - page_mask); | 980 | + fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX |
| 981 | + " mask " PADDRX " " ADDRX "\n", | ||
| 982 | + sdr, sdr_sh, hash, mask, page_mask); | ||
| 992 | } | 983 | } |
| 993 | #endif | 984 | #endif |
| 994 | ctx->pg_addr[0] = get_pgaddr(sdr, sdr_sh, hash, mask); | 985 | ctx->pg_addr[0] = get_pgaddr(sdr, sdr_sh, hash, mask); |
| @@ -996,8 +987,9 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | @@ -996,8 +987,9 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | ||
| 996 | hash = (~hash) & vsid_mask; | 987 | hash = (~hash) & vsid_mask; |
| 997 | #if defined (DEBUG_MMU) | 988 | #if defined (DEBUG_MMU) |
| 998 | if (loglevel != 0) { | 989 | if (loglevel != 0) { |
| 999 | - fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX " mask " | ||
| 1000 | - PADDRX "\n", sdr, sdr_sh, hash, mask); | 990 | + fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX |
| 991 | + " mask " PADDRX "\n", | ||
| 992 | + sdr, sdr_sh, hash, mask); | ||
| 1001 | } | 993 | } |
| 1002 | #endif | 994 | #endif |
| 1003 | ctx->pg_addr[1] = get_pgaddr(sdr, sdr_sh, hash, mask); | 995 | ctx->pg_addr[1] = get_pgaddr(sdr, sdr_sh, hash, mask); |
| @@ -1019,10 +1011,10 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | @@ -1019,10 +1011,10 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | ||
| 1019 | } else { | 1011 | } else { |
| 1020 | #if defined (DEBUG_MMU) | 1012 | #if defined (DEBUG_MMU) |
| 1021 | if (loglevel != 0) { | 1013 | if (loglevel != 0) { |
| 1022 | - fprintf(logfile, "0 sdr1=0x" PADDRX " vsid=0x%06x " | ||
| 1023 | - "api=0x%04x hash=0x%07x pg_addr=0x" PADDRX "\n", | ||
| 1024 | - sdr, (uint32_t)vsid, (uint32_t)pgidx, | ||
| 1025 | - (uint32_t)hash, ctx->pg_addr[0]); | 1014 | + fprintf(logfile, "0 sdr1=" PADDRX " vsid=" ADDRX " " |
| 1015 | + "api=" ADDRX " hash=" PADDRX | ||
| 1016 | + " pg_addr=" PADDRX "\n", | ||
| 1017 | + sdr, vsid, pgidx, hash, ctx->pg_addr[0]); | ||
| 1026 | } | 1018 | } |
| 1027 | #endif | 1019 | #endif |
| 1028 | /* Primary table lookup */ | 1020 | /* Primary table lookup */ |
| @@ -1031,11 +1023,10 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | @@ -1031,11 +1023,10 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | ||
| 1031 | /* Secondary table lookup */ | 1023 | /* Secondary table lookup */ |
| 1032 | #if defined (DEBUG_MMU) | 1024 | #if defined (DEBUG_MMU) |
| 1033 | if (eaddr != 0xEFFFFFFF && loglevel != 0) { | 1025 | if (eaddr != 0xEFFFFFFF && loglevel != 0) { |
| 1034 | - fprintf(logfile, | ||
| 1035 | - "1 sdr1=0x" PADDRX " vsid=0x%06x api=0x%04x " | ||
| 1036 | - "hash=0x%05x pg_addr=0x" PADDRX "\n", | ||
| 1037 | - sdr, (uint32_t)vsid, (uint32_t)pgidx, | ||
| 1038 | - (uint32_t)hash, ctx->pg_addr[1]); | 1026 | + fprintf(logfile, "1 sdr1=" PADDRX " vsid=" ADDRX " " |
| 1027 | + "api=" ADDRX " hash=" PADDRX | ||
| 1028 | + " pg_addr=" PADDRX "\n", | ||
| 1029 | + sdr, vsid, pgidx, hash, ctx->pg_addr[1]); | ||
| 1039 | } | 1030 | } |
| 1040 | #endif | 1031 | #endif |
| 1041 | ret2 = find_pte(env, ctx, 1, rw, type); | 1032 | ret2 = find_pte(env, ctx, 1, rw, type); |
| @@ -1047,8 +1038,7 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | @@ -1047,8 +1038,7 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | ||
| 1047 | if (loglevel != 0) { | 1038 | if (loglevel != 0) { |
| 1048 | target_phys_addr_t curaddr; | 1039 | target_phys_addr_t curaddr; |
| 1049 | uint32_t a0, a1, a2, a3; | 1040 | uint32_t a0, a1, a2, a3; |
| 1050 | - fprintf(logfile, | ||
| 1051 | - "Page table: " PADDRX " len " PADDRX "\n", | 1041 | + fprintf(logfile, "Page table: " PADDRX " len " PADDRX "\n", |
| 1052 | sdr, mask + 0x80); | 1042 | sdr, mask + 0x80); |
| 1053 | for (curaddr = sdr; curaddr < (sdr + mask + 0x80); | 1043 | for (curaddr = sdr; curaddr < (sdr + mask + 0x80); |
| 1054 | curaddr += 16) { | 1044 | curaddr += 16) { |
| @@ -1057,8 +1047,7 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | @@ -1057,8 +1047,7 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, | ||
| 1057 | a2 = ldl_phys(curaddr + 8); | 1047 | a2 = ldl_phys(curaddr + 8); |
| 1058 | a3 = ldl_phys(curaddr + 12); | 1048 | a3 = ldl_phys(curaddr + 12); |
| 1059 | if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) { | 1049 | if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) { |
| 1060 | - fprintf(logfile, | ||
| 1061 | - PADDRX ": %08x %08x %08x %08x\n", | 1050 | + fprintf(logfile, PADDRX ": %08x %08x %08x %08x\n", |
| 1062 | curaddr, a0, a1, a2, a3); | 1051 | curaddr, a0, a1, a2, a3); |
| 1063 | } | 1052 | } |
| 1064 | } | 1053 | } |
| @@ -1135,9 +1124,9 @@ static always_inline int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb, | @@ -1135,9 +1124,9 @@ static always_inline int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb, | ||
| 1135 | mask = ~(tlb->size - 1); | 1124 | mask = ~(tlb->size - 1); |
| 1136 | #if defined (DEBUG_SOFTWARE_TLB) | 1125 | #if defined (DEBUG_SOFTWARE_TLB) |
| 1137 | if (loglevel != 0) { | 1126 | if (loglevel != 0) { |
| 1138 | - fprintf(logfile, "%s: TLB %d address " ADDRX " PID %d <=> " | ||
| 1139 | - ADDRX " " ADDRX " %d\n", | ||
| 1140 | - __func__, i, address, pid, tlb->EPN, mask, (int)tlb->PID); | 1127 | + fprintf(logfile, "%s: TLB %d address " ADDRX " PID %u <=> " ADDRX |
| 1128 | + " " ADDRX " %u\n", | ||
| 1129 | + __func__, i, address, pid, tlb->EPN, mask, (uint32_t)tlb->PID); | ||
| 1141 | } | 1130 | } |
| 1142 | #endif | 1131 | #endif |
| 1143 | /* Check PID */ | 1132 | /* Check PID */ |
| @@ -1269,7 +1258,7 @@ int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx, | @@ -1269,7 +1258,7 @@ int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx, | ||
| 1269 | ctx->raddr = raddr; | 1258 | ctx->raddr = raddr; |
| 1270 | #if defined (DEBUG_SOFTWARE_TLB) | 1259 | #if defined (DEBUG_SOFTWARE_TLB) |
| 1271 | if (loglevel != 0) { | 1260 | if (loglevel != 0) { |
| 1272 | - fprintf(logfile, "%s: access granted " ADDRX " => " REGX | 1261 | + fprintf(logfile, "%s: access granted " ADDRX " => " PADDRX |
| 1273 | " %d %d\n", __func__, address, ctx->raddr, ctx->prot, | 1262 | " %d %d\n", __func__, address, ctx->raddr, ctx->prot, |
| 1274 | ret); | 1263 | ret); |
| 1275 | } | 1264 | } |
| @@ -1279,7 +1268,7 @@ int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx, | @@ -1279,7 +1268,7 @@ int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx, | ||
| 1279 | } | 1268 | } |
| 1280 | #if defined (DEBUG_SOFTWARE_TLB) | 1269 | #if defined (DEBUG_SOFTWARE_TLB) |
| 1281 | if (loglevel != 0) { | 1270 | if (loglevel != 0) { |
| 1282 | - fprintf(logfile, "%s: access refused " ADDRX " => " REGX | 1271 | + fprintf(logfile, "%s: access refused " ADDRX " => " PADDRX |
| 1283 | " %d %d\n", __func__, address, raddr, ctx->prot, | 1272 | " %d %d\n", __func__, address, raddr, ctx->prot, |
| 1284 | ret); | 1273 | ret); |
| 1285 | } | 1274 | } |
| @@ -1785,7 +1774,7 @@ static always_inline void dump_store_bat (CPUPPCState *env, char ID, | @@ -1785,7 +1774,7 @@ static always_inline void dump_store_bat (CPUPPCState *env, char ID, | ||
| 1785 | { | 1774 | { |
| 1786 | #if defined (DEBUG_BATS) | 1775 | #if defined (DEBUG_BATS) |
| 1787 | if (loglevel != 0) { | 1776 | if (loglevel != 0) { |
| 1788 | - fprintf(logfile, "Set %cBAT%d%c to 0x" ADDRX " (0x" ADDRX ")\n", | 1777 | + fprintf(logfile, "Set %cBAT%d%c to " ADDRX " (" ADDRX ")\n", |
| 1789 | ID, nr, ul == 0 ? 'u' : 'l', value, env->nip); | 1778 | ID, nr, ul == 0 ? 'u' : 'l', value, env->nip); |
| 1790 | } | 1779 | } |
| 1791 | #endif | 1780 | #endif |
| @@ -2089,7 +2078,7 @@ void do_store_sdr1 (CPUPPCState *env, target_ulong value) | @@ -2089,7 +2078,7 @@ void do_store_sdr1 (CPUPPCState *env, target_ulong value) | ||
| 2089 | { | 2078 | { |
| 2090 | #if defined (DEBUG_MMU) | 2079 | #if defined (DEBUG_MMU) |
| 2091 | if (loglevel != 0) { | 2080 | if (loglevel != 0) { |
| 2092 | - fprintf(logfile, "%s: 0x" ADDRX "\n", __func__, value); | 2081 | + fprintf(logfile, "%s: " ADDRX "\n", __func__, value); |
| 2093 | } | 2082 | } |
| 2094 | #endif | 2083 | #endif |
| 2095 | if (env->sdr1 != value) { | 2084 | if (env->sdr1 != value) { |
| @@ -2112,7 +2101,7 @@ void do_store_sr (CPUPPCState *env, int srnum, target_ulong value) | @@ -2112,7 +2101,7 @@ void do_store_sr (CPUPPCState *env, int srnum, target_ulong value) | ||
| 2112 | { | 2101 | { |
| 2113 | #if defined (DEBUG_MMU) | 2102 | #if defined (DEBUG_MMU) |
| 2114 | if (loglevel != 0) { | 2103 | if (loglevel != 0) { |
| 2115 | - fprintf(logfile, "%s: reg=%d 0x" ADDRX " " ADDRX "\n", | 2104 | + fprintf(logfile, "%s: reg=%d " ADDRX " " ADDRX "\n", |
| 2116 | __func__, srnum, value, env->sr[srnum]); | 2105 | __func__, srnum, value, env->sr[srnum]); |
| 2117 | } | 2106 | } |
| 2118 | #endif | 2107 | #endif |
| @@ -2167,10 +2156,10 @@ void ppc_hw_interrupt (CPUState *env) | @@ -2167,10 +2156,10 @@ void ppc_hw_interrupt (CPUState *env) | ||
| 2167 | #else /* defined (CONFIG_USER_ONLY) */ | 2156 | #else /* defined (CONFIG_USER_ONLY) */ |
| 2168 | static always_inline void dump_syscall (CPUState *env) | 2157 | static always_inline void dump_syscall (CPUState *env) |
| 2169 | { | 2158 | { |
| 2170 | - fprintf(logfile, "syscall r0=0x" REGX " r3=0x" REGX " r4=0x" REGX | ||
| 2171 | - " r5=0x" REGX " r6=0x" REGX " nip=0x" ADDRX "\n", | ||
| 2172 | - env->gpr[0], env->gpr[3], env->gpr[4], | ||
| 2173 | - env->gpr[5], env->gpr[6], env->nip); | 2159 | + fprintf(logfile, "syscall r0=" REGX " r3=" REGX " r4=" REGX |
| 2160 | + " r5=" REGX " r6=" REGX " nip=" ADDRX "\n", | ||
| 2161 | + ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3), ppc_dump_gpr(env, 4), | ||
| 2162 | + ppc_dump_gpr(env, 5), ppc_dump_gpr(env, 6), env->nip); | ||
| 2174 | } | 2163 | } |
| 2175 | 2164 | ||
| 2176 | /* Note that this function should be greatly optimized | 2165 | /* Note that this function should be greatly optimized |
| @@ -2194,7 +2183,7 @@ static always_inline void powerpc_excp (CPUState *env, | @@ -2194,7 +2183,7 @@ static always_inline void powerpc_excp (CPUState *env, | ||
| 2194 | } | 2183 | } |
| 2195 | 2184 | ||
| 2196 | if (loglevel & CPU_LOG_INT) { | 2185 | if (loglevel & CPU_LOG_INT) { |
| 2197 | - fprintf(logfile, "Raise exception at 0x" ADDRX " => 0x%08x (%02x)\n", | 2186 | + fprintf(logfile, "Raise exception at " ADDRX " => %08x (%02x)\n", |
| 2198 | env->nip, excp, env->error_code); | 2187 | env->nip, excp, env->error_code); |
| 2199 | } | 2188 | } |
| 2200 | msr = env->msr; | 2189 | msr = env->msr; |
| @@ -2265,8 +2254,8 @@ static always_inline void powerpc_excp (CPUState *env, | @@ -2265,8 +2254,8 @@ static always_inline void powerpc_excp (CPUState *env, | ||
| 2265 | case POWERPC_EXCP_DSI: /* Data storage exception */ | 2254 | case POWERPC_EXCP_DSI: /* Data storage exception */ |
| 2266 | #if defined (DEBUG_EXCEPTIONS) | 2255 | #if defined (DEBUG_EXCEPTIONS) |
| 2267 | if (loglevel != 0) { | 2256 | if (loglevel != 0) { |
| 2268 | - fprintf(logfile, "DSI exception: DSISR=0x" ADDRX" DAR=0x" ADDRX | ||
| 2269 | - "\n", env->spr[SPR_DSISR], env->spr[SPR_DAR]); | 2257 | + fprintf(logfile, "DSI exception: DSISR=" ADDRX" DAR=" ADDRX "\n", |
| 2258 | + env->spr[SPR_DSISR], env->spr[SPR_DAR]); | ||
| 2270 | } | 2259 | } |
| 2271 | #endif | 2260 | #endif |
| 2272 | new_msr &= ~((target_ulong)1 << MSR_RI); | 2261 | new_msr &= ~((target_ulong)1 << MSR_RI); |
| @@ -2276,8 +2265,8 @@ static always_inline void powerpc_excp (CPUState *env, | @@ -2276,8 +2265,8 @@ static always_inline void powerpc_excp (CPUState *env, | ||
| 2276 | case POWERPC_EXCP_ISI: /* Instruction storage exception */ | 2265 | case POWERPC_EXCP_ISI: /* Instruction storage exception */ |
| 2277 | #if defined (DEBUG_EXCEPTIONS) | 2266 | #if defined (DEBUG_EXCEPTIONS) |
| 2278 | if (loglevel != 0) { | 2267 | if (loglevel != 0) { |
| 2279 | - fprintf(logfile, "ISI exception: msr=0x" ADDRX ", nip=0x" ADDRX | ||
| 2280 | - "\n", msr, env->nip); | 2268 | + fprintf(logfile, "ISI exception: msr=" ADDRX ", nip=" ADDRX "\n", |
| 2269 | + msr, env->nip); | ||
| 2281 | } | 2270 | } |
| 2282 | #endif | 2271 | #endif |
| 2283 | new_msr &= ~((target_ulong)1 << MSR_RI); | 2272 | new_msr &= ~((target_ulong)1 << MSR_RI); |
| @@ -2322,7 +2311,7 @@ static always_inline void powerpc_excp (CPUState *env, | @@ -2322,7 +2311,7 @@ static always_inline void powerpc_excp (CPUState *env, | ||
| 2322 | case POWERPC_EXCP_INVAL: | 2311 | case POWERPC_EXCP_INVAL: |
| 2323 | #if defined (DEBUG_EXCEPTIONS) | 2312 | #if defined (DEBUG_EXCEPTIONS) |
| 2324 | if (loglevel != 0) { | 2313 | if (loglevel != 0) { |
| 2325 | - fprintf(logfile, "Invalid instruction at 0x" ADDRX "\n", | 2314 | + fprintf(logfile, "Invalid instruction at " ADDRX "\n", |
| 2326 | env->nip); | 2315 | env->nip); |
| 2327 | } | 2316 | } |
| 2328 | #endif | 2317 | #endif |
target-ppc/op_helper.c
| @@ -2783,9 +2783,9 @@ void do_load_6xx_tlb (int is_code) | @@ -2783,9 +2783,9 @@ void do_load_6xx_tlb (int is_code) | ||
| 2783 | way = (env->spr[SPR_SRR1] >> 17) & 1; | 2783 | way = (env->spr[SPR_SRR1] >> 17) & 1; |
| 2784 | #if defined (DEBUG_SOFTWARE_TLB) | 2784 | #if defined (DEBUG_SOFTWARE_TLB) |
| 2785 | if (loglevel != 0) { | 2785 | if (loglevel != 0) { |
| 2786 | - fprintf(logfile, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n", | ||
| 2787 | - __func__, (unsigned long)T0, (unsigned long)EPN, | ||
| 2788 | - (unsigned long)CMP, (unsigned long)RPN, way); | 2786 | + fprintf(logfile, "%s: EPN " TDX " " ADDRX " PTE0 " ADDRX |
| 2787 | + " PTE1 " ADDRX " way %d\n", | ||
| 2788 | + __func__, T0, EPN, CMP, RPN, way); | ||
| 2789 | } | 2789 | } |
| 2790 | #endif | 2790 | #endif |
| 2791 | /* Store this TLB */ | 2791 | /* Store this TLB */ |
| @@ -2804,9 +2804,9 @@ void do_load_74xx_tlb (int is_code) | @@ -2804,9 +2804,9 @@ void do_load_74xx_tlb (int is_code) | ||
| 2804 | way = env->spr[SPR_TLBMISS] & 0x3; | 2804 | way = env->spr[SPR_TLBMISS] & 0x3; |
| 2805 | #if defined (DEBUG_SOFTWARE_TLB) | 2805 | #if defined (DEBUG_SOFTWARE_TLB) |
| 2806 | if (loglevel != 0) { | 2806 | if (loglevel != 0) { |
| 2807 | - fprintf(logfile, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n", | ||
| 2808 | - __func__, (unsigned long)T0, (unsigned long)EPN, | ||
| 2809 | - (unsigned long)CMP, (unsigned long)RPN, way); | 2807 | + fprintf(logfile, "%s: EPN " TDX " " ADDRX " PTE0 " ADDRX |
| 2808 | + " PTE1 " ADDRX " way %d\n", | ||
| 2809 | + __func__, T0, EPN, CMP, RPN, way); | ||
| 2810 | } | 2810 | } |
| 2811 | #endif | 2811 | #endif |
| 2812 | /* Store this TLB */ | 2812 | /* Store this TLB */ |
| @@ -2920,7 +2920,7 @@ void do_4xx_tlbwe_hi (void) | @@ -2920,7 +2920,7 @@ void do_4xx_tlbwe_hi (void) | ||
| 2920 | 2920 | ||
| 2921 | #if defined (DEBUG_SOFTWARE_TLB) | 2921 | #if defined (DEBUG_SOFTWARE_TLB) |
| 2922 | if (loglevel != 0) { | 2922 | if (loglevel != 0) { |
| 2923 | - fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); | 2923 | + fprintf(logfile, "%s T0 " TDX " T1 " TDX "\n", __func__, T0, T1); |
| 2924 | } | 2924 | } |
| 2925 | #endif | 2925 | #endif |
| 2926 | T0 &= 0x3F; | 2926 | T0 &= 0x3F; |
| @@ -2989,7 +2989,7 @@ void do_4xx_tlbwe_lo (void) | @@ -2989,7 +2989,7 @@ void do_4xx_tlbwe_lo (void) | ||
| 2989 | 2989 | ||
| 2990 | #if defined (DEBUG_SOFTWARE_TLB) | 2990 | #if defined (DEBUG_SOFTWARE_TLB) |
| 2991 | if (loglevel != 0) { | 2991 | if (loglevel != 0) { |
| 2992 | - fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); | 2992 | + fprintf(logfile, "%s T0 " TDX " T1 " TDX "\n", __func__, T0, T1); |
| 2993 | } | 2993 | } |
| 2994 | #endif | 2994 | #endif |
| 2995 | T0 &= 0x3F; | 2995 | T0 &= 0x3F; |
| @@ -3022,7 +3022,7 @@ void do_440_tlbwe (int word) | @@ -3022,7 +3022,7 @@ void do_440_tlbwe (int word) | ||
| 3022 | 3022 | ||
| 3023 | #if defined (DEBUG_SOFTWARE_TLB) | 3023 | #if defined (DEBUG_SOFTWARE_TLB) |
| 3024 | if (loglevel != 0) { | 3024 | if (loglevel != 0) { |
| 3025 | - fprintf(logfile, "%s word %d T0 " REGX " T1 " REGX "\n", | 3025 | + fprintf(logfile, "%s word %d T0 " TDX " T1 " TDX "\n", |
| 3026 | __func__, word, T0, T1); | 3026 | __func__, word, T0, T1); |
| 3027 | } | 3027 | } |
| 3028 | #endif | 3028 | #endif |
target-ppc/translate.c
| @@ -3265,7 +3265,7 @@ static always_inline void gen_op_mfspr (DisasContext *ctx) | @@ -3265,7 +3265,7 @@ static always_inline void gen_op_mfspr (DisasContext *ctx) | ||
| 3265 | */ | 3265 | */ |
| 3266 | if (sprn != SPR_PVR) { | 3266 | if (sprn != SPR_PVR) { |
| 3267 | if (loglevel != 0) { | 3267 | if (loglevel != 0) { |
| 3268 | - fprintf(logfile, "Trying to read privileged spr %d %03x at" | 3268 | + fprintf(logfile, "Trying to read privileged spr %d %03x at " |
| 3269 | ADDRX "\n", sprn, sprn, ctx->nip); | 3269 | ADDRX "\n", sprn, sprn, ctx->nip); |
| 3270 | } | 3270 | } |
| 3271 | printf("Trying to read privileged spr %d %03x at " ADDRX "\n", | 3271 | printf("Trying to read privileged spr %d %03x at " ADDRX "\n", |
| @@ -3741,8 +3741,6 @@ GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA) | @@ -3741,8 +3741,6 @@ GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA) | ||
| 3741 | GEN_EXCP_PRIVOPC(ctx); | 3741 | GEN_EXCP_PRIVOPC(ctx); |
| 3742 | #else | 3742 | #else |
| 3743 | if (unlikely(!ctx->supervisor)) { | 3743 | if (unlikely(!ctx->supervisor)) { |
| 3744 | - if (loglevel != 0) | ||
| 3745 | - fprintf(logfile, "%s: ! supervisor\n", __func__); | ||
| 3746 | GEN_EXCP_PRIVOPC(ctx); | 3744 | GEN_EXCP_PRIVOPC(ctx); |
| 3747 | return; | 3745 | return; |
| 3748 | } | 3746 | } |
| @@ -3795,8 +3793,6 @@ GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI) | @@ -3795,8 +3793,6 @@ GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI) | ||
| 3795 | GEN_EXCP_PRIVOPC(ctx); | 3793 | GEN_EXCP_PRIVOPC(ctx); |
| 3796 | #else | 3794 | #else |
| 3797 | if (unlikely(!ctx->supervisor)) { | 3795 | if (unlikely(!ctx->supervisor)) { |
| 3798 | - if (loglevel != 0) | ||
| 3799 | - fprintf(logfile, "%s: ! supervisor\n", __func__); | ||
| 3800 | GEN_EXCP_PRIVOPC(ctx); | 3796 | GEN_EXCP_PRIVOPC(ctx); |
| 3801 | return; | 3797 | return; |
| 3802 | } | 3798 | } |
| @@ -6060,23 +6056,15 @@ void cpu_dump_state (CPUState *env, FILE *f, | @@ -6060,23 +6056,15 @@ void cpu_dump_state (CPUState *env, FILE *f, | ||
| 6060 | int (*cpu_fprintf)(FILE *f, const char *fmt, ...), | 6056 | int (*cpu_fprintf)(FILE *f, const char *fmt, ...), |
| 6061 | int flags) | 6057 | int flags) |
| 6062 | { | 6058 | { |
| 6063 | -#if defined(TARGET_PPC64) || 1 | ||
| 6064 | -#define FILL "" | ||
| 6065 | #define RGPL 4 | 6059 | #define RGPL 4 |
| 6066 | #define RFPL 4 | 6060 | #define RFPL 4 |
| 6067 | -#else | ||
| 6068 | -#define FILL " " | ||
| 6069 | -#define RGPL 8 | ||
| 6070 | -#define RFPL 4 | ||
| 6071 | -#endif | ||
| 6072 | 6061 | ||
| 6073 | int i; | 6062 | int i; |
| 6074 | 6063 | ||
| 6075 | cpu_fprintf(f, "NIP " ADDRX " LR " ADDRX " CTR " ADDRX " XER %08x\n", | 6064 | cpu_fprintf(f, "NIP " ADDRX " LR " ADDRX " CTR " ADDRX " XER %08x\n", |
| 6076 | env->nip, env->lr, env->ctr, hreg_load_xer(env)); | 6065 | env->nip, env->lr, env->ctr, hreg_load_xer(env)); |
| 6077 | - cpu_fprintf(f, "MSR " REGX FILL " HID0 " REGX FILL " HF " REGX FILL | ||
| 6078 | - " idx %d\n", | ||
| 6079 | - env->msr, env->hflags, env->spr[SPR_HID0], env->mmu_idx); | 6066 | + cpu_fprintf(f, "MSR " ADDRX " HID0 " ADDRX " HF " ADDRX " idx %d\n", |
| 6067 | + env->msr, env->spr[SPR_HID0], env->hflags, env->mmu_idx); | ||
| 6080 | #if !defined(NO_TIMER_DUMP) | 6068 | #if !defined(NO_TIMER_DUMP) |
| 6081 | cpu_fprintf(f, "TB %08x %08x " | 6069 | cpu_fprintf(f, "TB %08x %08x " |
| 6082 | #if !defined(CONFIG_USER_ONLY) | 6070 | #if !defined(CONFIG_USER_ONLY) |
| @@ -6092,7 +6080,7 @@ void cpu_dump_state (CPUState *env, FILE *f, | @@ -6092,7 +6080,7 @@ void cpu_dump_state (CPUState *env, FILE *f, | ||
| 6092 | for (i = 0; i < 32; i++) { | 6080 | for (i = 0; i < 32; i++) { |
| 6093 | if ((i & (RGPL - 1)) == 0) | 6081 | if ((i & (RGPL - 1)) == 0) |
| 6094 | cpu_fprintf(f, "GPR%02d", i); | 6082 | cpu_fprintf(f, "GPR%02d", i); |
| 6095 | - cpu_fprintf(f, " " REGX, (target_ulong)env->gpr[i]); | 6083 | + cpu_fprintf(f, " " REGX, ppc_dump_gpr(env, i)); |
| 6096 | if ((i & (RGPL - 1)) == (RGPL - 1)) | 6084 | if ((i & (RGPL - 1)) == (RGPL - 1)) |
| 6097 | cpu_fprintf(f, "\n"); | 6085 | cpu_fprintf(f, "\n"); |
| 6098 | } | 6086 | } |
| @@ -6110,7 +6098,7 @@ void cpu_dump_state (CPUState *env, FILE *f, | @@ -6110,7 +6098,7 @@ void cpu_dump_state (CPUState *env, FILE *f, | ||
| 6110 | a = 'E'; | 6098 | a = 'E'; |
| 6111 | cpu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' '); | 6099 | cpu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' '); |
| 6112 | } | 6100 | } |
| 6113 | - cpu_fprintf(f, " ] " FILL "RES " REGX "\n", env->reserve); | 6101 | + cpu_fprintf(f, " ] RES " ADDRX "\n", env->reserve); |
| 6114 | for (i = 0; i < 32; i++) { | 6102 | for (i = 0; i < 32; i++) { |
| 6115 | if ((i & (RFPL - 1)) == 0) | 6103 | if ((i & (RFPL - 1)) == 0) |
| 6116 | cpu_fprintf(f, "FPR%02d", i); | 6104 | cpu_fprintf(f, "FPR%02d", i); |
| @@ -6119,13 +6107,12 @@ void cpu_dump_state (CPUState *env, FILE *f, | @@ -6119,13 +6107,12 @@ void cpu_dump_state (CPUState *env, FILE *f, | ||
| 6119 | cpu_fprintf(f, "\n"); | 6107 | cpu_fprintf(f, "\n"); |
| 6120 | } | 6108 | } |
| 6121 | #if !defined(CONFIG_USER_ONLY) | 6109 | #if !defined(CONFIG_USER_ONLY) |
| 6122 | - cpu_fprintf(f, "SRR0 " REGX " SRR1 " REGX " SDR1 " REGX "\n", | 6110 | + cpu_fprintf(f, "SRR0 " ADDRX " SRR1 " ADDRX " SDR1 " ADDRX "\n", |
| 6123 | env->spr[SPR_SRR0], env->spr[SPR_SRR1], env->sdr1); | 6111 | env->spr[SPR_SRR0], env->spr[SPR_SRR1], env->sdr1); |
| 6124 | #endif | 6112 | #endif |
| 6125 | 6113 | ||
| 6126 | #undef RGPL | 6114 | #undef RGPL |
| 6127 | #undef RFPL | 6115 | #undef RFPL |
| 6128 | -#undef FILL | ||
| 6129 | } | 6116 | } |
| 6130 | 6117 | ||
| 6131 | void cpu_dump_statistics (CPUState *env, FILE*f, | 6118 | void cpu_dump_statistics (CPUState *env, FILE*f, |
| @@ -6289,12 +6276,12 @@ static always_inline int gen_intermediate_code_internal (CPUState *env, | @@ -6289,12 +6276,12 @@ static always_inline int gen_intermediate_code_internal (CPUState *env, | ||
| 6289 | if (unlikely(handler->handler == &gen_invalid)) { | 6276 | if (unlikely(handler->handler == &gen_invalid)) { |
| 6290 | if (loglevel != 0) { | 6277 | if (loglevel != 0) { |
| 6291 | fprintf(logfile, "invalid/unsupported opcode: " | 6278 | fprintf(logfile, "invalid/unsupported opcode: " |
| 6292 | - "%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n", | 6279 | + "%02x - %02x - %02x (%08x) " ADDRX " %d\n", |
| 6293 | opc1(ctx.opcode), opc2(ctx.opcode), | 6280 | opc1(ctx.opcode), opc2(ctx.opcode), |
| 6294 | opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir); | 6281 | opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir); |
| 6295 | } else { | 6282 | } else { |
| 6296 | printf("invalid/unsupported opcode: " | 6283 | printf("invalid/unsupported opcode: " |
| 6297 | - "%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n", | 6284 | + "%02x - %02x - %02x (%08x) " ADDRX " %d\n", |
| 6298 | opc1(ctx.opcode), opc2(ctx.opcode), | 6285 | opc1(ctx.opcode), opc2(ctx.opcode), |
| 6299 | opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir); | 6286 | opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir); |
| 6300 | } | 6287 | } |
| @@ -6302,13 +6289,13 @@ static always_inline int gen_intermediate_code_internal (CPUState *env, | @@ -6302,13 +6289,13 @@ static always_inline int gen_intermediate_code_internal (CPUState *env, | ||
| 6302 | if (unlikely((ctx.opcode & handler->inval) != 0)) { | 6289 | if (unlikely((ctx.opcode & handler->inval) != 0)) { |
| 6303 | if (loglevel != 0) { | 6290 | if (loglevel != 0) { |
| 6304 | fprintf(logfile, "invalid bits: %08x for opcode: " | 6291 | fprintf(logfile, "invalid bits: %08x for opcode: " |
| 6305 | - "%02x - %02x - %02x (%08x) 0x" ADDRX "\n", | 6292 | + "%02x - %02x - %02x (%08x) " ADDRX "\n", |
| 6306 | ctx.opcode & handler->inval, opc1(ctx.opcode), | 6293 | ctx.opcode & handler->inval, opc1(ctx.opcode), |
| 6307 | opc2(ctx.opcode), opc3(ctx.opcode), | 6294 | opc2(ctx.opcode), opc3(ctx.opcode), |
| 6308 | ctx.opcode, ctx.nip - 4); | 6295 | ctx.opcode, ctx.nip - 4); |
| 6309 | } else { | 6296 | } else { |
| 6310 | printf("invalid bits: %08x for opcode: " | 6297 | printf("invalid bits: %08x for opcode: " |
| 6311 | - "%02x - %02x - %02x (%08x) 0x" ADDRX "\n", | 6298 | + "%02x - %02x - %02x (%08x) " ADDRX "\n", |
| 6312 | ctx.opcode & handler->inval, opc1(ctx.opcode), | 6299 | ctx.opcode & handler->inval, opc1(ctx.opcode), |
| 6313 | opc2(ctx.opcode), opc3(ctx.opcode), | 6300 | opc2(ctx.opcode), opc3(ctx.opcode), |
| 6314 | ctx.opcode, ctx.nip - 4); | 6301 | ctx.opcode, ctx.nip - 4); |