Commit 6a8b1ae2020bf06d438f6bfd05a0e8fc2abe10d1
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b43848a1
microblaze: Add petalogix s3a1800dsp MMU linux ref-design.
This setup was designed by petalogix and is supported by upstream linux. The design targets a xilinx spartan-3a-1800 dsp board with MMU. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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hw/petalogix_s3adsp1800_mmu.c
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1 | +/* | ||
2 | + * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800 | ||
3 | + * boards. | ||
4 | + * | ||
5 | + * Copyright (c) 2009 Edgar E. Iglesias. | ||
6 | + * | ||
7 | + * Permission is hereby granted, free of charge, to any person obtaining a copy | ||
8 | + * of this software and associated documentation files (the "Software"), to deal | ||
9 | + * in the Software without restriction, including without limitation the rights | ||
10 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | ||
11 | + * copies of the Software, and to permit persons to whom the Software is | ||
12 | + * furnished to do so, subject to the following conditions: | ||
13 | + * | ||
14 | + * The above copyright notice and this permission notice shall be included in | ||
15 | + * all copies or substantial portions of the Software. | ||
16 | + * | ||
17 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
18 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
19 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
20 | + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
21 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
22 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | ||
23 | + * THE SOFTWARE. | ||
24 | + */ | ||
25 | + | ||
26 | +#include "sysbus.h" | ||
27 | +#include "hw.h" | ||
28 | +#include "net.h" | ||
29 | +#include "flash.h" | ||
30 | +#include "sysemu.h" | ||
31 | +#include "devices.h" | ||
32 | +#include "boards.h" | ||
33 | +#include "device_tree.h" | ||
34 | +#include "xilinx.h" | ||
35 | + | ||
36 | +#define LMB_BRAM_SIZE (128 * 1024) | ||
37 | +#define FLASH_SIZE (16 * 1024 * 1024) | ||
38 | + | ||
39 | +static uint32_t bootstrap_pc; | ||
40 | + | ||
41 | +static void main_cpu_reset(void *opaque) | ||
42 | +{ | ||
43 | + CPUState *env = opaque; | ||
44 | + cpu_reset(env); | ||
45 | + env->sregs[SR_PC] = bootstrap_pc; | ||
46 | +} | ||
47 | + | ||
48 | +#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb" | ||
49 | +static int petalogix_load_device_tree(target_phys_addr_t addr, | ||
50 | + uint32_t ramsize, | ||
51 | + target_phys_addr_t initrd_base, | ||
52 | + target_phys_addr_t initrd_size, | ||
53 | + const char *kernel_cmdline) | ||
54 | +{ | ||
55 | + void *fdt; | ||
56 | + char *path = NULL; | ||
57 | + int fdt_size; | ||
58 | + int pathlen; | ||
59 | + int r; | ||
60 | + | ||
61 | + /* Try the local "mb.dtb" override. */ | ||
62 | + fdt = load_device_tree("mb.dtb", &fdt_size); | ||
63 | + if (!fdt) { | ||
64 | + pathlen = snprintf(NULL, 0, "%s/%s", | ||
65 | + bios_dir, BINARY_DEVICE_TREE_FILE) + 1; | ||
66 | + path = qemu_malloc(pathlen); | ||
67 | + snprintf(path, pathlen, "%s/%s", bios_dir, BINARY_DEVICE_TREE_FILE); | ||
68 | + fdt = load_device_tree(BINARY_DEVICE_TREE_FILE, &fdt_size); | ||
69 | + free(path); | ||
70 | + if (!fdt) | ||
71 | + return 0; | ||
72 | + } | ||
73 | + | ||
74 | + r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline); | ||
75 | + if (r < 0) | ||
76 | + fprintf(stderr, "couldn't set /chosen/bootargs\n"); | ||
77 | + printf("write fdt to addr=%x fdtsize=%d\n", addr, fdt_size); | ||
78 | + cpu_physical_memory_write (addr, (void *)fdt, fdt_size); | ||
79 | + return fdt_size; | ||
80 | +} | ||
81 | + | ||
82 | +static void | ||
83 | +petalogix_s3adsp1800_init(ram_addr_t ram_size, | ||
84 | + const char *boot_device, | ||
85 | + const char *kernel_filename, | ||
86 | + const char *kernel_cmdline, | ||
87 | + const char *initrd_filename, const char *cpu_model) | ||
88 | +{ | ||
89 | + DeviceState *dev; | ||
90 | + CPUState *env; | ||
91 | + int kernel_size; | ||
92 | + int i; | ||
93 | + target_phys_addr_t ddr_base = 0x90000000; | ||
94 | + ram_addr_t phys_lmb_bram; | ||
95 | + ram_addr_t phys_ram; | ||
96 | + ram_addr_t phys_flash; | ||
97 | + qemu_irq irq[32], *cpu_irq; | ||
98 | + | ||
99 | + /* init CPUs */ | ||
100 | + if (cpu_model == NULL) { | ||
101 | + cpu_model = "microblaze"; | ||
102 | + } | ||
103 | + env = cpu_init(cpu_model); | ||
104 | + | ||
105 | + env->pvr.regs[10] = 0x0c000000; /* spartan 3a dsp family. */ | ||
106 | + qemu_register_reset(main_cpu_reset, 0, env); | ||
107 | + | ||
108 | + /* Attach emulated BRAM through the LMB. */ | ||
109 | + phys_lmb_bram = qemu_ram_alloc(LMB_BRAM_SIZE); | ||
110 | + cpu_register_physical_memory(0x00000000, LMB_BRAM_SIZE, | ||
111 | + phys_lmb_bram | IO_MEM_RAM); | ||
112 | + | ||
113 | + phys_ram = qemu_ram_alloc(ram_size); | ||
114 | + cpu_register_physical_memory(ddr_base, ram_size, phys_ram | IO_MEM_RAM); | ||
115 | + | ||
116 | + phys_flash = qemu_ram_alloc(FLASH_SIZE); | ||
117 | + i = drive_get_index(IF_PFLASH, 0, 0); | ||
118 | + pflash_cfi02_register(0xa0000000, phys_flash, | ||
119 | + i != -1 ? drives_table[i].bdrv : NULL, (64 * 1024), | ||
120 | + FLASH_SIZE >> 16, | ||
121 | + 1, 1, 0x0000, 0x0000, 0x0000, 0x0000, | ||
122 | + 0x555, 0x2aa); | ||
123 | + | ||
124 | + cpu_irq = microblaze_pic_init_cpu(env); | ||
125 | + dev = xilinx_intc_create(0x81800000, cpu_irq[0], 2); | ||
126 | + for (i = 0; i < 32; i++) { | ||
127 | + irq[i] = qdev_get_gpio_in(dev, i); | ||
128 | + } | ||
129 | + | ||
130 | + sysbus_create_simple("xilinx,uartlite", 0x84000000, irq[3]); | ||
131 | + /* 2 timers at irq 2 @ 62 Mhz. */ | ||
132 | + xilinx_timer_create(0x83c00000, irq[0], 2, 62 * 1000000); | ||
133 | + xilinx_ethlite_create(&nd_table[0], 0x81000000, irq[1], 0, 0); | ||
134 | + | ||
135 | + if (kernel_filename) { | ||
136 | + uint64_t entry, low, high; | ||
137 | + int kcmdline_len; | ||
138 | + uint32_t base32; | ||
139 | + | ||
140 | + /* Boots a kernel elf binary. */ | ||
141 | + kernel_size = load_elf(kernel_filename, 0, | ||
142 | + &entry, &low, &high); | ||
143 | + base32 = entry; | ||
144 | + if (base32 == 0xc0000000) { | ||
145 | + kernel_size = load_elf(kernel_filename, -0x30000000LL, | ||
146 | + &entry, NULL, NULL); | ||
147 | + } | ||
148 | + /* Always boot into physical ram. */ | ||
149 | + bootstrap_pc = ddr_base + (entry & 0x0fffffff); | ||
150 | + if (kernel_size < 0) { | ||
151 | + /* If we failed loading ELF's try a raw image. */ | ||
152 | + kernel_size = load_image_targphys(kernel_filename, ddr_base, | ||
153 | + ram_size); | ||
154 | + bootstrap_pc = ddr_base; | ||
155 | + } | ||
156 | + | ||
157 | + env->regs[5] = ddr_base + kernel_size; | ||
158 | + if (kernel_cmdline && (kcmdline_len = strlen(kernel_cmdline))) { | ||
159 | + pstrcpy_targphys(env->regs[5], 256, kernel_cmdline); | ||
160 | + } | ||
161 | + env->regs[6] = 0; | ||
162 | + /* Provide a device-tree. */ | ||
163 | + env->regs[7] = ddr_base + kernel_size + 256; | ||
164 | + petalogix_load_device_tree(env->regs[7], ram_size, | ||
165 | + env->regs[6], 0, | ||
166 | + kernel_cmdline); | ||
167 | + } | ||
168 | + | ||
169 | + env->sregs[SR_PC] = bootstrap_pc; | ||
170 | +} | ||
171 | + | ||
172 | +static QEMUMachine petalogix_s3adsp1800_machine = { | ||
173 | + .name = "petalogix-s3adsp1800", | ||
174 | + .desc = "Petalogix linux refdesign for xilinx Spartan 3ADSP1800", | ||
175 | + .init = petalogix_s3adsp1800_init, | ||
176 | + .is_default = 1 | ||
177 | +}; | ||
178 | + | ||
179 | +static void petalogix_s3adsp1800_machine_init(void) | ||
180 | +{ | ||
181 | + qemu_register_machine(&petalogix_s3adsp1800_machine); | ||
182 | +} | ||
183 | + | ||
184 | +machine_init(petalogix_s3adsp1800_machine_init); |
hw/xilinx.h
0 โ 100644
1 | + | ||
2 | +/* OPB Interrupt Controller. */ | ||
3 | +qemu_irq *microblaze_pic_init_cpu(CPUState *env); | ||
4 | + | ||
5 | +static inline DeviceState * | ||
6 | +xilinx_intc_create(target_phys_addr_t base, qemu_irq irq, int kind_of_intr) | ||
7 | +{ | ||
8 | + DeviceState *dev; | ||
9 | + | ||
10 | + dev = qdev_create(NULL, "xilinx,intc"); | ||
11 | + qdev_set_prop_int(dev, "kind-of-intr", kind_of_intr); | ||
12 | + qdev_init(dev); | ||
13 | + sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); | ||
14 | + sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq); | ||
15 | + return dev; | ||
16 | +} | ||
17 | + | ||
18 | +/* OPB Timer/Counter. */ | ||
19 | +static inline DeviceState * | ||
20 | +xilinx_timer_create(target_phys_addr_t base, qemu_irq irq, int nr, int freq) | ||
21 | +{ | ||
22 | + DeviceState *dev; | ||
23 | + | ||
24 | + dev = qdev_create(NULL, "xilinx,timer"); | ||
25 | + qdev_set_prop_int(dev, "nr-timers", nr); | ||
26 | + qdev_set_prop_int(dev, "frequency", freq); | ||
27 | + qdev_init(dev); | ||
28 | + sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); | ||
29 | + sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq); | ||
30 | + return dev; | ||
31 | +} | ||
32 | + | ||
33 | +/* XPS Ethernet Lite MAC. */ | ||
34 | +static inline DeviceState * | ||
35 | +xilinx_ethlite_create(NICInfo *nd, target_phys_addr_t base, qemu_irq irq, | ||
36 | + int txpingpong, int rxpingpong) | ||
37 | +{ | ||
38 | + DeviceState *dev; | ||
39 | + | ||
40 | + qemu_check_nic_model(nd, "xilinx-ethlite"); | ||
41 | + | ||
42 | + dev = qdev_create(NULL, "xilinx,ethlite"); | ||
43 | + qdev_set_netdev(dev, nd); | ||
44 | + qdev_set_prop_int(dev, "txpingpong", txpingpong); | ||
45 | + qdev_set_prop_int(dev, "rxpingpong", rxpingpong); | ||
46 | + qdev_init(dev); | ||
47 | + sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); | ||
48 | + sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq); | ||
49 | + return dev; | ||
50 | +} |