Commit 6a4955a813467089549f865600284e6be0d018fc
1 parent
e5d355d1
qemu: per-arch cpu_has_work (Marcelo Tosatti)
Blue Swirl: fix Sparc32 breakage Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162
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11 changed files
with
72 additions
and
12 deletions
cpu-all.h
@@ -775,6 +775,8 @@ void cpu_reset_interrupt(CPUState *env, int mask); | @@ -775,6 +775,8 @@ void cpu_reset_interrupt(CPUState *env, int mask); | ||
775 | 775 | ||
776 | void cpu_exit(CPUState *s); | 776 | void cpu_exit(CPUState *s); |
777 | 777 | ||
778 | +int qemu_cpu_has_work(CPUState *env); | ||
779 | + | ||
778 | /* Breakpoint/watchpoint flags */ | 780 | /* Breakpoint/watchpoint flags */ |
779 | #define BP_MEM_READ 0x01 | 781 | #define BP_MEM_READ 0x01 |
780 | #define BP_MEM_WRITE 0x02 | 782 | #define BP_MEM_WRITE 0x02 |
cpu-exec.c
@@ -50,6 +50,11 @@ int tb_invalidated_flag; | @@ -50,6 +50,11 @@ int tb_invalidated_flag; | ||
50 | //#define DEBUG_EXEC | 50 | //#define DEBUG_EXEC |
51 | //#define DEBUG_SIGNAL | 51 | //#define DEBUG_SIGNAL |
52 | 52 | ||
53 | +int qemu_cpu_has_work(CPUState *env) | ||
54 | +{ | ||
55 | + return cpu_has_work(env); | ||
56 | +} | ||
57 | + | ||
53 | void cpu_loop_exit(void) | 58 | void cpu_loop_exit(void) |
54 | { | 59 | { |
55 | /* NOTE: the register at this point must be saved by hand because | 60 | /* NOTE: the register at this point must be saved by hand because |
target-alpha/exec.h
@@ -48,10 +48,15 @@ static always_inline void regs_to_env(void) | @@ -48,10 +48,15 @@ static always_inline void regs_to_env(void) | ||
48 | { | 48 | { |
49 | } | 49 | } |
50 | 50 | ||
51 | +static always_inline int cpu_has_work(CPUState *env) | ||
52 | +{ | ||
53 | + return (env->interrupt_request & CPU_INTERRUPT_HARD); | ||
54 | +} | ||
55 | + | ||
51 | static always_inline int cpu_halted(CPUState *env) { | 56 | static always_inline int cpu_halted(CPUState *env) { |
52 | if (!env->halted) | 57 | if (!env->halted) |
53 | return 0; | 58 | return 0; |
54 | - if (env->interrupt_request & CPU_INTERRUPT_HARD) { | 59 | + if (cpu_has_work(env)) { |
55 | env->halted = 0; | 60 | env->halted = 0; |
56 | return 0; | 61 | return 0; |
57 | } | 62 | } |
target-arm/exec.h
@@ -37,14 +37,19 @@ static inline void regs_to_env(void) | @@ -37,14 +37,19 @@ static inline void regs_to_env(void) | ||
37 | { | 37 | { |
38 | } | 38 | } |
39 | 39 | ||
40 | +static inline int cpu_has_work(CPUState *env) | ||
41 | +{ | ||
42 | + return (env->interrupt_request & | ||
43 | + (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB)); | ||
44 | +} | ||
45 | + | ||
40 | static inline int cpu_halted(CPUState *env) { | 46 | static inline int cpu_halted(CPUState *env) { |
41 | if (!env->halted) | 47 | if (!env->halted) |
42 | return 0; | 48 | return 0; |
43 | /* An interrupt wakes the CPU even if the I and F CPSR bits are | 49 | /* An interrupt wakes the CPU even if the I and F CPSR bits are |
44 | set. We use EXITTB to silently wake CPU without causing an | 50 | set. We use EXITTB to silently wake CPU without causing an |
45 | actual interrupt. */ | 51 | actual interrupt. */ |
46 | - if (env->interrupt_request & | ||
47 | - (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB)) { | 52 | + if (cpu_has_work(env)) { |
48 | env->halted = 0; | 53 | env->halted = 0; |
49 | return 0; | 54 | return 0; |
50 | } | 55 | } |
target-cris/exec.h
@@ -40,6 +40,11 @@ static inline void regs_to_env(void) | @@ -40,6 +40,11 @@ static inline void regs_to_env(void) | ||
40 | void cpu_cris_flush_flags(CPUCRISState *env, int cc_op); | 40 | void cpu_cris_flush_flags(CPUCRISState *env, int cc_op); |
41 | void helper_movec(CPUCRISState *env, int reg, uint32_t val); | 41 | void helper_movec(CPUCRISState *env, int reg, uint32_t val); |
42 | 42 | ||
43 | +static inline int cpu_has_work(CPUState *env) | ||
44 | +{ | ||
45 | + return (env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI)); | ||
46 | +} | ||
47 | + | ||
43 | static inline int cpu_halted(CPUState *env) { | 48 | static inline int cpu_halted(CPUState *env) { |
44 | if (!env->halted) | 49 | if (!env->halted) |
45 | return 0; | 50 | return 0; |
target-i386/exec.h
@@ -338,14 +338,23 @@ static inline void regs_to_env(void) | @@ -338,14 +338,23 @@ static inline void regs_to_env(void) | ||
338 | #endif | 338 | #endif |
339 | } | 339 | } |
340 | 340 | ||
341 | +static inline int cpu_has_work(CPUState *env) | ||
342 | +{ | ||
343 | + int work; | ||
344 | + | ||
345 | + work = (env->interrupt_request & CPU_INTERRUPT_HARD) && | ||
346 | + (env->eflags & IF_MASK); | ||
347 | + work |= env->interrupt_request & CPU_INTERRUPT_NMI; | ||
348 | + | ||
349 | + return work; | ||
350 | +} | ||
351 | + | ||
341 | static inline int cpu_halted(CPUState *env) { | 352 | static inline int cpu_halted(CPUState *env) { |
342 | /* handle exit of HALTED state */ | 353 | /* handle exit of HALTED state */ |
343 | if (!env->halted) | 354 | if (!env->halted) |
344 | return 0; | 355 | return 0; |
345 | /* disable halt condition */ | 356 | /* disable halt condition */ |
346 | - if (((env->interrupt_request & CPU_INTERRUPT_HARD) && | ||
347 | - (env->eflags & IF_MASK)) || | ||
348 | - (env->interrupt_request & CPU_INTERRUPT_NMI)) { | 357 | + if (cpu_has_work(env)) { |
349 | env->halted = 0; | 358 | env->halted = 0; |
350 | return 0; | 359 | return 0; |
351 | } | 360 | } |
target-m68k/exec.h
@@ -41,10 +41,15 @@ static inline void regs_to_env(void) | @@ -41,10 +41,15 @@ static inline void regs_to_env(void) | ||
41 | #include "softmmu_exec.h" | 41 | #include "softmmu_exec.h" |
42 | #endif | 42 | #endif |
43 | 43 | ||
44 | +static inline int cpu_has_work(CPUState *env) | ||
45 | +{ | ||
46 | + return (env->interrupt_request & (CPU_INTERRUPT_HARD)); | ||
47 | +} | ||
48 | + | ||
44 | static inline int cpu_halted(CPUState *env) { | 49 | static inline int cpu_halted(CPUState *env) { |
45 | if (!env->halted) | 50 | if (!env->halted) |
46 | return 0; | 51 | return 0; |
47 | - if (env->interrupt_request & CPU_INTERRUPT_HARD) { | 52 | + if (cpu_has_work(env)) { |
48 | env->halted = 0; | 53 | env->halted = 0; |
49 | return 0; | 54 | return 0; |
50 | } | 55 | } |
target-mips/exec.h
@@ -33,12 +33,18 @@ static inline void regs_to_env(void) | @@ -33,12 +33,18 @@ static inline void regs_to_env(void) | ||
33 | { | 33 | { |
34 | } | 34 | } |
35 | 35 | ||
36 | +static inline int cpu_has_work(CPUState *env) | ||
37 | +{ | ||
38 | + return (env->interrupt_request & | ||
39 | + (CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER)); | ||
40 | +} | ||
41 | + | ||
42 | + | ||
36 | static inline int cpu_halted(CPUState *env) | 43 | static inline int cpu_halted(CPUState *env) |
37 | { | 44 | { |
38 | if (!env->halted) | 45 | if (!env->halted) |
39 | return 0; | 46 | return 0; |
40 | - if (env->interrupt_request & | ||
41 | - (CPU_INTERRUPT_HARD | CPU_INTERRUPT_TIMER)) { | 47 | + if (cpu_has_work(env)) { |
42 | env->halted = 0; | 48 | env->halted = 0; |
43 | return 0; | 49 | return 0; |
44 | } | 50 | } |
target-ppc/exec.h
@@ -44,11 +44,17 @@ static always_inline void regs_to_env (void) | @@ -44,11 +44,17 @@ static always_inline void regs_to_env (void) | ||
44 | { | 44 | { |
45 | } | 45 | } |
46 | 46 | ||
47 | +static always_inline int cpu_has_work(CPUState *env) | ||
48 | +{ | ||
49 | + return (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD)); | ||
50 | +} | ||
51 | + | ||
52 | + | ||
47 | static always_inline int cpu_halted (CPUState *env) | 53 | static always_inline int cpu_halted (CPUState *env) |
48 | { | 54 | { |
49 | if (!env->halted) | 55 | if (!env->halted) |
50 | return 0; | 56 | return 0; |
51 | - if (msr_ee && (env->interrupt_request & CPU_INTERRUPT_HARD)) { | 57 | + if (cpu_has_work(env)) { |
52 | env->halted = 0; | 58 | env->halted = 0; |
53 | return 0; | 59 | return 0; |
54 | } | 60 | } |
target-sh4/exec.h
@@ -28,10 +28,15 @@ register struct CPUSH4State *env asm(AREG0); | @@ -28,10 +28,15 @@ register struct CPUSH4State *env asm(AREG0); | ||
28 | #include "cpu.h" | 28 | #include "cpu.h" |
29 | #include "exec-all.h" | 29 | #include "exec-all.h" |
30 | 30 | ||
31 | +static inline int cpu_has_work(CPUState *env) | ||
32 | +{ | ||
33 | + return (env->interrupt_request & CPU_INTERRUPT_HARD); | ||
34 | +} | ||
35 | + | ||
31 | static inline int cpu_halted(CPUState *env) { | 36 | static inline int cpu_halted(CPUState *env) { |
32 | if (!env->halted) | 37 | if (!env->halted) |
33 | return 0; | 38 | return 0; |
34 | - if (env->interrupt_request & CPU_INTERRUPT_HARD) { | 39 | + if (cpu_has_work(env)) { |
35 | env->halted = 0; | 40 | env->halted = 0; |
36 | env->intr_at_halt = 1; | 41 | env->intr_at_halt = 1; |
37 | return 0; | 42 | return 0; |
target-sparc/exec.h
@@ -24,10 +24,17 @@ static inline void regs_to_env(void) | @@ -24,10 +24,17 @@ static inline void regs_to_env(void) | ||
24 | /* op_helper.c */ | 24 | /* op_helper.c */ |
25 | void do_interrupt(CPUState *env); | 25 | void do_interrupt(CPUState *env); |
26 | 26 | ||
27 | +static inline int cpu_has_work(CPUState *env1) | ||
28 | +{ | ||
29 | + return (env1->interrupt_request & CPU_INTERRUPT_HARD) && | ||
30 | + (env1->psret != 0); | ||
31 | +} | ||
32 | + | ||
33 | + | ||
27 | static inline int cpu_halted(CPUState *env1) { | 34 | static inline int cpu_halted(CPUState *env1) { |
28 | if (!env1->halted) | 35 | if (!env1->halted) |
29 | return 0; | 36 | return 0; |
30 | - if ((env1->interrupt_request & CPU_INTERRUPT_HARD) && (env1->psret != 0)) { | 37 | + if (cpu_has_work(env1)) { |
31 | env1->halted = 0; | 38 | env1->halted = 0; |
32 | return 0; | 39 | return 0; |
33 | } | 40 | } |