gwj / at91sam9263 · Commits

Commit 6a3b9cc9c5c52808435402a0b422e67f2ea9875c

Authored by blueswir1
1 parent 29fa23e7

Add SPARCserver 600MP emulation (original patch by Robert Reif) 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3604 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 5 changed files with 122 additions and 9 deletions
hw/slavio_misc.c
  View file @6a3b9cc
... ... @@ -46,11 +46,14 @@ typedef struct MiscState {
46 46 uint8_t aux1, aux2;
47 47 uint8_t diag, mctrl;
48 48 uint32_t sysctrl;
  49 + uint16_t leds;
49 50 } MiscState;
50 51  
51 52 #define MISC_SIZE 1
52 53 #define SYSCTRL_MAXADDR 3
53 54 #define SYSCTRL_SIZE (SYSCTRL_MAXADDR + 1)
  55 +#define LED_MAXADDR 2
  56 +#define LED_SIZE (LED_MAXADDR + 1)
54 57  
55 58 static void slavio_misc_update_irq(void *opaque)
56 59 {
... ... @@ -223,6 +226,54 @@ static CPUWriteMemoryFunc *slavio_sysctrl_mem_write[3] = {
223 226 slavio_sysctrl_mem_writel,
224 227 };
225 228  
  229 +static uint32_t slavio_led_mem_reads(void *opaque, target_phys_addr_t addr)
  230 +{
  231 + MiscState *s = opaque;
  232 + uint32_t ret = 0, saddr;
  233 +
  234 + saddr = addr & LED_MAXADDR;
  235 + switch (saddr) {
  236 + case 0:
  237 + ret = s->leds;
  238 + break;
  239 + default:
  240 + break;
  241 + }
  242 + MISC_DPRINTF("Read diagnostic LED reg 0x" TARGET_FMT_plx " = %x\n", addr,
  243 + ret);
  244 + return ret;
  245 +}
  246 +
  247 +static void slavio_led_mem_writes(void *opaque, target_phys_addr_t addr,
  248 + uint32_t val)
  249 +{
  250 + MiscState *s = opaque;
  251 + uint32_t saddr;
  252 +
  253 + saddr = addr & LED_MAXADDR;
  254 + MISC_DPRINTF("Write diagnostic LED reg 0x" TARGET_FMT_plx " = %x\n", addr,
  255 + val);
  256 + switch (saddr) {
  257 + case 0:
  258 + s->sysctrl = val;
  259 + break;
  260 + default:
  261 + break;
  262 + }
  263 +}
  264 +
  265 +static CPUReadMemoryFunc *slavio_led_mem_read[3] = {
  266 + slavio_led_mem_reads,
  267 + slavio_led_mem_reads,
  268 + slavio_led_mem_reads,
  269 +};
  270 +
  271 +static CPUWriteMemoryFunc *slavio_led_mem_write[3] = {
  272 + slavio_led_mem_writes,
  273 + slavio_led_mem_writes,
  274 + slavio_led_mem_writes,
  275 +};
  276 +
226 277 static void slavio_misc_save(QEMUFile *f, void *opaque)
227 278 {
228 279 MiscState *s = opaque;
... ... @@ -291,6 +342,13 @@ void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base,
291 342 // Power management
292 343 cpu_register_physical_memory(power_base, MISC_SIZE, slavio_misc_io_memory);
293 344  
  345 + /* 16 bit registers */
  346 + slavio_misc_io_memory = cpu_register_io_memory(0, slavio_led_mem_read,
  347 + slavio_led_mem_write, s);
  348 + /* ss600mp diag LEDs */
  349 + cpu_register_physical_memory(base + 0x1600000, MISC_SIZE,
  350 + slavio_misc_io_memory);
  351 +
294 352 /* 32 bit registers */
295 353 slavio_misc_io_memory = cpu_register_io_memory(0, slavio_sysctrl_mem_read,
296 354 slavio_sysctrl_mem_write,
... ...
hw/sun4m.c
  View file @6a3b9cc
... ... @@ -388,7 +388,8 @@ static void *sun4m_hw_init(const struct hwdef *hwdef, int RAM_size,
388 388 slavio_serial_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq],
389 389 serial_hds[1], serial_hds[0]);
390 390  
391   - sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd_table);
  391 + if (hwdef->fd_base != (target_phys_addr_t)-1)
  392 + sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd_table);
392 393  
393 394 main_esp = esp_init(bs_table, hwdef->esp_base, espdma, *espdma_irq,
394 395 esp_reset);
... ... @@ -546,6 +547,39 @@ static const struct hwdef hwdefs[] = {
546 547 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0,
547 548 },
548 549 },
  550 + /* SS-600MP */
  551 + {
  552 + .iommu_base = 0xfe0000000ULL,
  553 + .tcx_base = 0xe20000000ULL,
  554 + .cs_base = -1,
  555 + .slavio_base = 0xff0000000ULL,
  556 + .ms_kb_base = 0xff1000000ULL,
  557 + .serial_base = 0xff1100000ULL,
  558 + .nvram_base = 0xff1200000ULL,
  559 + .fd_base = -1,
  560 + .counter_base = 0xff1300000ULL,
  561 + .intctl_base = 0xff1400000ULL,
  562 + .dma_base = 0xef0081000ULL,
  563 + .esp_base = 0xef0080000ULL,
  564 + .le_base = 0xef0060000ULL,
  565 + .power_base = 0xefa000000ULL,
  566 + .vram_size = 0x00100000,
  567 + .nvram_size = 0x2000,
  568 + .esp_irq = 18,
  569 + .le_irq = 16,
  570 + .clock_irq = 7,
  571 + .clock1_irq = 19,
  572 + .ms_kb_irq = 14,
  573 + .ser_irq = 15,
  574 + .fd_irq = 22,
  575 + .me_irq = 30,
  576 + .cs_irq = -1,
  577 + .machine_id = 0x71,
  578 + .intbit_to_level = {
  579 + 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12,
  580 + 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0,
  581 + },
  582 + },
549 583 };
550 584  
551 585 static void sun4m_common_init(int RAM_size, const char *boot_device, DisplayState *ds,
... ... @@ -594,6 +628,19 @@ static void ss10_init(int RAM_size, int vga_ram_size, const char *boot_device,
594 628 1, 0xffffffff); // XXX actually first 62GB ok
595 629 }
596 630  
  631 +/* SPARCserver 600MP hardware initialisation */
  632 +static void ss600mp_init(int RAM_size, int vga_ram_size, const char *boot_device,
  633 + DisplayState *ds, const char **fd_filename, int snapshot,
  634 + const char *kernel_filename, const char *kernel_cmdline,
  635 + const char *initrd_filename, const char *cpu_model)
  636 +{
  637 + if (cpu_model == NULL)
  638 + cpu_model = "TI SuperSparc II";
  639 + sun4m_common_init(RAM_size, boot_device, ds, kernel_filename,
  640 + kernel_cmdline, initrd_filename, cpu_model,
  641 + 2, 0xffffffff); // XXX actually first 62GB ok
  642 +}
  643 +
597 644 QEMUMachine ss5_machine = {
598 645 "SS-5",
599 646 "Sun4m platform, SPARCstation 5",
... ... @@ -605,3 +652,9 @@ QEMUMachine ss10_machine = {
605 652 "Sun4m platform, SPARCstation 10",
606 653 ss10_init,
607 654 };
  655 +
  656 +QEMUMachine ss600mp_machine = {
  657 + "SS-600MP",
  658 + "Sun4m platform, SPARCserver 600MP",
  659 + ss600mp_init,
  660 +};
... ...
qemu-doc.texi
  View file @6a3b9cc
... ... @@ -1949,10 +1949,10 @@ More information is available at
1949 1949 @node Sparc32 System emulator
1950 1950 @section Sparc32 System emulator
1951 1951  
1952   -Use the executable @file{qemu-system-sparc} to simulate a SparcStation 5
1953   -or SparcStation 10 (sun4m architecture). The emulation is somewhat complete.
1954   -SMP up to 16 CPUs is supported, but Linux limits the number of usable CPUs
1955   -to 4.
  1952 +Use the executable @file{qemu-system-sparc} to simulate a SPARCstation
  1953 +5, SPARCstation 10, or SPARCserver 600MP (sun4m architecture). The
  1954 +emulation is somewhat complete. SMP up to 16 CPUs is supported, but
  1955 +Linux limits the number of usable CPUs to 4.
1956 1956  
1957 1957 QEMU emulates the following sun4m peripherals:
1958 1958  
... ... @@ -1971,13 +1971,14 @@ and power/reset logic
1971 1971 @item
1972 1972 ESP SCSI controller with hard disk and CD-ROM support
1973 1973 @item
1974   -Floppy drive
  1974 +Floppy drive (not on SS-600MP)
1975 1975 @item
1976 1976 CS4231 sound device (only on SS-5, not working yet)
1977 1977 @end itemize
1978 1978  
1979   -The number of peripherals is fixed in the architecture. Maximum memory size
1980   -depends on the machine type, for SS-5 it is 256MB and for SS-10 2047MB.
  1979 +The number of peripherals is fixed in the architecture. Maximum
  1980 +memory size depends on the machine type, for SS-5 it is 256MB and for
  1981 +SS-10 and SS-600MP 2047MB.
1981 1982  
1982 1983 Since version 0.8.2, QEMU uses OpenBIOS
1983 1984 @url{http://www.openbios.org/}. OpenBIOS is a free (GPL v2) portable
... ...
... ... @@ -7421,6 +7421,7 @@ void register_machines(void)
7421 7421 #else
7422 7422 qemu_register_machine(&ss5_machine);
7423 7423 qemu_register_machine(&ss10_machine);
  7424 + qemu_register_machine(&ss600mp_machine);
7424 7425 #endif
7425 7426 #elif defined(TARGET_ARM)
7426 7427 qemu_register_machine(&integratorcp_machine);
... ...
... ... @@ -1048,7 +1048,7 @@ void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
1048 1048 #endif
1049 1049  
1050 1050 /* sun4m.c */
1051   -extern QEMUMachine ss5_machine, ss10_machine;
  1051 +extern QEMUMachine ss5_machine, ss10_machine, ss600mp_machine;
1052 1052  
1053 1053 /* iommu.c */
1054 1054 void *iommu_init(target_phys_addr_t addr);
... ...