gwj / at91sam9263 · Commits

Commit 6725070d8dba75fefb9f852c64239a988ef42caa

Authored by balrog
1 parent 422ebf69

Allow a custom unlock address in CFI02 flash (Jan Kiszka). 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4218 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 3 changed files with 15 additions and 10 deletions
hw/flash.h
  View file @6725070
... ... @@ -13,7 +13,8 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
13 13 BlockDriverState *bs, uint32_t sector_len,
14 14 int nb_blocs, int width,
15 15 uint16_t id0, uint16_t id1,
16   - uint16_t id2, uint16_t id3);
  16 + uint16_t id2, uint16_t id3,
  17 + uint16_t unlock_addr0, uint16_t unlock_addr1);
17 18  
18 19 /* nand.c */
19 20 struct nand_flash_s;
... ...
hw/pflash_cfi02.c
  View file @6725070
... ... @@ -63,6 +63,7 @@ struct pflash_t {
63 63 uint8_t cmd;
64 64 uint8_t status;
65 65 uint16_t ident[4];
  66 + uint16_t unlock_addr[2];
66 67 uint8_t cfi_len;
67 68 uint8_t cfi_table[0x52];
68 69 QEMUTimer *timer;
... ... @@ -246,9 +247,9 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value,
246 247 pfl->cmd = 0x98;
247 248 return;
248 249 }
249   - if (boff != 0x555 || cmd != 0xAA) {
  250 + if (boff != pfl->unlock_addr[0] || cmd != 0xAA) {
250 251 DPRINTF("%s: unlock0 failed " TARGET_FMT_lx " %02x %04x\n",
251   - __func__, boff, cmd, 0x555);
  252 + __func__, boff, cmd, pfl->unlock_addr[0]);
252 253 goto reset_flash;
253 254 }
254 255 DPRINTF("%s: unlock sequence started\n", __func__);
... ... @@ -256,7 +257,7 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value,
256 257 case 1:
257 258 /* We started an unlock sequence */
258 259 check_unlock1:
259   - if (boff != 0x2AA || cmd != 0x55) {
  260 + if (boff != pfl->unlock_addr[1] || cmd != 0x55) {
260 261 DPRINTF("%s: unlock1 failed " TARGET_FMT_lx " %02x\n", __func__,
261 262 boff, cmd);
262 263 goto reset_flash;
... ... @@ -265,7 +266,7 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value,
265 266 break;
266 267 case 2:
267 268 /* We finished an unlock sequence */
268   - if (!pfl->bypass && boff != 0x555) {
  269 + if (!pfl->bypass && boff != pfl->unlock_addr[0]) {
269 270 DPRINTF("%s: command failed " TARGET_FMT_lx " %02x\n", __func__,
270 271 boff, cmd);
271 272 goto reset_flash;
... ... @@ -361,7 +362,7 @@ static void pflash_write (pflash_t *pfl, uint32_t offset, uint32_t value,
361 362 case 5:
362 363 switch (cmd) {
363 364 case 0x10:
364   - if (boff != 0x555) {
  365 + if (boff != pfl->unlock_addr[0]) {
365 366 DPRINTF("%s: chip erase: invalid address " TARGET_FMT_lx "\n",
366 367 __func__, offset);
367 368 goto reset_flash;
... ... @@ -528,7 +529,8 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
528 529 BlockDriverState *bs, uint32_t sector_len,
529 530 int nb_blocs, int width,
530 531 uint16_t id0, uint16_t id1,
531   - uint16_t id2, uint16_t id3)
  532 + uint16_t id2, uint16_t id3,
  533 + uint16_t unlock_addr0, uint16_t unlock_addr1)
532 534 {
533 535 pflash_t *pfl;
534 536 int32_t total_len;
... ... @@ -573,6 +575,8 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
573 575 pfl->ident[1] = id1;
574 576 pfl->ident[2] = id2;
575 577 pfl->ident[3] = id3;
  578 + pfl->unlock_addr[0] = unlock_addr0;
  579 + pfl->unlock_addr[1] = unlock_addr1;
576 580 /* Hardcoded CFI table (mostly from SG29 Spansion flash) */
577 581 pfl->cfi_len = 0x52;
578 582 /* Standard "QRY" string */
... ...
hw/ppc405_boards.c
  View file @6725070
... ... @@ -236,7 +236,7 @@ static void ref405ep_init (int ram_size, int vga_ram_size,
236 236 #endif
237 237 pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
238 238 drives_table[index].bdrv, 65536, fl_sectors, 2,
239   - 0x0001, 0x22DA, 0x0000, 0x0000);
  239 + 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
240 240 fl_idx++;
241 241 } else
242 242 #endif
... ... @@ -553,7 +553,7 @@ static void taihu_405ep_init(int ram_size, int vga_ram_size,
553 553 #endif
554 554 pflash_cfi02_register((uint32_t)(-bios_size), bios_offset,
555 555 drives_table[index].bdrv, 65536, fl_sectors, 4,
556   - 0x0001, 0x22DA, 0x0000, 0x0000);
  556 + 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
557 557 fl_idx++;
558 558 } else
559 559 #endif
... ... @@ -589,7 +589,7 @@ static void taihu_405ep_init(int ram_size, int vga_ram_size,
589 589 #endif
590 590 pflash_cfi02_register(0xfc000000, bios_offset,
591 591 drives_table[index].bdrv, 65536, fl_sectors, 4,
592   - 0x0001, 0x22DA, 0x0000, 0x0000);
  592 + 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA);
593 593 fl_idx++;
594 594 }
595 595 /* Register CLPD & LCD display */
... ...