Commit 65fe7b09a5e4018580ebbbcd9db790f1f2136428
1 parent
60aa19ab
Fix Sparc ASR handling (Aurelien Jarno)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2566 c046a42c-6fe2-441c-8c8c-71466251a162
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24 additions
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4 deletions
target-sparc/translate.c
... | ... | @@ -1130,11 +1130,19 @@ static void disas_sparc_insn(DisasContext * dc) |
1130 | 1130 | rs1 = GET_FIELD(insn, 13, 17); |
1131 | 1131 | switch(rs1) { |
1132 | 1132 | case 0: /* rdy */ |
1133 | - gen_op_movtl_T0_env(offsetof(CPUSPARCState, y)); | |
1133 | +#ifndef TARGET_SPARC64 | |
1134 | + case 0x01 ... 0x0e: /* undefined in the SPARCv8 | |
1135 | + manual, rdy on the microSPARC | |
1136 | + II */ | |
1137 | + case 0x0f: /* stbar in the SPARCv8 manual, | |
1138 | + rdy on the microSPARC II */ | |
1139 | + case 0x10 ... 0x1f: /* implementation-dependent in the | |
1140 | + SPARCv8 manual, rdy on the | |
1141 | + microSPARC II */ | |
1142 | +#endif | |
1143 | + gen_op_movtl_T0_env(offsetof(CPUSPARCState, y)); | |
1134 | 1144 | gen_movl_T0_reg(rd); |
1135 | 1145 | break; |
1136 | - case 15: /* stbar / V9 membar */ | |
1137 | - break; /* no effect? */ | |
1138 | 1146 | #ifdef TARGET_SPARC64 |
1139 | 1147 | case 0x2: /* V9 rdccr */ |
1140 | 1148 | gen_op_rdccr(); |
... | ... | @@ -1160,6 +1168,8 @@ static void disas_sparc_insn(DisasContext * dc) |
1160 | 1168 | gen_op_movl_T0_env(offsetof(CPUSPARCState, fprs)); |
1161 | 1169 | gen_movl_T0_reg(rd); |
1162 | 1170 | break; |
1171 | + case 0xf: /* V9 membar */ | |
1172 | + break; /* no effect */ | |
1163 | 1173 | case 0x13: /* Graphics Status */ |
1164 | 1174 | if (gen_trap_ifnofpu(dc)) |
1165 | 1175 | goto jmp_insn; |
... | ... | @@ -1879,7 +1889,17 @@ static void disas_sparc_insn(DisasContext * dc) |
1879 | 1889 | gen_op_xor_T1_T0(); |
1880 | 1890 | gen_op_movtl_env_T0(offsetof(CPUSPARCState, y)); |
1881 | 1891 | break; |
1882 | -#ifdef TARGET_SPARC64 | |
1892 | +#ifndef TARGET_SPARC64 | |
1893 | + case 0x01 ... 0x0f: /* undefined in the | |
1894 | + SPARCv8 manual, nop | |
1895 | + on the microSPARC | |
1896 | + II */ | |
1897 | + case 0x10 ... 0x1f: /* implementation-dependent | |
1898 | + in the SPARCv8 | |
1899 | + manual, nop on the | |
1900 | + microSPARC II */ | |
1901 | + break; | |
1902 | +#else | |
1883 | 1903 | case 0x2: /* V9 wrccr */ |
1884 | 1904 | gen_op_wrccr(); |
1885 | 1905 | break; | ... | ... |