Commit 651ba608e24ec584f7cc56b0218ececf110cca87

Authored by bellard
1 parent bd7a7b33

converted env access to TCG

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4516 c046a42c-6fe2-441c-8c8c-71466251a162
target-i386/op.c
... ... @@ -147,41 +147,6 @@
147 147  
148 148 #endif
149 149  
150   -void OPPROTO op_movl_T0_env(void)
151   -{
152   - T0 = *(uint32_t *)((char *)env + PARAM1);
153   -}
154   -
155   -void OPPROTO op_movl_env_T0(void)
156   -{
157   - *(uint32_t *)((char *)env + PARAM1) = T0;
158   -}
159   -
160   -void OPPROTO op_movl_env_T1(void)
161   -{
162   - *(uint32_t *)((char *)env + PARAM1) = T1;
163   -}
164   -
165   -void OPPROTO op_movtl_T0_env(void)
166   -{
167   - T0 = *(target_ulong *)((char *)env + PARAM1);
168   -}
169   -
170   -void OPPROTO op_movtl_env_T0(void)
171   -{
172   - *(target_ulong *)((char *)env + PARAM1) = T0;
173   -}
174   -
175   -void OPPROTO op_movtl_T1_env(void)
176   -{
177   - T1 = *(target_ulong *)((char *)env + PARAM1);
178   -}
179   -
180   -void OPPROTO op_movtl_env_T1(void)
181   -{
182   - *(target_ulong *)((char *)env + PARAM1) = T1;
183   -}
184   -
185 150 /* flags handling */
186 151  
187 152 void OPPROTO op_jmp_label(void)
... ...
target-i386/translate.c
... ... @@ -2979,11 +2979,11 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2979 2979 if (mod != 3) {
2980 2980 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2981 2981 gen_op_ld_T0_A0(OT_LONG + s->mem_index);
2982   - gen_op_movl_env_T0(offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)));
  2982 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)));
2983 2983 gen_op_movl_T0_0();
2984   - gen_op_movl_env_T0(offsetof(CPUX86State,xmm_regs[reg].XMM_L(1)));
2985   - gen_op_movl_env_T0(offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)));
2986   - gen_op_movl_env_T0(offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)));
  2984 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(1)));
  2985 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)));
  2986 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)));
2987 2987 } else {
2988 2988 rm = (modrm & 7) | REX_B(s);
2989 2989 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)),
... ... @@ -2995,8 +2995,8 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
2995 2995 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
2996 2996 gen_ldq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)));
2997 2997 gen_op_movl_T0_0();
2998   - gen_op_movl_env_T0(offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)));
2999   - gen_op_movl_env_T0(offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)));
  2998 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)));
  2999 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)));
3000 3000 } else {
3001 3001 rm = (modrm & 7) | REX_B(s);
3002 3002 gen_op_movq(offsetof(CPUX86State,xmm_regs[reg].XMM_Q(0)),
... ... @@ -3138,7 +3138,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
3138 3138 case 0x211: /* movss ea, xmm */
3139 3139 if (mod != 3) {
3140 3140 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
3141   - gen_op_movl_T0_env(offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)));
  3141 + tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)));
3142 3142 gen_op_st_T0_A0(OT_LONG + s->mem_index);
3143 3143 } else {
3144 3144 rm = (modrm & 7) | REX_B(s);
... ... @@ -3183,15 +3183,15 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
3183 3183 val = ldub_code(s->pc++);
3184 3184 if (is_xmm) {
3185 3185 gen_op_movl_T0_im(val);
3186   - gen_op_movl_env_T0(offsetof(CPUX86State,xmm_t0.XMM_L(0)));
  3186 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0)));
3187 3187 gen_op_movl_T0_0();
3188   - gen_op_movl_env_T0(offsetof(CPUX86State,xmm_t0.XMM_L(1)));
  3188 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(1)));
3189 3189 op1_offset = offsetof(CPUX86State,xmm_t0);
3190 3190 } else {
3191 3191 gen_op_movl_T0_im(val);
3192   - gen_op_movl_env_T0(offsetof(CPUX86State,mmx_t0.MMX_L(0)));
  3192 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,mmx_t0.MMX_L(0)));
3193 3193 gen_op_movl_T0_0();
3194   - gen_op_movl_env_T0(offsetof(CPUX86State,mmx_t0.MMX_L(1)));
  3194 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,mmx_t0.MMX_L(1)));
3195 3195 op1_offset = offsetof(CPUX86State,mmx_t0);
3196 3196 }
3197 3197 sse_op2 = sse_op_table2[((b - 1) & 3) * 8 + (((modrm >> 3)) & 7)][b1];
... ... @@ -3300,7 +3300,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
3300 3300 gen_ldq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_t0.XMM_Q(0)));
3301 3301 } else {
3302 3302 gen_op_ld_T0_A0(OT_LONG + s->mem_index);
3303   - gen_op_movl_env_T0(offsetof(CPUX86State,xmm_t0.XMM_L(0)));
  3303 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0)));
3304 3304 }
3305 3305 op2_offset = offsetof(CPUX86State,xmm_t0);
3306 3306 } else {
... ... @@ -3418,7 +3418,7 @@ static void gen_sse(DisasContext *s, int b, target_ulong pc_start, int rex_r)
3418 3418 if (b1 == 2) {
3419 3419 /* 32 bit access */
3420 3420 gen_op_ld_T0_A0(OT_LONG + s->mem_index);
3421   - gen_op_movl_env_T0(offsetof(CPUX86State,xmm_t0.XMM_L(0)));
  3421 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0)));
3422 3422 } else {
3423 3423 /* 64 bit access */
3424 3424 gen_ldq_env_A0(s->mem_index, offsetof(CPUX86State,xmm_t0.XMM_D(0)));
... ... @@ -6312,7 +6312,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6312 6312 goto illegal_op;
6313 6313 if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_READ))
6314 6314 break;
6315   - gen_op_movl_T0_env(offsetof(CPUX86State,ldt.selector));
  6315 + tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,ldt.selector));
6316 6316 ot = OT_WORD;
6317 6317 if (mod == 3)
6318 6318 ot += s->dflag;
... ... @@ -6337,7 +6337,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6337 6337 goto illegal_op;
6338 6338 if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_READ))
6339 6339 break;
6340   - gen_op_movl_T0_env(offsetof(CPUX86State,tr.selector));
  6340 + tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,tr.selector));
6341 6341 ot = OT_WORD;
6342 6342 if (mod == 3)
6343 6343 ot += s->dflag;
... ... @@ -6386,10 +6386,10 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6386 6386 if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_GDTR_READ))
6387 6387 break;
6388 6388 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
6389   - gen_op_movl_T0_env(offsetof(CPUX86State, gdt.limit));
  6389 + tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, gdt.limit));
6390 6390 gen_op_st_T0_A0(OT_WORD + s->mem_index);
6391 6391 gen_add_A0_im(s, 2);
6392   - gen_op_movtl_T0_env(offsetof(CPUX86State, gdt.base));
  6392 + tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, gdt.base));
6393 6393 if (!s->dflag)
6394 6394 gen_op_andl_T0_im(0xffffff);
6395 6395 gen_op_st_T0_A0(CODE64(s) + OT_LONG + s->mem_index);
... ... @@ -6438,10 +6438,10 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6438 6438 if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_IDTR_READ))
6439 6439 break;
6440 6440 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
6441   - gen_op_movl_T0_env(offsetof(CPUX86State, idt.limit));
  6441 + tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, idt.limit));
6442 6442 gen_op_st_T0_A0(OT_WORD + s->mem_index);
6443 6443 gen_add_A0_im(s, 2);
6444   - gen_op_movtl_T0_env(offsetof(CPUX86State, idt.base));
  6444 + tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, idt.base));
6445 6445 if (!s->dflag)
6446 6446 gen_op_andl_T0_im(0xffffff);
6447 6447 gen_op_st_T0_A0(CODE64(s) + OT_LONG + s->mem_index);
... ... @@ -6513,18 +6513,18 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6513 6513 if (!s->dflag)
6514 6514 gen_op_andl_T0_im(0xffffff);
6515 6515 if (op == 2) {
6516   - gen_op_movtl_env_T0(offsetof(CPUX86State,gdt.base));
6517   - gen_op_movl_env_T1(offsetof(CPUX86State,gdt.limit));
  6516 + tcg_gen_st_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,gdt.base));
  6517 + tcg_gen_st32_tl(cpu_T[1], cpu_env, offsetof(CPUX86State,gdt.limit));
6518 6518 } else {
6519   - gen_op_movtl_env_T0(offsetof(CPUX86State,idt.base));
6520   - gen_op_movl_env_T1(offsetof(CPUX86State,idt.limit));
  6519 + tcg_gen_st_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,idt.base));
  6520 + tcg_gen_st32_tl(cpu_T[1], cpu_env, offsetof(CPUX86State,idt.limit));
6521 6521 }
6522 6522 }
6523 6523 break;
6524 6524 case 4: /* smsw */
6525 6525 if (gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_CR0))
6526 6526 break;
6527   - gen_op_movl_T0_env(offsetof(CPUX86State,cr[0]));
  6527 + tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,cr[0]));
6528 6528 gen_ldst_modrm(s, modrm, OT_WORD, OR_TMP0, 1);
6529 6529 break;
6530 6530 case 6: /* lmsw */
... ... @@ -6547,10 +6547,10 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6547 6547 #ifdef TARGET_X86_64
6548 6548 if (CODE64(s) && rm == 0) {
6549 6549 /* swapgs */
6550   - gen_op_movtl_T0_env(offsetof(CPUX86State,segs[R_GS].base));
6551   - gen_op_movtl_T1_env(offsetof(CPUX86State,kernelgsbase));
6552   - gen_op_movtl_env_T1(offsetof(CPUX86State,segs[R_GS].base));
6553   - gen_op_movtl_env_T0(offsetof(CPUX86State,kernelgsbase));
  6550 + tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,segs[R_GS].base));
  6551 + tcg_gen_ld_tl(cpu_T[1], cpu_env, offsetof(CPUX86State,kernelgsbase));
  6552 + tcg_gen_st_tl(cpu_T[1], cpu_env, offsetof(CPUX86State,segs[R_GS].base));
  6553 + tcg_gen_st_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,kernelgsbase));
6554 6554 } else
6555 6555 #endif
6556 6556 {
... ... @@ -6728,7 +6728,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6728 6728 tcg_gen_helper_1_0(helper_movtl_T0_cr8, cpu_T[0]);
6729 6729 else
6730 6730 #endif
6731   - gen_op_movtl_T0_env(offsetof(CPUX86State,cr[reg]));
  6731 + tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,cr[reg]));
6732 6732 gen_op_mov_reg_T0(ot, rm);
6733 6733 }
6734 6734 break;
... ... @@ -6763,7 +6763,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6763 6763 gen_eob(s);
6764 6764 } else {
6765 6765 gen_svm_check_intercept(s, pc_start, SVM_EXIT_READ_DR0 + reg);
6766   - gen_op_movtl_T0_env(offsetof(CPUX86State,dr[reg]));
  6766 + tcg_gen_ld_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,dr[reg]));
6767 6767 gen_op_mov_reg_T0(ot, rm);
6768 6768 }
6769 6769 }
... ... @@ -6839,9 +6839,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
6839 6839 gen_lea_modrm(s, modrm, &reg_addr, &offset_addr);
6840 6840 if (op == 2) {
6841 6841 gen_op_ld_T0_A0(OT_LONG + s->mem_index);
6842   - gen_op_movl_env_T0(offsetof(CPUX86State, mxcsr));
  6842 + tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, mxcsr));
6843 6843 } else {
6844   - gen_op_movl_T0_env(offsetof(CPUX86State, mxcsr));
  6844 + tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State, mxcsr));
6845 6845 gen_op_st_T0_A0(OT_LONG + s->mem_index);
6846 6846 }
6847 6847 break;
... ...