Commit 64a595f26ae04ee386a3ce725c9222535dc28022
1 parent
3ad9a57e
cleanup
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@595 c046a42c-6fe2-441c-8c8c-71466251a162
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6 additions
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5 deletions
target-i386/cpu.h
| @@ -133,6 +133,8 @@ | @@ -133,6 +133,8 @@ | ||
| 133 | #define CR4_TSD_MASK (1 << 2) | 133 | #define CR4_TSD_MASK (1 << 2) |
| 134 | #define CR4_DE_MASK (1 << 3) | 134 | #define CR4_DE_MASK (1 << 3) |
| 135 | #define CR4_PSE_MASK (1 << 4) | 135 | #define CR4_PSE_MASK (1 << 4) |
| 136 | +#define CR4_PAE_MASK (1 << 5) | ||
| 137 | +#define CR4_PGE_MASK (1 << 7) | ||
| 136 | 138 | ||
| 137 | #define PG_PRESENT_BIT 0 | 139 | #define PG_PRESENT_BIT 0 |
| 138 | #define PG_RW_BIT 1 | 140 | #define PG_RW_BIT 1 |
| @@ -309,6 +311,7 @@ typedef struct CPUX86State { | @@ -309,6 +311,7 @@ typedef struct CPUX86State { | ||
| 309 | int user_mode_only; /* user mode only simulation */ | 311 | int user_mode_only; /* user mode only simulation */ |
| 310 | 312 | ||
| 311 | /* soft mmu support */ | 313 | /* soft mmu support */ |
| 314 | + uint32_t a20_mask; | ||
| 312 | /* 0 = kernel, 1 = user */ | 315 | /* 0 = kernel, 1 = user */ |
| 313 | CPUTLBEntry tlb_read[2][CPU_TLB_SIZE]; | 316 | CPUTLBEntry tlb_read[2][CPU_TLB_SIZE]; |
| 314 | CPUTLBEntry tlb_write[2][CPU_TLB_SIZE]; | 317 | CPUTLBEntry tlb_write[2][CPU_TLB_SIZE]; |
| @@ -396,13 +399,11 @@ void cpu_x86_frstor(CPUX86State *s, uint8_t *ptr, int data32); | @@ -396,13 +399,11 @@ void cpu_x86_frstor(CPUX86State *s, uint8_t *ptr, int data32); | ||
| 396 | struct siginfo; | 399 | struct siginfo; |
| 397 | int cpu_x86_signal_handler(int host_signum, struct siginfo *info, | 400 | int cpu_x86_signal_handler(int host_signum, struct siginfo *info, |
| 398 | void *puc); | 401 | void *puc); |
| 399 | - | ||
| 400 | -/* MMU defines */ | ||
| 401 | -void cpu_x86_init_mmu(CPUX86State *env); | ||
| 402 | -extern int a20_enabled; | ||
| 403 | - | ||
| 404 | void cpu_x86_set_a20(CPUX86State *env, int a20_state); | 402 | void cpu_x86_set_a20(CPUX86State *env, int a20_state); |
| 405 | 403 | ||
| 404 | +/* will be suppressed */ | ||
| 405 | +void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0); | ||
| 406 | + | ||
| 406 | /* used to debug */ | 407 | /* used to debug */ |
| 407 | #define X86_DUMP_FPU 0x0001 /* dump FPU state too */ | 408 | #define X86_DUMP_FPU 0x0001 /* dump FPU state too */ |
| 408 | #define X86_DUMP_CCOP 0x0002 /* dump qemu flag cache */ | 409 | #define X86_DUMP_CCOP 0x0002 /* dump qemu flag cache */ |