gwj / at91sam9263 · Commits

Commit 619dfca13a76da9bd10766858ed3ba40d4b303b2

Authored by ths
1 parent 091d055b

Proper sign extensions for 32-bit divisions, spotted by Richard Sandiford. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4650 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 7 additions and 2 deletions
target-mips/translate.c
  View file @619dfca
... ... @@ -1900,6 +1900,8 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
1900 1900 {
1901 1901 int l1 = gen_new_label();
1902 1902  
  1903 + tcg_gen_ext32s_tl(cpu_T[0], cpu_T[0]);
  1904 + tcg_gen_ext32s_tl(cpu_T[1], cpu_T[1]);
1903 1905 tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
1904 1906 {
1905 1907 TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64);
... ... @@ -1912,6 +1914,8 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
1912 1914 tcg_gen_rem_i64(r_tmp2, r_tmp1, r_tmp2);
1913 1915 tcg_gen_trunc_i64_tl(cpu_T[0], r_tmp3);
1914 1916 tcg_gen_trunc_i64_tl(cpu_T[1], r_tmp2);
  1917 + tcg_gen_ext32s_tl(cpu_T[0], cpu_T[0]);
  1918 + tcg_gen_ext32s_tl(cpu_T[1], cpu_T[1]);
1915 1919 gen_store_LO(cpu_T[0], 0);
1916 1920 gen_store_HI(cpu_T[1], 0);
1917 1921 }
... ... @@ -1923,6 +1927,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
1923 1927 {
1924 1928 int l1 = gen_new_label();
1925 1929  
  1930 + tcg_gen_ext32s_tl(cpu_T[1], cpu_T[1]);
1926 1931 tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
1927 1932 {
1928 1933 TCGv r_tmp1 = new_tmp();
... ... @@ -1962,8 +1967,8 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
1962 1967 {
1963 1968 int l2 = gen_new_label();
1964 1969  
1965   - tcg_gen_brcondi_tl(TCG_COND_NE, cpu_T[0], 1ULL << 63, l2);
1966   - tcg_gen_brcondi_tl(TCG_COND_NE, cpu_T[1], -1ULL, l2);
  1970 + tcg_gen_brcondi_tl(TCG_COND_NE, cpu_T[0], -1LL << 63, l2);
  1971 + tcg_gen_brcondi_tl(TCG_COND_NE, cpu_T[1], -1LL, l2);
1967 1972 {
1968 1973 tcg_gen_movi_tl(cpu_T[1], 0);
1969 1974 gen_store_LO(cpu_T[0], 0);
... ...