Commit 5f750b2ea04200ae68d31119fb867068d5ef2dbd
1 parent
fa28ec52
Sparc32: convert iommu to qdev
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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1 changed file
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45 additions
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11 deletions
hw/iommu.c
| @@ -21,8 +21,9 @@ | @@ -21,8 +21,9 @@ | ||
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. | 22 | * THE SOFTWARE. |
| 23 | */ | 23 | */ |
| 24 | -#include "hw.h" | 24 | + |
| 25 | #include "sun4m.h" | 25 | #include "sun4m.h" |
| 26 | +#include "sysbus.h" | ||
| 26 | 27 | ||
| 27 | /* debug iommu */ | 28 | /* debug iommu */ |
| 28 | //#define DEBUG_IOMMU | 29 | //#define DEBUG_IOMMU |
| @@ -127,6 +128,7 @@ | @@ -127,6 +128,7 @@ | ||
| 127 | #define IOMMU_PAGE_MASK ~(IOMMU_PAGE_SIZE - 1) | 128 | #define IOMMU_PAGE_MASK ~(IOMMU_PAGE_SIZE - 1) |
| 128 | 129 | ||
| 129 | typedef struct IOMMUState { | 130 | typedef struct IOMMUState { |
| 131 | + SysBusDevice busdev; | ||
| 130 | uint32_t regs[IOMMU_NREGS]; | 132 | uint32_t regs[IOMMU_NREGS]; |
| 131 | target_phys_addr_t iostart; | 133 | target_phys_addr_t iostart; |
| 132 | uint32_t version; | 134 | uint32_t version; |
| @@ -366,20 +368,52 @@ static void iommu_reset(void *opaque) | @@ -366,20 +368,52 @@ static void iommu_reset(void *opaque) | ||
| 366 | 368 | ||
| 367 | void *iommu_init(target_phys_addr_t addr, uint32_t version, qemu_irq irq) | 369 | void *iommu_init(target_phys_addr_t addr, uint32_t version, qemu_irq irq) |
| 368 | { | 370 | { |
| 369 | - IOMMUState *s; | ||
| 370 | - int iommu_io_memory; | 371 | + DeviceState *dev; |
| 372 | + SysBusDevice *s; | ||
| 373 | + IOMMUState *d; | ||
| 374 | + | ||
| 375 | + dev = qdev_create(NULL, "iommu"); | ||
| 376 | + qdev_set_prop_int(dev, "version", version); | ||
| 377 | + qdev_init(dev); | ||
| 378 | + s = sysbus_from_qdev(dev); | ||
| 379 | + sysbus_connect_irq(s, 0, irq); | ||
| 380 | + sysbus_mmio_map(s, 0, addr); | ||
| 381 | + | ||
| 382 | + d = FROM_SYSBUS(IOMMUState, s); | ||
| 383 | + | ||
| 384 | + return d; | ||
| 385 | +} | ||
| 386 | + | ||
| 387 | +static void iommu_init1(SysBusDevice *dev) | ||
| 388 | +{ | ||
| 389 | + IOMMUState *s = FROM_SYSBUS(IOMMUState, dev); | ||
| 390 | + int io; | ||
| 371 | 391 | ||
| 372 | - s = qemu_mallocz(sizeof(IOMMUState)); | 392 | + sysbus_init_irq(dev, &s->irq); |
| 373 | 393 | ||
| 374 | - s->version = version; | ||
| 375 | - s->irq = irq; | 394 | + s->version = qdev_get_prop_int(&dev->qdev, "version", 0); |
| 376 | 395 | ||
| 377 | - iommu_io_memory = cpu_register_io_memory(iommu_mem_read, | ||
| 378 | - iommu_mem_write, s); | ||
| 379 | - cpu_register_physical_memory(addr, IOMMU_NREGS * 4, iommu_io_memory); | 396 | + io = cpu_register_io_memory(iommu_mem_read, iommu_mem_write, s); |
| 397 | + sysbus_init_mmio(dev, IOMMU_NREGS * sizeof(uint32_t), io); | ||
| 380 | 398 | ||
| 381 | - register_savevm("iommu", addr, 2, iommu_save, iommu_load, s); | 399 | + register_savevm("iommu", -1, 2, iommu_save, iommu_load, s); |
| 382 | qemu_register_reset(iommu_reset, s); | 400 | qemu_register_reset(iommu_reset, s); |
| 383 | iommu_reset(s); | 401 | iommu_reset(s); |
| 384 | - return s; | ||
| 385 | } | 402 | } |
| 403 | + | ||
| 404 | +static SysBusDeviceInfo iommu_info = { | ||
| 405 | + .init = iommu_init1, | ||
| 406 | + .qdev.name = "iommu", | ||
| 407 | + .qdev.size = sizeof(IOMMUState), | ||
| 408 | + .qdev.props = (DevicePropList[]) { | ||
| 409 | + {.name = "version", .type = PROP_TYPE_INT}, | ||
| 410 | + {.name = NULL} | ||
| 411 | + } | ||
| 412 | +}; | ||
| 413 | + | ||
| 414 | +static void iommu_register_devices(void) | ||
| 415 | +{ | ||
| 416 | + sysbus_register_withprop(&iommu_info); | ||
| 417 | +} | ||
| 418 | + | ||
| 419 | +device_init(iommu_register_devices) |