Commit 5e3b100b65ea3af8e9a31507541e26d5e439e377
1 parent
d69d2ca9
Change ldl_phys to cpu_physical_memory_read, fix pte address
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3197 c046a42c-6fe2-441c-8c8c-71466251a162
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6 additions
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4 deletions
hw/iommu.c
@@ -202,7 +202,8 @@ static CPUWriteMemoryFunc *iommu_mem_write[3] = { | @@ -202,7 +202,8 @@ static CPUWriteMemoryFunc *iommu_mem_write[3] = { | ||
202 | 202 | ||
203 | static uint32_t iommu_page_get_flags(IOMMUState *s, target_phys_addr_t addr) | 203 | static uint32_t iommu_page_get_flags(IOMMUState *s, target_phys_addr_t addr) |
204 | { | 204 | { |
205 | - uint32_t iopte, ret; | 205 | + uint32_t ret; |
206 | + target_phys_addr_t iopte; | ||
206 | #ifdef DEBUG_IOMMU | 207 | #ifdef DEBUG_IOMMU |
207 | target_phys_addr_t pa = addr; | 208 | target_phys_addr_t pa = addr; |
208 | #endif | 209 | #endif |
@@ -210,9 +211,10 @@ static uint32_t iommu_page_get_flags(IOMMUState *s, target_phys_addr_t addr) | @@ -210,9 +211,10 @@ static uint32_t iommu_page_get_flags(IOMMUState *s, target_phys_addr_t addr) | ||
210 | iopte = s->regs[IOMMU_BASE] << 4; | 211 | iopte = s->regs[IOMMU_BASE] << 4; |
211 | addr &= ~s->iostart; | 212 | addr &= ~s->iostart; |
212 | iopte += (addr >> (PAGE_SHIFT - 2)) & ~3; | 213 | iopte += (addr >> (PAGE_SHIFT - 2)) & ~3; |
213 | - ret = ldl_phys(iopte); | ||
214 | - DPRINTF("get flags addr " TARGET_FMT_plx " => pte %x, *ptes = %x\n", pa, | ||
215 | - iopte, ret); | 214 | + cpu_physical_memory_read(iopte, (uint8_t *)&ret, 4); |
215 | + bswap32s(&ret); | ||
216 | + DPRINTF("get flags addr " TARGET_FMT_plx " => pte " TARGET_FMT_plx | ||
217 | + ", *pte = %x\n", pa, iopte, ret); | ||
216 | 218 | ||
217 | return ret; | 219 | return ret; |
218 | } | 220 | } |