gwj / at91sam9263 · Commits

Commit 5e10fc904e8645b9ffb4b042dca65c64b65f61ee

Authored by malc
1 parent 004c9ef4

Massage PPC version of cpu_get_real_ticks a little 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6435 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 1 changed file with 22 additions and 22 deletions
cpu-all.h
  View file @5e10fc9
... ... @@ -996,30 +996,30 @@ void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
996 996  
997 997 #if defined(_ARCH_PPC)
998 998  
999   -static inline uint32_t get_tbl(void)
1000   -{
1001   - uint32_t tbl;
1002   - asm volatile("mftb %0" : "=r" (tbl));
1003   - return tbl;
1004   -}
1005   -
1006   -static inline uint32_t get_tbu(void)
1007   -{
1008   - uint32_t tbl;
1009   - asm volatile("mftbu %0" : "=r" (tbl));
1010   - return tbl;
1011   -}
1012   -
1013 999 static inline int64_t cpu_get_real_ticks(void)
1014 1000 {
1015   - uint32_t l, h, h1;
1016   - /* NOTE: we test if wrapping has occurred */
1017   - do {
1018   - h = get_tbu();
1019   - l = get_tbl();
1020   - h1 = get_tbu();
1021   - } while (h != h1);
1022   - return ((int64_t)h << 32) | l;
  1001 + int64_t retval;
  1002 +#ifdef _ARCH_PPC64
  1003 + /* This reads timebase in one 64bit go and includes Cell workaround from:
  1004 + http://ozlabs.org/pipermail/linuxppc-dev/2006-October/027052.html
  1005 + */
  1006 + __asm__ __volatile__ (
  1007 + "mftb %0\n\t"
  1008 + "cmpwi %0,0\n\t"
  1009 + "beq- $-8"
  1010 + : "=r" (retval));
  1011 +#else
  1012 + /* http://ozlabs.org/pipermail/linuxppc-dev/1999-October/003889.html */
  1013 + unsigned long junk;
  1014 + __asm__ __volatile__ (
  1015 + "mftbu %1\n\t"
  1016 + "mftb %L0\n\t"
  1017 + "mftbu %0\n\t"
  1018 + "cmpw %0,%1\n\t"
  1019 + "bne $-16"
  1020 + : "=r" (retval), "=r" (junk));
  1021 +#endif
  1022 + return retval;
1023 1023 }
1024 1024  
1025 1025 #elif defined(__i386__)
... ...