gwj / at91sam9263 · Commits

Commit 5d40cd63027cbf321dd756d6acf244cf5eeda5c2

Authored by aurel32
1 parent 8777643e

tcg/x86: add bswap16_i32 ops 

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6837 c046a42c-6fe2-441c-8c8c-71466251a162
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Showing 2 changed files with 7 additions and 0 deletions
tcg/i386/tcg-target.c
  View file @5d40cd6
@@ -1034,6 +1034,11 @@ static inline void tcg_out_op(TCGContext *s, int opc, @@ -1034,6 +1034,11 @@ static inline void tcg_out_op(TCGContext *s, int opc,
1034 tcg_out_brcond2(s, args, const_args); 1034 tcg_out_brcond2(s, args, const_args);
1035 break; 1035 break;
1036 1036
  1037 + case INDEX_op_bswap16_i32:
  1038 + tcg_out8(s, 0x66);
  1039 + tcg_out_modrm(s, 0xc1, SHIFT_ROL, args[0]);
  1040 + tcg_out8(s, 8);
  1041 + break;
1037 case INDEX_op_bswap32_i32: 1042 case INDEX_op_bswap32_i32:
1038 tcg_out_opc(s, (0xc8 + args[0]) | P_EXT); 1043 tcg_out_opc(s, (0xc8 + args[0]) | P_EXT);
1039 break; 1044 break;
@@ -1130,6 +1135,7 @@ static const TCGTargetOpDef x86_op_defs[] = { @@ -1130,6 +1135,7 @@ static const TCGTargetOpDef x86_op_defs[] = {
1130 { INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } }, 1135 { INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } },
1131 { INDEX_op_brcond2_i32, { "r", "r", "ri", "ri" } }, 1136 { INDEX_op_brcond2_i32, { "r", "r", "ri", "ri" } },
1132 1137
  1138 + { INDEX_op_bswap16_i32, { "r", "0" } },
1133 { INDEX_op_bswap32_i32, { "r", "0" } }, 1139 { INDEX_op_bswap32_i32, { "r", "0" } },
1134 1140
1135 { INDEX_op_neg_i32, { "r", "0" } }, 1141 { INDEX_op_neg_i32, { "r", "0" } },
tcg/i386/tcg-target.h
  View file @5d40cd6
@@ -45,6 +45,7 @@ enum { @@ -45,6 +45,7 @@ enum {
45 #define TCG_TARGET_CALL_STACK_OFFSET 0 45 #define TCG_TARGET_CALL_STACK_OFFSET 0
46 46
47 /* optional instructions */ 47 /* optional instructions */
  48 +#define TCG_TARGET_HAS_bswap16_i32
48 #define TCG_TARGET_HAS_bswap32_i32 49 #define TCG_TARGET_HAS_bswap32_i32
49 #define TCG_TARGET_HAS_neg_i32 50 #define TCG_TARGET_HAS_neg_i32
50 #define TCG_TARGET_HAS_not_i32 51 #define TCG_TARGET_HAS_not_i32