Commit 5d20fa6b30bb9abdf9954e8e5cdd99bab85ee9f0
1 parent
3ebdd119
ESP: Add it_shift parameter (Hervé Poussineau)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4186 c046a42c-6fe2-441c-8c8c-71466251a162
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4 changed files
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12 additions
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12 deletions
hw/esp.c
@@ -21,8 +21,8 @@ | @@ -21,8 +21,8 @@ | ||
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
22 | * THE SOFTWARE. | 22 | * THE SOFTWARE. |
23 | */ | 23 | */ |
24 | + | ||
24 | #include "hw.h" | 25 | #include "hw.h" |
25 | -#include "block.h" | ||
26 | #include "scsi-disk.h" | 26 | #include "scsi-disk.h" |
27 | #include "scsi.h" | 27 | #include "scsi.h" |
28 | 28 | ||
@@ -44,14 +44,13 @@ do { printf("ESP: " fmt , ##args); } while (0) | @@ -44,14 +44,13 @@ do { printf("ESP: " fmt , ##args); } while (0) | ||
44 | #define DPRINTF(fmt, args...) | 44 | #define DPRINTF(fmt, args...) |
45 | #endif | 45 | #endif |
46 | 46 | ||
47 | -#define ESP_MASK 0x3f | ||
48 | #define ESP_REGS 16 | 47 | #define ESP_REGS 16 |
49 | -#define ESP_SIZE (ESP_REGS * 4) | ||
50 | #define TI_BUFSZ 32 | 48 | #define TI_BUFSZ 32 |
51 | 49 | ||
52 | typedef struct ESPState ESPState; | 50 | typedef struct ESPState ESPState; |
53 | 51 | ||
54 | struct ESPState { | 52 | struct ESPState { |
53 | + uint32_t it_shift; | ||
55 | qemu_irq irq; | 54 | qemu_irq irq; |
56 | uint8_t rregs[ESP_REGS]; | 55 | uint8_t rregs[ESP_REGS]; |
57 | uint8_t wregs[ESP_REGS]; | 56 | uint8_t wregs[ESP_REGS]; |
@@ -403,7 +402,7 @@ static uint32_t esp_mem_readb(void *opaque, target_phys_addr_t addr) | @@ -403,7 +402,7 @@ static uint32_t esp_mem_readb(void *opaque, target_phys_addr_t addr) | ||
403 | ESPState *s = opaque; | 402 | ESPState *s = opaque; |
404 | uint32_t saddr; | 403 | uint32_t saddr; |
405 | 404 | ||
406 | - saddr = (addr & ESP_MASK) >> 2; | 405 | + saddr = (addr >> s->it_shift) & (ESP_REGS - 1); |
407 | DPRINTF("read reg[%d]: 0x%2.2x\n", saddr, s->rregs[saddr]); | 406 | DPRINTF("read reg[%d]: 0x%2.2x\n", saddr, s->rregs[saddr]); |
408 | switch (saddr) { | 407 | switch (saddr) { |
409 | case ESP_FIFO: | 408 | case ESP_FIFO: |
@@ -439,7 +438,7 @@ static void esp_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) | @@ -439,7 +438,7 @@ static void esp_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) | ||
439 | ESPState *s = opaque; | 438 | ESPState *s = opaque; |
440 | uint32_t saddr; | 439 | uint32_t saddr; |
441 | 440 | ||
442 | - saddr = (addr & ESP_MASK) >> 2; | 441 | + saddr = (addr >> s->it_shift) & (ESP_REGS - 1); |
443 | DPRINTF("write reg[%d]: 0x%2.2x -> 0x%2.2x\n", saddr, s->wregs[saddr], | 442 | DPRINTF("write reg[%d]: 0x%2.2x -> 0x%2.2x\n", saddr, s->wregs[saddr], |
444 | val); | 443 | val); |
445 | switch (saddr) { | 444 | switch (saddr) { |
@@ -621,7 +620,7 @@ void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id) | @@ -621,7 +620,7 @@ void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id) | ||
621 | s->scsi_dev[id] = scsi_disk_init(bd, 0, esp_command_complete, s); | 620 | s->scsi_dev[id] = scsi_disk_init(bd, 0, esp_command_complete, s); |
622 | } | 621 | } |
623 | 622 | ||
624 | -void *esp_init(target_phys_addr_t espaddr, | 623 | +void *esp_init(target_phys_addr_t espaddr, int it_shift, |
625 | espdma_memory_read_write dma_memory_read, | 624 | espdma_memory_read_write dma_memory_read, |
626 | espdma_memory_read_write dma_memory_write, | 625 | espdma_memory_read_write dma_memory_write, |
627 | void *dma_opaque, qemu_irq irq, qemu_irq *reset) | 626 | void *dma_opaque, qemu_irq irq, qemu_irq *reset) |
@@ -634,12 +633,13 @@ void *esp_init(target_phys_addr_t espaddr, | @@ -634,12 +633,13 @@ void *esp_init(target_phys_addr_t espaddr, | ||
634 | return NULL; | 633 | return NULL; |
635 | 634 | ||
636 | s->irq = irq; | 635 | s->irq = irq; |
636 | + s->it_shift = it_shift; | ||
637 | s->dma_memory_read = dma_memory_read; | 637 | s->dma_memory_read = dma_memory_read; |
638 | s->dma_memory_write = dma_memory_write; | 638 | s->dma_memory_write = dma_memory_write; |
639 | s->dma_opaque = dma_opaque; | 639 | s->dma_opaque = dma_opaque; |
640 | 640 | ||
641 | esp_io_memory = cpu_register_io_memory(0, esp_mem_read, esp_mem_write, s); | 641 | esp_io_memory = cpu_register_io_memory(0, esp_mem_read, esp_mem_write, s); |
642 | - cpu_register_physical_memory(espaddr, ESP_SIZE, esp_io_memory); | 642 | + cpu_register_physical_memory(espaddr, ESP_REGS << it_shift, esp_io_memory); |
643 | 643 | ||
644 | esp_reset(s); | 644 | esp_reset(s); |
645 | 645 |
hw/mips_jazz.c
@@ -200,7 +200,7 @@ void mips_jazz_init (int ram_size, int vga_ram_size, | @@ -200,7 +200,7 @@ void mips_jazz_init (int ram_size, int vga_ram_size, | ||
200 | /* FIXME: missing NS SONIC DP83932 */ | 200 | /* FIXME: missing NS SONIC DP83932 */ |
201 | 201 | ||
202 | /* SCSI adapter */ | 202 | /* SCSI adapter */ |
203 | - scsi_hba = esp_init(0x80002000, | 203 | + scsi_hba = esp_init(0x80002000, 0, |
204 | espdma_memory_read, espdma_memory_write, NULL, | 204 | espdma_memory_read, espdma_memory_write, NULL, |
205 | rc4030[5], &esp_reset); | 205 | rc4030[5], &esp_reset); |
206 | for (n = 0; n < ESP_MAX_DEVS; n++) { | 206 | for (n = 0; n < ESP_MAX_DEVS; n++) { |
hw/scsi.h
@@ -2,7 +2,7 @@ | @@ -2,7 +2,7 @@ | ||
2 | #define ESP_MAX_DEVS 7 | 2 | #define ESP_MAX_DEVS 7 |
3 | typedef void (*espdma_memory_read_write)(void *opaque, uint8_t *buf, int len); | 3 | typedef void (*espdma_memory_read_write)(void *opaque, uint8_t *buf, int len); |
4 | void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id); | 4 | void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id); |
5 | -void *esp_init(target_phys_addr_t espaddr, | 5 | +void *esp_init(target_phys_addr_t espaddr, int it_shift, |
6 | espdma_memory_read_write dma_memory_read, | 6 | espdma_memory_read_write dma_memory_read, |
7 | espdma_memory_read_write dma_memory_write, | 7 | espdma_memory_read_write dma_memory_write, |
8 | void *dma_opaque, qemu_irq irq, qemu_irq *reset); | 8 | void *dma_opaque, qemu_irq irq, qemu_irq *reset); |
hw/sun4m.c
@@ -516,7 +516,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int RAM_size, | @@ -516,7 +516,7 @@ static void sun4m_hw_init(const struct hwdef *hwdef, int RAM_size, | ||
516 | exit(1); | 516 | exit(1); |
517 | } | 517 | } |
518 | 518 | ||
519 | - main_esp = esp_init(hwdef->esp_base, | 519 | + main_esp = esp_init(hwdef->esp_base, 2, |
520 | espdma_memory_read, espdma_memory_write, | 520 | espdma_memory_read, espdma_memory_write, |
521 | espdma, *espdma_irq, esp_reset); | 521 | espdma, *espdma_irq, esp_reset); |
522 | 522 | ||
@@ -668,7 +668,7 @@ static void sun4c_hw_init(const struct hwdef *hwdef, int RAM_size, | @@ -668,7 +668,7 @@ static void sun4c_hw_init(const struct hwdef *hwdef, int RAM_size, | ||
668 | exit(1); | 668 | exit(1); |
669 | } | 669 | } |
670 | 670 | ||
671 | - main_esp = esp_init(hwdef->esp_base, | 671 | + main_esp = esp_init(hwdef->esp_base, 2, |
672 | espdma_memory_read, espdma_memory_write, | 672 | espdma_memory_read, espdma_memory_write, |
673 | espdma, *espdma_irq, esp_reset); | 673 | espdma, *espdma_irq, esp_reset); |
674 | 674 | ||
@@ -1460,7 +1460,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, int RAM_size, | @@ -1460,7 +1460,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, int RAM_size, | ||
1460 | exit(1); | 1460 | exit(1); |
1461 | } | 1461 | } |
1462 | 1462 | ||
1463 | - main_esp = esp_init(hwdef->esp_base, | 1463 | + main_esp = esp_init(hwdef->esp_base, 2, |
1464 | espdma_memory_read, espdma_memory_write, | 1464 | espdma_memory_read, espdma_memory_write, |
1465 | espdma, *espdma_irq, esp_reset); | 1465 | espdma, *espdma_irq, esp_reset); |
1466 | 1466 |