Commit 5b9a1293beb0a71c8b2446ace77fea69d66cc0e1

Authored by aurel32
1 parent bfaf9a43

ide: Enable byte&word access to DMA address register

(Jan Kiszka)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4354 c046a42c-6fe2-441c-8c8c-71466251a162
Showing 1 changed file with 50 additions and 0 deletions
hw/ide.c
... ... @@ -2838,6 +2838,52 @@ static void bmdma_writeb(void *opaque, uint32_t addr, uint32_t val)
2838 2838 }
2839 2839 }
2840 2840  
  2841 +static uint32_t bmdma_addr_readb(void *opaque, uint32_t addr)
  2842 +{
  2843 + BMDMAState *bm = opaque;
  2844 + uint32_t val;
  2845 + val = (bm->addr >> ((addr & 3) * 8)) & 0xff;
  2846 +#ifdef DEBUG_IDE
  2847 + printf("%s: 0x%08x\n", __func__, val);
  2848 +#endif
  2849 + return val;
  2850 +}
  2851 +
  2852 +static void bmdma_addr_writeb(void *opaque, uint32_t addr, uint32_t val)
  2853 +{
  2854 + BMDMAState *bm = opaque;
  2855 + int shift = (addr & 3) * 8;
  2856 +#ifdef DEBUG_IDE
  2857 + printf("%s: 0x%08x\n", __func__, val);
  2858 +#endif
  2859 + bm->addr &= ~(0xFF << shift);
  2860 + bm->addr |= ((val & 0xFF) << shift) & ~3;
  2861 + bm->cur_addr = bm->addr;
  2862 +}
  2863 +
  2864 +static uint32_t bmdma_addr_readw(void *opaque, uint32_t addr)
  2865 +{
  2866 + BMDMAState *bm = opaque;
  2867 + uint32_t val;
  2868 + val = (bm->addr >> ((addr & 3) * 8)) & 0xffff;
  2869 +#ifdef DEBUG_IDE
  2870 + printf("%s: 0x%08x\n", __func__, val);
  2871 +#endif
  2872 + return val;
  2873 +}
  2874 +
  2875 +static void bmdma_addr_writew(void *opaque, uint32_t addr, uint32_t val)
  2876 +{
  2877 + BMDMAState *bm = opaque;
  2878 + int shift = (addr & 3) * 8;
  2879 +#ifdef DEBUG_IDE
  2880 + printf("%s: 0x%08x\n", __func__, val);
  2881 +#endif
  2882 + bm->addr &= ~(0xFFFF << shift);
  2883 + bm->addr |= ((val & 0xFFFF) << shift) & ~3;
  2884 + bm->cur_addr = bm->addr;
  2885 +}
  2886 +
2841 2887 static uint32_t bmdma_addr_readl(void *opaque, uint32_t addr)
2842 2888 {
2843 2889 BMDMAState *bm = opaque;
... ... @@ -2876,6 +2922,10 @@ static void bmdma_map(PCIDevice *pci_dev, int region_num,
2876 2922 register_ioport_write(addr + 1, 3, 1, bmdma_writeb, bm);
2877 2923 register_ioport_read(addr, 4, 1, bmdma_readb, bm);
2878 2924  
  2925 + register_ioport_write(addr + 4, 4, 1, bmdma_addr_writeb, bm);
  2926 + register_ioport_read(addr + 4, 4, 1, bmdma_addr_readb, bm);
  2927 + register_ioport_write(addr + 4, 4, 2, bmdma_addr_writew, bm);
  2928 + register_ioport_read(addr + 4, 4, 2, bmdma_addr_readw, bm);
2879 2929 register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm);
2880 2930 register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm);
2881 2931 addr += 8;
... ...