gwj / at91sam9263 · Commits

Commit 5b2808bfc06279db6a56942f3f6119c23ae07f42

Authored by ths
1 parent 50cfa95c

Fix MIPS MT GPR accesses, thanks Stefan Weil. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4307 c046a42c-6fe2-441c-8c8c-71466251a162
Inline Side-by-side
Showing 2 changed files with 10 additions and 10 deletions
target-mips/op.c
  View file @5b2808b
@@ -2300,7 +2300,7 @@ void op_mftgpr(void) @@ -2300,7 +2300,7 @@ void op_mftgpr(void)
2300 { 2300 {
2301 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 2301 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
2302 2302
2303 - T0 = env->gpr[PARAM1][other_tc]; 2303 + T0 = env->gpr[other_tc][PARAM1];
2304 FORCE_RET(); 2304 FORCE_RET();
2305 } 2305 }
2306 2306
@@ -2308,7 +2308,7 @@ void op_mftlo(void) @@ -2308,7 +2308,7 @@ void op_mftlo(void)
2308 { 2308 {
2309 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 2309 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
2310 2310
2311 - T0 = env->LO[PARAM1][other_tc]; 2311 + T0 = env->LO[other_tc][PARAM1];
2312 FORCE_RET(); 2312 FORCE_RET();
2313 } 2313 }
2314 2314
@@ -2316,7 +2316,7 @@ void op_mfthi(void) @@ -2316,7 +2316,7 @@ void op_mfthi(void)
2316 { 2316 {
2317 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 2317 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
2318 2318
2319 - T0 = env->HI[PARAM1][other_tc]; 2319 + T0 = env->HI[other_tc][PARAM1];
2320 FORCE_RET(); 2320 FORCE_RET();
2321 } 2321 }
2322 2322
@@ -2324,7 +2324,7 @@ void op_mftacx(void) @@ -2324,7 +2324,7 @@ void op_mftacx(void)
2324 { 2324 {
2325 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 2325 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
2326 2326
2327 - T0 = env->ACX[PARAM1][other_tc]; 2327 + T0 = env->ACX[other_tc][PARAM1];
2328 FORCE_RET(); 2328 FORCE_RET();
2329 } 2329 }
2330 2330
@@ -2340,7 +2340,7 @@ void op_mttgpr(void) @@ -2340,7 +2340,7 @@ void op_mttgpr(void)
2340 { 2340 {
2341 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 2341 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
2342 2342
2343 - T0 = env->gpr[PARAM1][other_tc]; 2343 + T0 = env->gpr[other_tc][PARAM1];
2344 FORCE_RET(); 2344 FORCE_RET();
2345 } 2345 }
2346 2346
@@ -2348,7 +2348,7 @@ void op_mttlo(void) @@ -2348,7 +2348,7 @@ void op_mttlo(void)
2348 { 2348 {
2349 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 2349 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
2350 2350
2351 - T0 = env->LO[PARAM1][other_tc]; 2351 + T0 = env->LO[other_tc][PARAM1];
2352 FORCE_RET(); 2352 FORCE_RET();
2353 } 2353 }
2354 2354
@@ -2356,7 +2356,7 @@ void op_mtthi(void) @@ -2356,7 +2356,7 @@ void op_mtthi(void)
2356 { 2356 {
2357 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 2357 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
2358 2358
2359 - T0 = env->HI[PARAM1][other_tc]; 2359 + T0 = env->HI[other_tc][PARAM1];
2360 FORCE_RET(); 2360 FORCE_RET();
2361 } 2361 }
2362 2362
@@ -2364,7 +2364,7 @@ void op_mttacx(void) @@ -2364,7 +2364,7 @@ void op_mttacx(void)
2364 { 2364 {
2365 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); 2365 int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC);
2366 2366
2367 - T0 = env->ACX[PARAM1][other_tc]; 2367 + T0 = env->ACX[other_tc][PARAM1];
2368 FORCE_RET(); 2368 FORCE_RET();
2369 } 2369 }
2370 2370
target-mips/op_template.c
  View file @5b2808b
@@ -52,13 +52,13 @@ void glue(op_load_gpr_T2_gpr, REG) (void) @@ -52,13 +52,13 @@ void glue(op_load_gpr_T2_gpr, REG) (void)
52 52
53 void glue(op_load_srsgpr_T0_gpr, REG) (void) 53 void glue(op_load_srsgpr_T0_gpr, REG) (void)
54 { 54 {
55 - T0 = env->gpr[REG][(env->CP0_SRSCtl >> CP0SRSCtl_PSS) & 0xf]; 55 + T0 = env->gpr[(env->CP0_SRSCtl >> CP0SRSCtl_PSS) & 0xf][REG];
56 FORCE_RET(); 56 FORCE_RET();
57 } 57 }
58 58
59 void glue(op_store_T0_srsgpr_gpr, REG) (void) 59 void glue(op_store_T0_srsgpr_gpr, REG) (void)
60 { 60 {
61 - env->gpr[REG][(env->CP0_SRSCtl >> CP0SRSCtl_PSS) & 0xf] = T0; 61 + env->gpr[(env->CP0_SRSCtl >> CP0SRSCtl_PSS) & 0xf][REG] = T0;
62 FORCE_RET(); 62 FORCE_RET();
63 } 63 }
64 #endif 64 #endif