Commit 5ad265ee5bb946d9be6e555d135c961abbe9b31c
1 parent
c9f10306
x86_64 support in cpu_gdb_read_registers(), by Goran Weinholt.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3491 c046a42c-6fe2-441c-8c8c-71466251a162
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gdbstub.c
| @@ -225,8 +225,56 @@ static int put_packet(GDBState *s, char *buf) | @@ -225,8 +225,56 @@ static int put_packet(GDBState *s, char *buf) | ||
| 225 | 225 | ||
| 226 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) | 226 | static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) |
| 227 | { | 227 | { |
| 228 | - uint32_t *registers = (uint32_t *)mem_buf; | ||
| 229 | int i, fpus; | 228 | int i, fpus; |
| 229 | + uint32_t *registers = (uint32_t *)mem_buf; | ||
| 230 | + | ||
| 231 | +#ifdef TARGET_X86_64 | ||
| 232 | + /* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */ | ||
| 233 | + uint64_t *registers64 = (uint64_t *)mem_buf; | ||
| 234 | + | ||
| 235 | + if (env->hflags & HF_CS64_MASK) { | ||
| 236 | + registers64[0] = tswap64(env->regs[R_EAX]); | ||
| 237 | + registers64[1] = tswap64(env->regs[R_EBX]); | ||
| 238 | + registers64[2] = tswap64(env->regs[R_ECX]); | ||
| 239 | + registers64[3] = tswap64(env->regs[R_EDX]); | ||
| 240 | + registers64[4] = tswap64(env->regs[R_ESI]); | ||
| 241 | + registers64[5] = tswap64(env->regs[R_EDI]); | ||
| 242 | + registers64[6] = tswap64(env->regs[R_EBP]); | ||
| 243 | + registers64[7] = tswap64(env->regs[R_ESP]); | ||
| 244 | + for(i = 8; i < 16; i++) { | ||
| 245 | + registers64[i] = tswap64(env->regs[i]); | ||
| 246 | + } | ||
| 247 | + registers64[16] = tswap64(env->eip); | ||
| 248 | + | ||
| 249 | + registers = (uint32_t *)®isters64[17]; | ||
| 250 | + registers[0] = tswap32(env->eflags); | ||
| 251 | + registers[1] = tswap32(env->segs[R_CS].selector); | ||
| 252 | + registers[2] = tswap32(env->segs[R_SS].selector); | ||
| 253 | + registers[3] = tswap32(env->segs[R_DS].selector); | ||
| 254 | + registers[4] = tswap32(env->segs[R_ES].selector); | ||
| 255 | + registers[5] = tswap32(env->segs[R_FS].selector); | ||
| 256 | + registers[6] = tswap32(env->segs[R_GS].selector); | ||
| 257 | + /* XXX: convert floats */ | ||
| 258 | + for(i = 0; i < 8; i++) { | ||
| 259 | + memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10); | ||
| 260 | + } | ||
| 261 | + registers[27] = tswap32(env->fpuc); /* fctrl */ | ||
| 262 | + fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; | ||
| 263 | + registers[28] = tswap32(fpus); /* fstat */ | ||
| 264 | + registers[29] = 0; /* ftag */ | ||
| 265 | + registers[30] = 0; /* fiseg */ | ||
| 266 | + registers[31] = 0; /* fioff */ | ||
| 267 | + registers[32] = 0; /* foseg */ | ||
| 268 | + registers[33] = 0; /* fooff */ | ||
| 269 | + registers[34] = 0; /* fop */ | ||
| 270 | + for(i = 0; i < 16; i++) { | ||
| 271 | + memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16); | ||
| 272 | + } | ||
| 273 | + registers[99] = tswap32(env->mxcsr); | ||
| 274 | + | ||
| 275 | + return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4; | ||
| 276 | + } | ||
| 277 | +#endif | ||
| 230 | 278 | ||
| 231 | for(i = 0; i < 8; i++) { | 279 | for(i = 0; i < 8; i++) { |
| 232 | registers[i] = env->regs[i]; | 280 | registers[i] = env->regs[i]; |